Characterization of a liquid crystal microlens array using multiwalled carbon nanotube electrodes.

Reconfigurable liquid crystal microlenses employing arrays of multiwalled carbon nanotubes (MWNTs) have been designed and fabricated. The cells consist of arrays of 2 microm high MWNTs grown by plasma-enhanced chemical vapor deposition on silicon with a top electrode of indium tin oxide coated glass positioned 20 microm above the silicon and the gap filled with the nematic liquid crystal BLO48. Simulations have found that, while its nematic liquid crystal aligns with MWNTs within a distance of 10nm, this distance is greatly enhanced by the application of an external electric field. Polarized light experiments show that light is focused with focal lengths ranging from approximately 7 microm to 12 microm.

Zinc oxide nanowire networks for macroelectronic devices

Highly transparent zinc oxide (ZnO) nanowire networks have been used as the active material in thin film transistors (TFTs) and complementary inverter devices. A systematic study on a range of networks of variable density and TFT channel length was performed. ZnO nanowire networks provide a less lithographically intense alternative to individual nanowire devices, are always semiconducting, and yield significantly higher mobilites than those achieved from currently used amorphous Si and organic TFTs. These results suggest that ZnO nanowire networks could be ideal for inexpensive large area electronics. © 2009 American Institute of Physics.

Zinc oxide nanostructures and high electron mobility nanocomposite thin film transistors

This paper reports on the synthesis of zinc oxide (ZnO) nanostructures and examines the performance of nanocomposite thin-film transistors (TFTs) fabricated using ZnO dispersed in both n- and p-type polymer host matrices. The ZnO nanostructures considered here comprise nanowires and tetrapods and were synthesized using vapor phase deposition techniques involving the carbothermal reduction of solid-phase zinc-containing compounds. Measurement results of nanocomposite TFTs based on dispersion of ZnO nanorods in an n-type organic semiconductor ([6, 6]-phenyl-C61-butyric acid methyl ester) show electron field-effect mobilities in the range 0.3-0.6 cm2V-1 s-1. representing an approximate enhancement by as much as a factor of 40 from the pristine state. The on/off current ratio of the nanocomposite TFTs approach 106 at saturation with off-currents on the order of 10 pA. The results presented here, although preliminary, show a highly promising enhancement for realization of high-performance solution-processable n-type organic TFTs. © 2008 IEEE.

High tuning range AlSi RF MEMS capacitors fabricated with sacrificial amorphous silicon surface micromachining

This paper reports the fabrication and electrical characterization of high tuning range AlSi RF MEMS capacitors. We present experimental results obtained by a surface micromachining process that uses dry etching of sacrificial amorphous silicon to release Al-1%Si membranes and has a low thermal budget (<450 °C) being compatible with CMOS post-processing. The proposed silicon sacrificial layer dry etching (SSLDE) process is able to provide very high Si etch rates (3-15 μm/min, depending on process parameters) with high Si: SiO2 selectivity (>10,000:1). Single- and double-air-gap MEMS capacitors, as well as some dedicated test structures needed to calibrate the electro-mechanical parameters and explore the reliability of the proposed technology, have been fabricated with the new process. S-parameter measurements from 100 MHz up to 2 GHz have shown a capacitance tuning range higher than 100% with the double-air-gap architecture. The tuning range can be enlarged with a proper DC electrical bias of the capacitor electrodes. Finally, the reported results make the proposed MEMS tuneable capacitor a good candidate for above-IC integration in communications applications. © 2004 Elsevier B.V. All rights reserved.

First human hNT neurons patterned on parylene-C/silicon dioxide substrates: Combining an accessible cell line and robust patterning technology for the study of the pathological adult human brain

In this communication, we describe a new method which has enabled the first patterning of human neurons (derived from the human teratocarcinoma cell line (hNT)) on parylene-C/silicon dioxide substrates. We reveal the details of the nanofabrication processes, cell differentiation and culturing protocols necessary to successfully pattern hNT neurons which are each key aspects of this new method. The benefits in patterning human neurons on silicon chip using an accessible cell line and robust patterning technology are of widespread value. Thus, using a combined technology such as this will facilitate the detailed study of the pathological human brain at both the single cell and network level. © 2010 Elsevier B.V.

Efficiency measurement of GaN-based quantum well and light-emitting diode structures grown on silicon substrates

The optical efficiency of GaN-based multiple quantum well (MQW) and light emitting diode (LED) structures grown on Si(111) substrates by metal-organic vapor phase epitaxy was measured and compared with equivalent structures on sapphire. The crystalline quality of the LED structures was comprehensively characterized using x-ray diffraction, atomic force microscopy, and plan-view transmission electron microscopy. A room temperature photoluminescence (PL) internal quantum efficiency (IQE) as high as 58% has been achieved in an InGaN/GaN MQW on Si, emitting at 460 nm. This is the highest reported PL-IQE of a c-plane GaN-based MQW on Si, and the radiative efficiency of this sample compares well with similar structures grown on sapphire. Processed LED devices on Si also show good electroluminescence (EL) performance, including a forward bias voltage of ∼3.5 V at 20 mA and a light output power of 1 mW at 45 mA from a 500 ×500 μm2 planar device without the use of any additional techniques to enhance the output coupling. The extraction efficiency of the LED devices was calculated, and the EL-IQE was then estimated to have a maximum value of 33% at a current density of 4 A cm-2, dropping to 30% at a current density of 40 A cm-2 for a planar LED device on Si emitting at 455 nm. The EL-IQE was clearly observed to increase as the structural quality of the material increased for devices on both sapphire and Si substrates. © 2011 American Institute of Physics.

Semi-insulating layer for novel high voltage polysilicon thin film transistors

This work describes the deposition and characterisation of semi-insulating oxygen-doped silicon films for the development of high voltage polycrystalline silicon (poly-Si) circuitry on glass. The performance of a novel poly-Si High Voltage Thin Film Transistor (HVTFT) structure, incorporating a layer of semi-insulating material, has been investigated using a two dimensional device simulator. The semi-insulating layer increases the operating voltage of the HVTFT structure by linearising the potential distribution in the device offset region. A glass compatible semi-insulating layer, suitable for HVTFT applications, has been deposited by the Plasma Enhanced Chemical Vapour Deposition (PECVD) technique from silane (SiH4), nitrous oxide (N2O) and helium (He) gas mixtures. The as-deposited films are furnace annealed at 600°C which is the maximum process temperature. By varying the N2O/SiH4 ratio the conductivity of the annealed films can be accurately controlled up to a maximum of around 10-7 Ω-1cm-1. Helium dilution of the reactant gases improves both film uniformity and reproducibility. Raman analysis shows the as-deposited and annealed films to be completely amorphous. A model for the microstructure of these Semi-Insulating Amorphous Oxygen-Doped Silicon (SIAOS) films is proposed to explain the observed physical and electrical properties.

Assembly and inspection of liquid crystal on silicon devices

Liquid crystal on silicon (LCOS) is one of the most exciting technologies, combining the optical modulation characteristics of liquid crystals with the power and compactness of a silicon backplane. The objective of our work is to improve cell assembly and inspection methods by introducing new equipment for automated assembly and by using an optical inspection microscope. A Suss-Micro'Tec Universal device bonder is used for precision assembly and device packaging and an Olympus BX51 high resolution microscope is employed for device inspection. ©2009 Optical Society of America.