200-V lateral superjunction LIGBT on partial SOI

This letter presents a novel lateral superjunction lateral insulated-gate bipolar transistor (LIGBT) in partial silicon-on-insulator (SOI) technology in 0.18-μm partial-SOI (PSOI) high-voltage (HV) process. For an n-type superjunction LIGBT, the p-layer in the superjunction drift region not only helps in achieving uniform electric field distribution but also contributes to the on-state current. The superjunction LIGBT successfully achieves a breakdown voltage (BV) of 210 V with an R dson of 765 mΩ ̇ mm 2. It exhibits half the value of specific on-state resistance R dson and three times higher saturation current (I dsat) for the same BV, compared to a comparable lateral superjunction laterally diffused metal-oxide-semiconductor fabricated in the same technology. It also performs well in higher temperature dc operation with 38.8% increase in R dson at 175°C, compared to the room temperature without any degradation in latch-up performance. To realize this device, it only requires one additional mask layer into X-FAB 0.18-μm PSOI HV process. © 2012 IEEE.

Effect of bandgap narrowing on performance of modern power devices

The effect of the bandgap narrowing (BGN) on performance of power devices is investigated in detail in this paper. The analysis reveals that the change in the energy band structure caused by BGN can strongly affect the conductivity modulation of the bipolar devices resulting in a completely different performance. This is due to the modified injection efficiency under high-level injection conditions. Using a comprehensive analysis of the injection efficiency in a p-n junction, an analytical model for this phenomenon is developed. BGN model tuning has been proved to be essential in accurately predicting the performance of a lateral insulated-gate bipolar transistor (IGBT). Other devices such as p-i-n diodes or punch-through IGBTs are significantly affected by the BGN, while others, such as field-stop IGBTs or power MOSFETs, are only marginally affected. © 2013 IEEE.

200V superjunction lateral IGBT fabricated on partial SOI

A 200V lateral insulated gate bipolar transistor (LIGBT) was successfully developed using lateral superjunction (SJ) in 0.18μm partial silicon on insulator (SOI) HV process. The results presented are based on extensive experimental measurements and numerical simulations. For an n-type lateral SJ LIGBT, the p layer in the SJ drift region helps in achieving uniform electric field distribution. Furthermore, the p-pillar contributes to the on-state current. Furthermore, the p-pillar contributes to sweep out holes during the turn-off process, thus leading to faster removal of plasma. To realize this device, one additional mask layer is required in the X-FAB 0.18μm partial SOI HV process. © 2013 IEEE.

p-MOS controlled lateral thyristor: A MOS controllable thyristor suitable for integration

A novel CMOS compatible lateral thyristor is proposed in this paper. Its thyristor conduction is fully controlled by a p-MOS gate. Loss of MOS control due to parasitic latch-up has been eliminated and triggering of the main thyristor at lower forward current achieved. The device operation has been verified by 2-D numerical simulations and experimental fabrication.

A study of frequency response in silicon heterojunction bipolar transistors with amorphous silicon emitters

A detailed physical model of amorphous silicon (aSi:H) is incorporated into a twodimensional device simulator to examine the frequency response limits of silicon heterojunction bipolar transistors (HBT's) with aSi:H emitters. The cutoff frequency is severely limited by the transit time in the emitter space charge region, due to the low electron drift mobility in aSi:H, to 98 MHz which compares poorly with the 37 GHz obtained for a silicon homojunction bipolar transistor with the same device structure. The effects of the amorphous heteroemitter material parameters (doping, electron drift mobility, defect density and interface state density) on frequency response are then examined to find the requirements for an amorphous heteroemitter material such that the HBT has better frequency response than the equivalent homojunction bipolar transistor. We find that an electron drift mobility of at least 100 cnr'V"'"1 is required in the amorphous heteroemitter and at a heteroemitter drift mobility of 350 cm2 · V1· s1 and heteroemitter doping of 5×1017 cm3, a maximum cutoff frequency of 52 GHz can be expected. © 1996 IEEE.

Analytic model for turn off in the silicon-on-insulator LIGBT

Lateral insulated gate bipolar transistors (LIGBTs) in silicon-on-insulator (SOI) show a unique turn off characteristic when compared to junction-isolated RESURF LIGBTs or vertical IGBTs. The turn off characteristic shows an extended `terrace' where, after the initial fast transient characteristic of IGBTs due to the loss of the electron current, the current stays almost at the same value for an extended period of time, before suddenly dropping to zero. In this paper, we show that this terrace arises because there is a value of LIGBT current during switch off where the rate of expansion of the depletion region with respect to the anode current is infinite. Once this level of anode current is approached, the depletion region starts to expand very rapidly, and is only stopped when it reaches the n-type buffer layer surrounding the anode. Once this happens, the current rapidly drops to zero. A quasi-static analytic model is derived to explain this behaviour. The analytically modelled turn off characteristic agrees well with that found by numerical simulation.

Spice modelling of the superjunction IGBT

This paper presents a SPICE model of the SuperJunction Insulated Gate Bipolar Transistor (SJIGBT) [1]. SPICE simulation results are in good agreement with the DESSIS simulation results under DC conditions. This model consists of an intrinsic MOSFET and a parallel combination of a wide and a narrow base pnp BJTs. A parasitic JFET is also included to account for the restricted current flow between two adjacent p-wells. In addition the JFET component also models the additional depletion region caused by the transverse junction at the upper side of the n-drift region where the current is mainly transported via majority carriers.

Investigation into IGBT dV/dt during turn-off and its temperature dependence

In many power converter applications, particularly those with high variable loads, such as traction and wind power, condition monitoring of the power semiconductor devices in the converter is considered desirable. Monitoring the device junction temperature in such converters is an essential part of this process. In this paper, a method for measuring the insulated gate bipolar transistor (IGBT) junction temperature using the collector voltage dV/dt at turn-OFF is outlined. A theoretical closed-form expression for the dV/dt at turn-OFF is derived, closely agreeing with experimental measurements. The role of dV/dt in dynamic avalanche in high-voltage IGBTs is also discussed. Finally, the implications of the temperature dependence of the dV/dt are discussed, including implementation of such a temperature measurement technique. © 2006 IEEE.

Transient electrothermal simulation of power semiconductor devices

In this paper, a new thermal model based on the Fourier series solution of heat conduction equation has been introduced in detail. 1-D and 2-D Fourier series thermal models have been programmed in MATLAB/Simulink. Compared with the traditional finite-difference thermal model and equivalent RC thermal network, the new thermal model can provide high simulation speed with high accuracy, which has been proved to be more favorable in dynamic thermal characterization on power semiconductor switches. The complete electrothermal simulation models of insulated gate bipolar transistor (IGBT) and power diodes under inductive load switching condition have been successfully implemented in MATLAB/Simulink. The experimental results on IGBT and power diodes with clamped inductive load switching tests have verified the new electrothermal simulation model. The advantage of Fourier series thermal model over widely used equivalent RC thermal network in dynamic thermal characterization has also been validated by the measured junction temperature.© 2010 IEEE.

Modeling bipolar power semiconductor devices gachovska

This book presents physics-based models of bipolar power semiconductor devices and their implementation in MATLAB and Simulink. The devices are subdivided into different regions, and the operation in each region, along with the interactions at the interfaces which are analyzed using basic semiconductor physics equations that govern their behavior. The Fourier series solution is used to solve the ambipolar diffusion equation in the lightly doped drift region of the devices. In addition to the external electrical characteristics, internal physical and electrical information, such as the junction voltages and the carrier distribution in different regions of the device, can be obtained using the models. Table of Contents: Introduction to Power Semiconductor Device Modeling/Physics of Power Semiconductor Devices/Modeling of a Power Diode and IGBT/IGBT Under an Inductive Load-Switching Condition in Simulink/Parameter Extraction. © 2013 by Morgan & Claypool.

800V lateral IGBT in bulk Si for low power compact SMPS applications

An 800V rated lateral IGBT for high frequency, low-cost off-line applications has been developed. The LIGBT features a new method of adjusting the bipolar gain, based on a floating N+ stripe in front of the P+ anode/drain region. The floating N+ layer enhances the carrier recombination at the anode/drain side of the drift region resulting in a very significant decrease in the turn-off speed and substantially lower overall losses. Switching speeds as low as 140ns at 25oC and 300ns at 125oC have been achieved with corresponding equivalent Rdson at 125oC below 90mω.cm2. A fully operational AC-DC converter using a controller with an integrated LIGBT+depletion mode MOSFET chip has been designed and qualified in plastic SOP8 packages and used in 5W, 65kHz SMPS applications. The device is fabricated in 0.6μm bulk silicon CMOS technology without any additional masking steps. © 2013 IEEE.