380 resultados para insulated-gate bipolar transistors (IGBTs)


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A detailed physical model of amorphous silicon (aSi:H) is incorporated into a twodimensional device simulator to examine the frequency response limits of silicon heterojunction bipolar transistors (HBT's) with aSi:H emitters. The cutoff frequency is severely limited by the transit time in the emitter space charge region, due to the low electron drift mobility in aSi:H, to 98 MHz which compares poorly with the 37 GHz obtained for a silicon homojunction bipolar transistor with the same device structure. The effects of the amorphous heteroemitter material parameters (doping, electron drift mobility, defect density and interface state density) on frequency response are then examined to find the requirements for an amorphous heteroemitter material such that the HBT has better frequency response than the equivalent homojunction bipolar transistor. We find that an electron drift mobility of at least 100 cnr'V"'"1 is required in the amorphous heteroemitter and at a heteroemitter drift mobility of 350 cm2 · V1· s1 and heteroemitter doping of 5×1017 cm3, a maximum cutoff frequency of 52 GHz can be expected. © 1996 IEEE.

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A novel CMOS-compatible, heavily doped drift auxiliary cathode lateral insulated gate transistor (HDD-ACLIGT) structure is analyzed using two-dimensional device simulation techniques. Simulation results indicate that low on-resistance and a fast turn-off time of less than 50 ns can be achieved by incorporating an additional n+ region which is self-aligned to the gate between the p+ auxiliary cathode and the p well, together with an extended p buried layer in an anode-shorted modified lateral insulated gate transistor (MLIGT) structure. The on-state and its transient performance are analyzed in detail. The on-state performances of the HDD-ACLIGT and the MLIGT are compared and discussed. The results indicate that the HDD-ACLIGT structure is well suited for HVICs. The device is also well suited for integration with self-aligned digital CMOS.

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This paper presents for the first time an investigation and comparison of the superjunction IGBT (SJBT) as proposed in [1,2] and the current state of art Field Stop IGBT [3,4]. Simulation results indicate the superior performance of the superjunction IGBT under switching conditions. For the same conditions, at a collector current density of 100A/cm2 and on-state voltage 1.6 V the switching off losses for a SJBT and Field-Stop IGBT are 1 and 4.5 mJ/cm 2 respectively. © 2006 IEEE.

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In many power converter applications, particularly those with high variable loads, such as traction and wind power, condition monitoring of the power semiconductor devices in the converter is considered desirable. Monitoring the device junction temperature in such converters is an essential part of this process. In this paper, a method for measuring the insulated gate bipolar transistor (IGBT) junction temperature using the collector voltage dV/dt at turn-OFF is outlined. A theoretical closed-form expression for the dV/dt at turn-OFF is derived, closely agreeing with experimental measurements. The role of dV/dt in dynamic avalanche in high-voltage IGBTs is also discussed. Finally, the implications of the temperature dependence of the dV/dt are discussed, including implementation of such a temperature measurement technique. © 2006 IEEE.

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The effect of the bandgap narrowing (BGN) on performance of power devices is investigated in detail in this paper. The analysis reveals that the change in the energy band structure caused by BGN can strongly affect the conductivity modulation of the bipolar devices resulting in a completely different performance. This is due to the modified injection efficiency under high-level injection conditions. Using a comprehensive analysis of the injection efficiency in a p-n junction, an analytical model for this phenomenon is developed. BGN model tuning has been proved to be essential in accurately predicting the performance of a lateral insulated-gate bipolar transistor (IGBT). Other devices such as p-i-n diodes or punch-through IGBTs are significantly affected by the BGN, while others, such as field-stop IGBTs or power MOSFETs, are only marginally affected. © 2013 IEEE.

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This paper presents a SPICE model of the SuperJunction Insulated Gate Bipolar Transistor (SJIGBT) [1]. SPICE simulation results are in good agreement with the DESSIS simulation results under DC conditions. This model consists of an intrinsic MOSFET and a parallel combination of a wide and a narrow base pnp BJTs. A parasitic JFET is also included to account for the restricted current flow between two adjacent p-wells. In addition the JFET component also models the additional depletion region caused by the transverse junction at the upper side of the n-drift region where the current is mainly transported via majority carriers.

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In this paper, a new thermal model based on the Fourier series solution of heat conduction equation has been introduced in detail. 1-D and 2-D Fourier series thermal models have been programmed in MATLAB/Simulink. Compared with the traditional finite-difference thermal model and equivalent RC thermal network, the new thermal model can provide high simulation speed with high accuracy, which has been proved to be more favorable in dynamic thermal characterization on power semiconductor switches. The complete electrothermal simulation models of insulated gate bipolar transistor (IGBT) and power diodes under inductive load switching condition have been successfully implemented in MATLAB/Simulink. The experimental results on IGBT and power diodes with clamped inductive load switching tests have verified the new electrothermal simulation model. The advantage of Fourier series thermal model over widely used equivalent RC thermal network in dynamic thermal characterization has also been validated by the measured junction temperature.© 2010 IEEE.

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This letter presents a novel lateral superjunction lateral insulated-gate bipolar transistor (LIGBT) in partial silicon-on-insulator (SOI) technology in 0.18-μm partial-SOI (PSOI) high-voltage (HV) process. For an n-type superjunction LIGBT, the p-layer in the superjunction drift region not only helps in achieving uniform electric field distribution but also contributes to the on-state current. The superjunction LIGBT successfully achieves a breakdown voltage (BV) of 210 V with an R dson of 765 mΩ ̇ mm 2. It exhibits half the value of specific on-state resistance R dson and three times higher saturation current (I dsat) for the same BV, compared to a comparable lateral superjunction laterally diffused metal-oxide-semiconductor fabricated in the same technology. It also performs well in higher temperature dc operation with 38.8% increase in R dson at 175°C, compared to the room temperature without any degradation in latch-up performance. To realize this device, it only requires one additional mask layer into X-FAB 0.18-μm PSOI HV process. © 2012 IEEE.

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This paper presents the steps and the challenges for implementing analytical, physics-based models for the insulated gate bipolar transistor (IGBT) and the PIN diode in hardware and more specifically in field programmable gate arrays (FPGAs). The models can be utilised in hardware co-simulation of complex power electronic converters and entire power systems in order to reduce the simulation time without compromising the accuracy of results. Such a co-simulation allows reliable prediction of the system's performance as well as accurate investigation of the power devices' behaviour during operation. Ultimately, this will allow application-specific optimisation of the devices' structure, circuit topologies as well as enhancement of the control and/or protection schemes.

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A 200V lateral insulated gate bipolar transistor (LIGBT) was successfully developed using lateral superjunction (SJ) in 0.18μm partial silicon on insulator (SOI) HV process. The results presented are based on extensive experimental measurements and numerical simulations. For an n-type lateral SJ LIGBT, the p layer in the SJ drift region helps in achieving uniform electric field distribution. Furthermore, the p-pillar contributes to the on-state current. Furthermore, the p-pillar contributes to sweep out holes during the turn-off process, thus leading to faster removal of plasma. To realize this device, one additional mask layer is required in the X-FAB 0.18μm partial SOI HV process. © 2013 IEEE.