Model for quantum efficiency of guided mode plasmonic enhanced silicon Schottky detectors

Plasmonic enhanced Schottky detectors operating on the basis of the internal photoemission process are becoming an attractive choice for detecting photons with sub bandgap energy. Yet, the quantum efficiency of these detectors appears to be low compare to the more conventional detectors which are based on interband transitions in a semiconductor. Hereby we provide a theoretical model to predict the quantum efficiency of guided mode internal photoemission photodetector with focus on the platform of silicon plasmonics. The model is supported by numerical simulations and comparison to experimental results. Finally, we discuss approaches for further enhancement of the quantum efficiency.

Direct temperature mapping of nanoscale plasmonic devices.

Side by side with the great advantages of plasmonics in nanoscale light confinement, the inevitable ohmic loss results in significant joule heating in plasmonic devices. Therefore, understanding optical-induced heat generation and heat transport in integrated on-chip plasmonic devices is of major importance. Specifically, there is a need for in situ visualization of electromagnetic induced thermal energy distribution with high spatial resolution. This paper studies the heat distribution in silicon plasmonic nanotips. Light is coupled to the plasmonic nanotips from a silicon nanowaveguide that is integrated with the tip on chip. Heat is generated by light absorption in the metal surrounding the silicon nanotip. The steady-state thermal distribution is studied numerically and measured experimentally using the approach of scanning thermal microscopy. It is shown that following the nanoscale heat generation by a 10 mW light source within a silicon photonic waveguide the temperature in the region of the nanotip is increased by ∼ 15 °C compared with the ambient temperature. Furthermore, we also perform a numerical study of the dynamics of the heat transport. Given the nanoscale dimensions of the structure, significant heating is expected to occur within the time frame of picoseconds. The capability of measuring temperature distribution of plasmonic structures at the nanoscale is shown to be a powerful tool and may be used in future applications related to thermal plasmonic applications such as control heating of liquids, thermal photovoltaic, nanochemistry, medicine, heat-assisted magnetic memories, and nanolithography.

Nanoscale plasmonic memristor with optical readout functionality.

We experimentally demonstrate for the first time a nanoscale resistive random access memory (RRAM) electronic device integrated with a plasmonic waveguide providing the functionality of optical readout. The device fabrication is based on silicon on insulator CMOS compatible approach of local oxidation of silicon, which enables the realization of RRAM and low optical loss channel photonic waveguide at the same fabrication step. This plasmonic device operates at telecom wavelength of 1.55 μm and can be used to optically read the logic state of a memory by measuring two distinct levels of optical transmission. The experimental characterization of the device shows optical bistable behavior between these levels of transmission in addition to well-defined hysteresis. We attribute the changes in the optical transmission to the creation of a nanoscale absorbing and scattering metallic filament in the amorphous silicon layer, where the plasmonic mode resides.

Subwavelength plasmonics for graded-index optics on a chip.

Planar plasmonic devices are becoming attractive for myriad applications, owing to their potential compatibility with standard microelectronics technology and the capability for densely integrating a large variety of plasmonic devices on a chip. Mitigating the challenges of using plasmonics in on-chip configurations requires precise control over the properties of plasmonic modes, in particular their shape and size. Here we achieve this goal by demonstrating a planar plasmonic graded-index lens focusing surface plasmons propagating along the device. The plasmonic mode is manipulated by carving subwavelength features into a dielectric layer positioned on top of a uniform metal film, allowing the local effective index of the plasmonic mode to be controlled using a single binary lithographic step. Focusing and divergence of surface plasmons is demonstrated experimentally. The demonstrated approach can be used for manipulating the propagation of surface plasmons, e.g., for beam steering, splitting, cloaking, mode matching, and beam shaping applications.

High resolution direct measurement of temperature distribution in silicon nanophotonics devices.

Following the miniaturization of photonic devices and the increase in data rates, the issues of self heating and heat removal in active nanophotonic devices should be considered and studied in more details. In this paper we use the approach of Scanning Thermal Microscopy (SThM) to obtain an image of the temperature field of a silicon micro ring resonator with sub-micron spatial resolution. The temperature rise in the device is a result of self heating which is caused by free carrier absorption in the doped silicon. The temperature is measured locally and directly using a temperature sensitive AFM probe. We show that this local temperature measurement is feasible in the photonic device despite the perturbation that is introduced by the probe. Using the above method we observed a significant self heating of about 10 degrees within the device.

Integration of silicon plasmonic schottky photodetector for on chip signal tapping at telecom wavelengths

We experimentally demonstrate the use of an on-chip integrated Schottky plasmonic detector for testing, monitoring and tapping signals in plasmonic and photonic devices. Theoretical model and measurement of external and integrated devices will be presented. © OSA 2013.

Nanoscale temperature mapping of photonic and plasmonic devices

We experimentally demonstrate nanoscale thermal mapping of light induced heat in photonic and plasmonic devices using a thermocouple AFM tip. Numerical simulations results and nanoscale temperature measurements are presented and discussed. © OSA 2013.

Integration of silicon plasmonic schottky photodetector for on chip signal tapping at telecom wavelengths

We experimentally demonstrate the use of an on-chip integrated Schottky plasmonic detector for testing, monitoring and tapping signals in plasmonic and photonic devices. Theoretical model and measurement of external and integrated devices will be presented. © OSA 2013.

Silicon pyramids for plasmonic enhanced schottky photodetectors

We demonstrate the design, fabrication and characterization of plasmonic enhanced free space Schottky detector for telecom wavelength. Unique fabrication technique, simulation and measurement results will be presented and discussed. © OSA 2013.

Integration of silicon plasmonic schottky photodetector for on chip signal tapping at telecom wavelengths

We experimentally demonstrate the use of an on-chip integrated Schottky plasmonic detector for testing, monitoring and tapping signals in plasmonic and photonic devices. Theoretical model and measurement of external and integrated devices will be presented. © OSA 2013.

Plasmonic graded-index planar lens based on subwavelength features in the effective index regime

We experimentally demonstrate the planar focusing of Surface Plasmon Polaritons using space variant PMMA subwavelength features on top of a metallic film. Focusing is obtained by creating an effective graded refractive index profile. © 2012 OSA.

On chip plasmonic enhanced silicon Schottky detector for telecom wavelengths

We demonstrate an integrated on-chip plasmonic enhanced Schottky detector for telecom wavelengths based on the internal photoemission process. This CMOS compatible device may serve as a promising alternative to the Si-Ge detectors. © 2012 OSA.

Plasmonic nanotips for on-chip focusing of light

We investigate numerically and experimentally the on-chip nanoscale focusing of surface plasmon polaritons (SPPs) in metallic nanotip coupled to the silicon waveguide. Strong field enhancement is observed at the apex of the tip. © 2011 IEEE.

Experimental demonstration of locally oxidized hybrid silicon-plasmonic waveguide

We demonstrate self-aligned approach for fabrication of hybrid silicon plasmonic waveguide. The demonstrated structure provides both nanoscale confinement together with propagation length of 100 microns. Near-field measurements of propagation and coupling loss are also presented. © 2011 OSA.

Experimental demonstration of locally oxidized hybrid silicon-plasmonic waveguide

We experimentally demonstrate a self-aligned approach for the fabrication of nanoscale hybrid silicon-plasmonic waveguide fabricated by local oxidation of silicon (LOCOS). Implementation of the LOCOS technique provides compatibility with standard complementary metal-oxide-semiconductor technology and allows avoiding lateral misalignment between the silicon waveguide and the upper metallic layer. We directly measured the propagation and the coupling loss of the fabricated hybrid waveguide using a near-field scanning optical microscope. The demonstrated structure provides nanoscale confinement of light together with a reasonable propagation length of ∼100 μm. As such, it is expected to become an important building block in future on-chip optoelectronic circuitry. © 2010 American Institute of Physics.