Dual gate photo-thin film transistor with high photoconductive gain for high reliability, and low noise flat panel transparent imager

In this presentation, we report excellent electrical and optical characteristics of a dual gate photo thin film transistor (TFT) with bi-layer oxide channel, which was designed to provide virgin threshold voltage (V T) control, improve the negative bias illumination temperature stress (NBITS) reliability, and offer high photoconductive gain. In order to address the photo-sensitivity of phototransistor for the incoming light, top transparent InZnO (IZO) gate was employed, which enables the independent gate control of dual gate photo-TFT without having any degradation of its photosensitivity. Considering optimum initial V T and NBITS reliability for the device operation, the top gate bias was judiciously chosen. In addition, the speed and noise performance of the photo-TFT is competitive with silicon photo-transistors, and more importantly, its superiority lies in optical transparency. © 2011 IEEE.

Low partial pressure chemical vapor deposition of graphene on copper

A systematic study of the Cu-catalyzed chemical vapor deposition of graphene under extremely low partial pressure is carried out. A carbon precursor supply of just P CH4∼ 0.009 mbar during the deposition favors the formation of large-area uniform monolayer graphene verified by Raman spectra. A diluted HNO 3 solution is used to remove Cu before transferring graphene onto SiO 2/Si substrates or carbon grids. The graphene can be made suspended over a ∼12 μm distance, indicating its good mechanical properties. Electron transport measurements show the graphene sheet resistance of ∼0.6 kΩ/□ at zero gate voltage. The mobilities of electrons and holes are ∼1800 cm 2/Vs at 4.2 K and ∼1200 cm 2/Vs at room temperature. © 2011 IEEE.

Near-ultraviolet zinc oxide nanowire sensor using low temperature hydrothermal growth.

Two near-ultraviolet (UV) sensors based on solution-grown zinc oxide (ZnO) nanowires (NWs) which are only sensitive to photo-excitation at or below 400 nm wavelength have been fabricated and characterized. Both devices keep all processing steps, including nanowire growth, under 100 °C for compatibility with a wide variety of substrates. The first device type uses a single optical lithography step process to allow simultaneous in situ horizontal NW growth from solution and creation of symmetric ohmic contacts to the nanowires. The second device type uses a two-mask optical lithography process to create asymmetric ohmic and Schottky contacts. For the symmetric ohmic contacts, at a voltage bias of 1 V across the device, we observed a 29-fold increase in current in comparison to dark current when the NWs were photo-excited by a 400 nm light-emitting diode (LED) at 0.15 mW cm(-2) with a relaxation time constant (τ) ranging from 50 to 555 s. For the asymmetric ohmic and Schottky contacts under 400 nm excitation, τ is measured between 0.5 and 1.4 s over varying time internals, which is ~2 orders of magnitude faster than the devices using symmetric ohmic contacts.

Compact three-dimensional silicon termination solutions for high voltage SOI SuperJunction

This paper demonstrates and discusses novel "three dimensional" silicon based junction isolation/termination solutions suitable for high density ultra-low-resistance Lateral Super-Junction structures. The proposed designs are both compact and effective in safely distributing the electrostatic potential away from the active device area. The designs are based on the utilization of existing layers in the device fabrication line, hence resulting in no extra complexity or cost increase. The study/demonstration is done through extensive experimental measurements and numerical simulations. © 2012 IEEE.

Low-rank optimization with trace norm penalty

The paper addresses the problem of low-rank trace norm minimization. We propose an algorithm that alternates between fixed-rank optimization and rank-one updates. The fixed-rank optimization is characterized by an efficient factorization that makes the trace norm differentiable in the search space and the computation of duality gap numerically tractable. The search space is nonlinear but is equipped with a Riemannian structure that leads to efficient computations. We present a second-order trust-region algorithm with a guaranteed quadratic rate of convergence. Overall, the proposed optimization scheme converges superlinearly to the global solution while maintaining complexity that is linear in the number of rows and columns of the matrix. To compute a set of solutions efficiently for a grid of regularization parameters we propose a predictor-corrector approach that outperforms the naive warm-restart approach on the fixed-rank quotient manifold. The performance of the proposed algorithm is illustrated on problems of low-rank matrix completion and multivariate linear regression. © 2013 Society for Industrial and Applied Mathematics.

Predictive optimisation of high-power IGBT switching under Active Voltage Control

Active Voltage Control (AVC) is an implementation of classic Proportional-Derivative (PD) control and multi-loop feedback control to force IGBT to follow a pre-set switching trajectory. The initial objective of AVC was mainly to synchronise the switching of IGBTs connected in series so as to realise voltage balancing between devices. For a single IGBT switching, the AVC reference needs further optimisation. Thus, a predictive manner of AVC reference generation is required to cope with the nonlinear IGBT switching parameters while performing low loss switching. In this paper, an improved AVC structure is adopted along with a revised reference which accommodates the IGBT nonlinearity during switching and is predictive based on current being switched. Experimental and simulation results show that close control of a single IGBT switching is realised. It is concluded that good performance can be obtained, but the proposed method needs careful stability analysis for parameter choice. © 2013 IEEE.