59 resultados para Compatible solutes


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Semiconductor nanowires have recently emerged as a new class of materials with significant potential to reveal new fundamental physics and to propel new applications in quantum electronic and optoelectronic devices. Semiconductor nanowires show exceptional promise as nanostructured materials for exploring physics in reduced dimensions and in complex geometries, as well as in one-dimensional nanowire devices. They are compatible with existing semiconductor technologies and can be tailored into unique axial and radial heterostructures. In this contribution we review the recent efforts of our international collaboration which have resulted in significant advances in the growth of exceptionally high quality IIIV nanowires and nanowire heterostructures, and major developments in understanding the electronic energy landscapes of these nanowires and the dynamics of carriers in these nanowires using photoluminescence, time-resolved photoluminescence and terahertz conductivity spectroscopy. © 2011 Elsevier Ltd. All rights reserved.

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In this paper, we demonstrate a micro-inkjet printing technique as a reproducible post-process for the deposition of carbon nanoparticles and fullerene adlayers onto fully CMOS compatible micro-electro-mechanical silicon-on-insulator infrared (IR) light sources to enhance their infrared emission. We show experimentally a significant increase in the infrared emission efficiency of the coated emitters. We numerically validate these findings with models suggesting a dominant performance increase for wavelengths <5.5 μm. Here, the bimodal size distribution in the diameter of the carbon nanoparticles, relative to the fullerenes, is an effective mediator towards topologically enhanced emittance of our miniaturised emitters. A 90% improvement in IR emission power density has been shown which we have rationalised with an increase in the mean thickness of the deposited carbon nanoparticle adlayer. © 2013 AIP Publishing LLC.

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The on-demand availability of nanomaterials with selected size and well-defined chemical/physical properties is of fundamental importance for their widespread application. We report two clean, rapid, and non-destructive approaches for nanoparticle (NP) size selection in centrifugal fields. The first exploits rate zonal separation in a high viscosity gradient. The second exploits selective sedimentation of NPs with different sizes. These methods are here applied to metallic nanoparticles (MNPs) with different compositions and surface chemistry, dispersed either in water or organic solvents. The approach is general and can also be exploited for the separation of NPs of any material. We selectively sort both Au and AgNPs with sizes in the 10-30 nm range, achieving chemical-free MNPs with low polydispersivity. We do not use solutes, thus avoiding contamination, and only require low centrifugal fields, easily achievable in benchtop systems. © 2013 American Chemical Society.

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The adoption of inclusive design approach into design practice is compatible to the needs of an ageing society. However, tools and methods that promote inclusivity during new product development are scarcely used in industry. This paper is part of a research project that investigates ways to accommodate inclusive design into the design process in industrial context. The present paper is based on the finds from the observations and interviews with industrial designers and interviews with stakeholders. The outcomes from the study supported a better understanding of the client-designer dynamic as well as the stages in the design process where information related to inclusive design could be introduced. The findings were essential to inspire the development of an inclusive design interactive technique to be used by clients and designers. © 2013 Springer-Verlag Berlin Heidelberg.

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The use of III-nitride-based light-emitting diodes (LEDs) is now widespread in applications such as indicator lamps, display panels, backlighting for liquid-crystal display TVs and computer screens, traffic lights, etc. To meet the huge market demand and lower the manufacturing cost, the LED industry is moving fast from 2 inch to 4 inch and recently to 6 inch wafer sizes. Although Al2O3 (sapphire) and SiC remain the dominant substrate materials for the epitaxy of nitride LEDs, the use of large Si substrates attracts great interest because Si wafers are readily available in large diameters at low cost. In addition, such wafers are compatible with existing processing lines for 6 inch and larger wafers commonly used in the electronics industry. During the last decade, much exciting progress has been achieved in improving the performance of GaN-on-Si devices. In this contribution, the status and prospects of III-nitride optoelectronics grown on Si substrates are reviewed. The issues involved in the growth of GaN-based LED structures on Si and possible solutions are outlined, together with a brief introduction to some novel in situ and ex situ monitoring/characterization tools, which are especially useful for the growth of GaN-on-Si structures.

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The use of large size Si substrates for epitaxy of nitride light emitting diode (LED) structures has attracted great interest because Si wafers are readily available in large diameter at low cost. In addition, such wafers are compatible with existing processing lines for the 6-inch and larger wafer sizes commonly used in the electronics industry. With the development of various methods to avoid wafer cracking and reduce the defect density, the performance of GaN-based LED and electronic devices has been greatly improved. In this paper, we review our methods of growing crack-free InGaN-GaN multiple quantum well (MQW) LED structures of high crystalline quality on Si(111) substrates. The performance of processed LED devices and its dependence on the threading dislocation density were studied. Full wafer-level LED processing using a conventional 6-inch III-V processing line is also presented, demonstrating the great advantage of using large-size Si substrates for mass production of GaN LED devices.

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We experimentally demonstrate for the first time a nanoscale resistive random access memory (RRAM) electronic device integrated with a plasmonic waveguide providing the functionality of optical readout. The device fabrication is based on silicon on insulator CMOS compatible approach of local oxidation of silicon, which enables the realization of RRAM and low optical loss channel photonic waveguide at the same fabrication step. This plasmonic device operates at telecom wavelength of 1.55 μm and can be used to optically read the logic state of a memory by measuring two distinct levels of optical transmission. The experimental characterization of the device shows optical bistable behavior between these levels of transmission in addition to well-defined hysteresis. We attribute the changes in the optical transmission to the creation of a nanoscale absorbing and scattering metallic filament in the amorphous silicon layer, where the plasmonic mode resides.

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We experimentally demonstrate an on-chip compact and simple to fabricate silicon Schottky photodetector for telecom wavelengths operating on the basis of internal photoemission process. The device is realized using CMOS compatible approach of local-oxidation of silicon, which enables the realization of the photodetector and low-loss bus photonic waveguide at the same fabrication step. The photodetector demonstrates enhanced internal responsivity of 12.5mA/W for operation wavelength of 1.55µm corresponding to an internal quantum efficiency of 1%, about two orders of magnitude higher than our previously demonstrated results [22]. We attribute this improved detection efficiency to the presence of surface roughness at the boundary between the materials forming the Schottky contact. The combination of enhanced quantum efficiency together with a simple fabrication process provides a promising platform for the realization of all silicon photodetectors and their integration with other nanophotonic and nanoplasmonic structures towards the construction of monolithic silicon opto-electronic circuitry on-chip.

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We demonstrate the switching of a silicon nitride micro ring resonator (MRR) by using digital microfluidics (DMF). Our platform allows driving micro-droplets on-chip, providing control over the effective refractive index at the vicinity of the resonator and thus facilitating the manipulation of the transmission spectrum of the MRR. The device is fabricated using a process that is compatible with high-throughput silicon fabrication techniques with buried highly doped silicon electrodes. This platform can be extended towards controlling arrays of micro optical devices using minute amounts of liquid droplets. Such an integration of DMF and optical resonators on chip can be used in variety of applications, ranging from biosensing and kinetics to tunable filtering on chip.

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This study investigates the effect of thermal cycling on the performance of concrete beams retrofitted with CARDIFRC, a new class of high performance fiber-reinforced cement-based material that is compatible with concrete. Twenty four beams were subjected to 24 h thermal cycles between 25 and 90°C. One third of the beams were reinforced either in flexure only or in flexure and shear with conventional steel reinforcement and used as control specimens. The remaining sixteen beams were retrofitted with CARDIFRC strips to provide external flexural and/or shear strengthening. All beams were exposed to a varied number of 24 h thermal cycles ranging from 0 to 90 and were tested in four-point bending at room temperature. The tests indicated that the retrofitted members were stronger and stiffer than control beams, and more importantly, that their failure initiated in flexure without any signs of interfacial delamination cracking. The results of these tests are presented and compared to analytical predictions. The predictions show good correlation with the experimental results. © 2010 ASCE.

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We demonstrate an integrated on-chip plasmonic enhanced Schottky detector for telecom wavelengths based on the internal photoemission process. This CMOS compatible device may serve as a promising alternative to the Si-Ge detectors. © 2012 OSA.

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We demonstrate an integrated on-chip plasmonic enhanced Schottky detector for telecom wavelengths based on the internal photoemission process. This CMOS compatible device may serve as a promising alternative to the Si-Ge detectors. © 2011 Optical Society of America.

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Optical technologies have received large interest in recent years for use in board-level interconnects. Polymer multimode waveguides in particular, constitute a promising technology for high-capacity optical backplanes as they can be cost-effectively integrated onto conventional printed circuit boards (PCBs). This paper presents the first optical backplane demonstrator based on the use of PCB-integrated polymer multimode waveguides and a regenerative shared bus architecture. The backplane demonstrator is formed with commercially-available low-cost electronic and photonic components onto conventional FR4 substrates and comprises two opto-electronic (OE) bus modules interconnected via a prototype regenerator unit. The system enables interconnection between the connected cards over four optical channels, each operating at 10 Gb/s. Bus extension is achieved by cascading OE bus modules via 3R regenerator units, overcoming therefore the inherent limitation of optical bus topologies in the maximum number of cards that can be connected to the bus. Details of the design, fabrication, and assembly of the different parts of this optical bus backplane are presented and related optical and data transmission characterisation studies are reported. The optical layer of the OE bus modules comprises a four-channel three-card waveguide layout that is compatible with VCSEL/PD arrays and ribbon fibres. All on-board optical paths exhibit insertion losses below 13 dB and intra-channel crosstalk lower than -29 dB. The robustness of the signal distribution from the bus inputs to all respective bus output ports in the presence of input misalignment is demonstrated, while 1 dB input alignment tolerances of approximately ±10 μm are obtained. The electrical layer of the OE bus modules comprises the essential driving circuitry for 1×4 VCSEL and PD arrays and the corresponding control and power regulation circuits. The interface between the optical and electrical layers of the bus modules is achieved with simple OE connectors that enable end-fired optical coupling into and out of the on-board polymer waveguides. The backplane demonstrator achieves error-free (BER < 10-12) 10 Gb/s data transmission over each optical channel, enabling therefore, an aggregate interconnection capacity of 40 Gb/s between any connected cards. © 1983-2012 IEEE.

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Electronic systems are a very good platform for sensing biological signals for fast point-of-care diagnostics or threat detection. One of the solutions is the lab-on-a-chip integrated circuit (IC), which is low cost and high reliability, offering the possibility for label-free detection. In recent years, similar integrated biosensors based on the conventional complementary metal oxide semiconductor (CMOS) technology have been reported. However, post-fabrication processes are essential for all classes of CMOS biochips, requiring biocompatible electrode deposition and circuit encapsulation. In this work, we present an amorphous silicon (a-Si) thin film transistor (TFT) array based sensing approach, which greatly simplifies the fabrication procedures and even decreases the cost of the biosensor. The device contains several identical sensor pixels with amplifiers to boost the sensitivity. Ring oscillator and logic circuits are also integrated to achieve different measurement methodologies, including electro-analytical methods such as amperometric and cyclic voltammetric modes. The system also supports different operational modes. For example, depending on the required detection arrangement, a sample droplet could be placed on the sensing pads or the device could be immersed into the sample solution for real time in-situ measurement. The entire system is designed and fabricated using a low temperature TFT process that is compatible to plastic substrates. No additional processing is required prior to biological measurement. A Cr/Au double layer is used for the biological-electronic interface. The success of the TFT-based system used in this work will open new avenues for flexible label-free or low-cost disposable biosensors. © 2013 Materials Research Society.