A microbeam RBS analysis of low temperature direct-write inkjet deposited copper

Quantitative microbeam Rutherford backscattering (RBS) analysis with a 1.5 MeV 4He+ beam has determined limits on the purity of copper deposited on glass with a novel inkjet process. A tetravinyl silane tetrakisCu(I) 1,1,1,5,5,5-hexafluoroacetylacetonate (TVST[Cu]hfac) complex was heated to 70 °C and jetted onto the glass substrate through a piezoelectric ceramic print head in droplets about 0.5 mm diameter. The substrate temperature was 150 °C. Solid well-formed deposits resulted which have a copper content greater than about 90% by weight. The RBS spectra were analysed objectively using the DataFurnace code, with the assumption that the deposit was CuOx, and the validity of different assumed values of x being tested. The assumptions and the errors of the analysis are critically evaluated. © 2002 Elsevier Science B.V. All rights reserved.

Low partial pressure chemical vapor deposition of graphene on copper

A systematic study of the Cu-catalyzed chemical vapor deposition of graphene under extremely low partial pressure is carried out. A carbon precursor supply of just P CH4∼ 0.009 mbar during the deposition favors the formation of large-area uniform monolayer graphene verified by Raman spectra. A diluted HNO 3 solution is used to remove Cu before transferring graphene onto SiO 2/Si substrates or carbon grids. The graphene can be made suspended over a ∼12 μm distance, indicating its good mechanical properties. Electron transport measurements show the graphene sheet resistance of ∼0.6 kΩ/□ at zero gate voltage. The mobilities of electrons and holes are ∼1800 cm 2/Vs at 4.2 K and ∼1200 cm 2/Vs at room temperature. © 2011 IEEE.

Polymer gate dielectrics with self-assembled monolayers for high-mobility organic thin-film transistors based on copper phthalocyanine

Organic thin-film transistors based on polycrystalline copper phthalocyanine (CuPc) were fabricated by using poly(vinyl alcohol) as gate dielectric. After treatment of the gate dielectric using an octadecyltrichlorosilane self-assembled monolayer, a mobility of up to 0.11 cm2/V∈s was achieved, which is comparable to that of single-crystal CuPc devices (0.1-1 cm2/V∈s). The surface morphology was analyzed and the possible reasons for the enhanced mobility are discussed. © 2009 Springer-Verlag.

Effects of silicon addition on the electrical and magnetic properties of copper-doped (La,Ca)MnO3 compounds

In this paper we report about the electrical properties of La 0.7Ca0.3MnO3 compounds substituted by copper on the manganese site and/or deliberately contaminated by SiO2 in the reactant mixture. Several phenomena have been observed and discussed. SiO2 addition leads to the formation of an apatite-like secondary phase that affects the electrical conduction through the percolation of the charge carriers. On the other hand, depending on the relative amounts of copper and silicon, the temperature dependence of the electrical resistivity can be noticeably modified: our results enable us to compare the effects of crystallographic vacancies on the A and B sites of the perovskite with the influence of the copper ions substituted on the manganese site. The most original result occurs for the compounds with a small ratio Si/Cu, which display double-peaked resistivity vs. temperature curves. © 2003 Elsevier B.V. All rights reserved.

The effect of Ln(III)/An(III) separation on TRU multi-recycling in CONFU assembly

This work examines the basic feasibility of the net-zero-balance TRU multi-recycling concept in which trivalent lanthanide fission products (Ln(III) ) are not separated from trivalent actinides (An(III)). The TRU together with Eu and Gd isotopes are recycled in a standard PWR using Combined Non-Fertile and UO2 (CONFU) assembly design. The assembly assumes a heterogeneous structure where about 20% of U02 fuel pins on the assembly periphery are replaced with Inert Matrix Fuel (IMF) pins hosting TRU, Gd, and Eu generated in the previous cycles. The 2-D neutronic analysis show potential feasibility of Ln / An recycling in PWR using CONFU assembly. Recycling of Ln reduces the fuel cycle length by about 30 effective full power days (EFPD) and TRU destruction efficiency by about 5%. Power peaking factors and reactivity feedback coefficients are close to those of CONFU assembly without Ln recycling.

III-V semiconductor nanowires for optoelectronic device applications

Semiconductor nanowires have recently emerged as a new class of materials with significant potential to reveal new fundamental physics and to propel new applications in quantum electronic and optoelectronic devices. Semiconductor nanowires show exceptional promise as nanostructured materials for exploring physics in reduced dimensions and in complex geometries, as well as in one-dimensional nanowire devices. They are compatible with existing semiconductor technologies and can be tailored into unique axial and radial heterostructures. In this contribution we review the recent efforts of our international collaboration which have resulted in significant advances in the growth of exceptionally high quality IIIV nanowires and nanowire heterostructures, and major developments in understanding the electronic energy landscapes of these nanowires and the dynamics of carriers in these nanowires using photoluminescence, time-resolved photoluminescence and terahertz conductivity spectroscopy. © 2011 Elsevier Ltd. All rights reserved.

Phase perfection in zinc Blende and Wurtzite III-V nanowires using basic growth parameters.

Controlling the crystallographic phase purity of III-V nanowires is notoriously difficult, yet this is essential for future nanowire devices. Reported methods for controlling nanowire phase require dopant addition, or a restricted choice of nanowire diameter, and only rarely yield a pure phase. Here we demonstrate that phase-perfect nanowires, of arbitrary diameter, can be achieved simply by tailoring basic growth parameters: temperature and V/III ratio. Phase purity is achieved without sacrificing important specifications of diameter and dopant levels. Pure zinc blende nanowires, free of twin defects, were achieved using a low growth temperature coupled with a high V/III ratio. Conversely, a high growth temperature coupled with a low V/III ratio produced pure wurtzite nanowires free of stacking faults. We present a comprehensive nucleation model to explain the formation of these markedly different crystal phases under these growth conditions. Critical to achieving phase purity are changes in surface energy of the nanowire side facets, which in turn are controlled by the basic growth parameters of temperature and V/III ratio. This ability to tune crystal structure between twin-free zinc blende and stacking-fault-free wurtzite not only will enhance the performance of nanowire devices but also opens new possibilities for engineering nanowire devices, without restrictions on nanowire diameters or doping.

Unexpected benefits of rapid growth rate for III-V nanowires.

In conventional planar growth of bulk III-V materials, a slow growth rate favors high crystallographic quality, optical quality, and purity of the resulting material. Surprisingly, we observe exactly the opposite effect for Au-assisted GaAs nanowire growth. By employing a rapid growth rate, the resulting nanowires are markedly less tapered, are free of planar crystallographic defects, and have very high purity with minimal intrinsic dopant incorporation. Importantly, carrier lifetimes are not adversely affected. These results reveal intriguing behavior in the growth of nanoscale materials, and represent a significant advance toward the rational growth of nanowires for device applications.