73 resultados para tri-gate transistor structure
Resumo:
This paper describes the fabrication and characterization of a carbon based, bottom gate, thin film transistor (TFT). The active layer is formed from highly sp2 bonded nitrogenated amorphous carbon (a-C:N) which is deposited at room temperature using a filtered cathodic vacuum arc technique. The TFT shows p-channel operation. The device exhibits a threshold voltage of 15 V and a field effect mobility of 10-4 cm2 V-1 s-1 . The valence band tail of a-C:N is observed to be much shallower than that of a-Si:H, but does not appear to severely impede the shift of the Fermi level. This may indicate that a significant proportion of the a-C tail states can still contribute to conduction.
Resumo:
A steady-state, physically-based analytical model for the Trench Insulated Gate Bipolar Transistor which accounts for a combined PIN diode - PNP transistor carrier dynamics is proposed. Previous models (i.e. PIN model and PNP transistor model) cannot account properly for the carrier dynamics in Trench IGBT since neither the PNP transistor nor the PIN diode effect can be neglected. An optimized Trench IGBT with a large ratio between the accumulation layer and the cell size leads to substantially improved on-state characteristics, which makes the Trench IGBT potentially the most attractive device in the area of high voltage fast switching devices.