On-chip deposition of carbon nanotubes using CMOS microhotplates.

The direct deposition of carbon nanotubes on CMOS microhotplates is demonstrated in this paper. Tungsten microhotplates, fabricated on thin SOI membranes aside CMOS control circuitry, are used to locally grow carbon nanotubes by chemical vapour deposition. Unlike bulk heating of the entire chip, which could cause degradation to CMOS devices and interconnects due to high growth temperatures in excess of 500 °C, this novel technique allows carbon nanotubes to be grown on-chip in localized regions. The microfabricated heaters are thermally isolated from the rest of the CMOS chip as they are on the membranes. This allows carbon nanotubes to be grown alongside CMOS circuitry on the same wafer without any external heating, thus enabling new applications (e.g. smart gas sensing) where the integration of CMOS and carbon nanotubes is required.

Cryogenic on-chip multiplexer for the study of quantum transport in 256 split-gate devices

We present a multiplexing scheme for the measurement of large numbers of mesoscopic devices in cryogenic systems. The multiplexer is used to contact an array of 256 split gates on a GaAs/AlGaAs heterostructure, in which each split gate can be measured individually. The low-temperature conductance of split-gate devices is governed by quantum mechanics, leading to the appearance of conductance plateaux at intervals of 2e^2/h. A fabrication-limited yield of 94% is achieved for the array, and a "quantum yield" is also defined, to account for disorder affecting the quantum behaviour of the devices. The quantum yield rose from 55% to 86% after illuminating the sample, explained by the corresponding increase in carrier density and mobility of the two-dimensional electron gas. The multiplexer is a scalable architecture, and can be extended to other forms of mesoscopic devices. It overcomes previous limits on the number of devices that can be fabricated on a single chip due to the number of electrical contacts available, without the need to alter existing experimental set ups.

Demonstration of cascaded operation of active-passive integrated 4×4 SOA switches with on-chip monitoring for power control and energy consumption optimization

Cascaded 4×4 SOA switches with on-chip power monitoring exhibit potential for lowpower 16×16 integrated switches. Cascaded operation at 10Gbit/s with an IPDR of 8.5dB and 79% lower power consumption than equivalent all-active switches is reported © 2013 OSA.

High-resolution strain sensing on steel by Silicon-On-Insulator flexural resonators fabricated with chip-level vacuum packaging

This paper reports on the fabrication and characterization of high-resolution strain sensors for steel based on Silicon On Insulator flexural resonators manufactured with chip-level LPCVD vacuum packaging. The sensors present high sensitivity (120 Hz/μ), very high resolution (4 n), low drift, and near-perfect reversibility in bending tests performed in both tensile and compressive strain regimes. © 2013 IEEE.

On-chip switching of a silicon nitride micro-ring resonator based on digital microfluidics platform.

We demonstrate the switching of a silicon nitride micro ring resonator (MRR) by using digital microfluidics (DMF). Our platform allows driving micro-droplets on-chip, providing control over the effective refractive index at the vicinity of the resonator and thus facilitating the manipulation of the transmission spectrum of the MRR. The device is fabricated using a process that is compatible with high-throughput silicon fabrication techniques with buried highly doped silicon electrodes. This platform can be extended towards controlling arrays of micro optical devices using minute amounts of liquid droplets. Such an integration of DMF and optical resonators on chip can be used in variety of applications, ranging from biosensing and kinetics to tunable filtering on chip.

Nanoscale mode selector in silicon waveguide for on chip nanofocusing applications.

We demonstrate a nanoscale mode selector supporting the propagation of the first antisymmetric mode of a silicon waveguide. The mode selector is based on embedding a short section of PhC into the waveguide. On the basis of the difference in k-vector distribution between orthogonal waveguide modes, the PhC can be designed to have a band gap for the fundamental mode, while allowing the transmission of the first antisymmetric mode. The device was tested by directly measuring the modal content before and after the PhC section using a near field scanning optical microscope. Extinction ratio was estimated to be approximately 23 dB. Finally, we provide numerical simulations demonstrating strong coupling of the antisymmetric mode to metallic nanotips. On the basis of the results, we believe that the mode selector may become an important building block in the realization of on chip nanofocusing devices.

Integration of silicon plasmonic schottky photodetector for on chip signal tapping at telecom wavelengths

We experimentally demonstrate the use of an on-chip integrated Schottky plasmonic detector for testing, monitoring and tapping signals in plasmonic and photonic devices. Theoretical model and measurement of external and integrated devices will be presented. © OSA 2013.

Integration of silicon plasmonic schottky photodetector for on chip signal tapping at telecom wavelengths

We experimentally demonstrate the use of an on-chip integrated Schottky plasmonic detector for testing, monitoring and tapping signals in plasmonic and photonic devices. Theoretical model and measurement of external and integrated devices will be presented. © OSA 2013.

Integration of silicon plasmonic schottky photodetector for on chip signal tapping at telecom wavelengths

We experimentally demonstrate the use of an on-chip integrated Schottky plasmonic detector for testing, monitoring and tapping signals in plasmonic and photonic devices. Theoretical model and measurement of external and integrated devices will be presented. © OSA 2013.

On chip plasmonic enhanced silicon Schottky detector for telecom wavelengths

We demonstrate an integrated on-chip plasmonic enhanced Schottky detector for telecom wavelengths based on the internal photoemission process. This CMOS compatible device may serve as a promising alternative to the Si-Ge detectors. © 2012 OSA.

Plasmonic nanotips for on-chip nanoscale confinement of light

We demonstrate the on-chip nanoscale focusing of surface plasmons in metallic nanotip coupled to the silicon waveguide. Strong field enhancement is observed at the apex of the tip. Enhancing light matter interactions is discussed. © 2012 OSA.

Plasmonic nanotips for on-chip focusing of light

We investigate numerically and experimentally the on-chip nanoscale focusing of surface plasmon polaritons (SPPs) in metallic nanotip coupled to the silicon waveguide. Strong field enhancement is observed at the apex of the tip. © 2011 IEEE.