Efficiency measurement of GaN-based quantum well and light-emitting diode structures grown on silicon substrates

The optical efficiency of GaN-based multiple quantum well (MQW) and light emitting diode (LED) structures grown on Si(111) substrates by metal-organic vapor phase epitaxy was measured and compared with equivalent structures on sapphire. The crystalline quality of the LED structures was comprehensively characterized using x-ray diffraction, atomic force microscopy, and plan-view transmission electron microscopy. A room temperature photoluminescence (PL) internal quantum efficiency (IQE) as high as 58% has been achieved in an InGaN/GaN MQW on Si, emitting at 460 nm. This is the highest reported PL-IQE of a c-plane GaN-based MQW on Si, and the radiative efficiency of this sample compares well with similar structures grown on sapphire. Processed LED devices on Si also show good electroluminescence (EL) performance, including a forward bias voltage of ∼3.5 V at 20 mA and a light output power of 1 mW at 45 mA from a 500 ×500 μm2 planar device without the use of any additional techniques to enhance the output coupling. The extraction efficiency of the LED devices was calculated, and the EL-IQE was then estimated to have a maximum value of 33% at a current density of 4 A cm-2, dropping to 30% at a current density of 40 A cm-2 for a planar LED device on Si emitting at 455 nm. The EL-IQE was clearly observed to increase as the structural quality of the material increased for devices on both sapphire and Si substrates. © 2011 American Institute of Physics.

Self-aligned split gate electrodes fabricated on suspended carbon nanotubes

We describe the fabrication of self-aligned split gate electrodes on suspended multiwalled carbon nanotube structures. A suspended multiwalled carbon nanotube structure was used as an evaporation mask for the deposition of metal electrodes resulting in the formation of discontinuous wire deposition. The metal deposits on the nanotubes are removed with lift-off due to the poor adhesion of metal to the nanotube surface. Using Al sacrificial layers, it was possible to fabricate self-aligned contact electrodes and control electrodes nanometers from the suspended carbon nanotubes with a single lithography step. It was also shown that the fabrication technique may also be used to form nano-gaped contact electrodes. The technique should prove useful for the fabrication of nano-electromechanical systems.

Self-aligned split gate electrodes fabricated on suspended carbon nanotubes

We describe the fabrication of self-aligned split gate electrodes on suspended multiwalled carbon nanotube structures. A suspended multiwalled carbon nanotube structure was used as an evaporation mask for the deposition of metal electrodes resulting in the formation of discontinuous wire deposition. The metal deposits on the nanotubes are removed with lift-off due to the poor adhesion of metal to the nanotube surface. Using Al sacrificial layers, it was possible to fabricate self-aligned contact electrodes and control electrodes nanometers from the suspended carbon nanotubes with a single lithography step. It was also shown that the fabrication technique may also be used to form nano-gaped contact electrodes. The technique should prove useful for the fabrication of nano-electromechanical systems. © 2003 Materials Research Society.

Advantages of top-gate, high-k dielectric carbon nanotube field-effect transistors

The subthreshold slope, transconductance, threshold voltage, and hysteresis of a carbon nanotube field-effect transistor (CNT FET) were examined as its configuration was changed from bottom-gate exposed channel, bottom-gate covered channel to top-gate FET. An individual single wall CNT was grown by chemical vapor deposition and its gate configuration was changed while determining its transistor characteristics to ensure that the measurements were not a function of different chirality or diameter CNTs. The bottom-gate exposed CNT FET utilized 900 nm SiO2 as the gate insulator. This CNT FET was then covered with TiO2 to form the bottom-gate covered channel CNT FET. Finally, the top-gate CNT FET was fabricated and the device utilized TiO 2 (K ∼ 80, equivalent oxide thickness=0.25 nm) as the gate insulator. Of the three configurations investigated, the top-gate device exhibited best subthreshold slope (67-70 mV/dec), highest transconductance (1.3 μS), and negligible hysteresis in terms of threshold voltage shift. © 2006 American Institute of Physics.