78 resultados para Network-on-chip


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This paper studies on-chip communication with non-ideal heat sinks. A channel model is proposed where the variance of the additive noise depends on the weighted sum of the past channel input powers. It is shown that, depending on the weights, the capacity can be either bounded or unbounded in the input power. A necessary condition and a sufficient condition for the capacity to be bounded are presented. © 2007 IEEE.

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This paper advocates 'reduce, reuse, recycle' as a complete energy savings strategy. While reduction has been common to date, there is growing need to emphasize reuse and recycling as well. We design a DC-DC buck converter to demonstrate the 3 techniques: reduce with low-swing and zero voltage switching (ZVS), reuse with supply stacking, and recycle with regulated delivery of excess energy to the output load. The efficiency gained from these 3 techniques helps offset the loss of operating drivers at very high switching frequencies which are needed to move the output filter completely on-chip. A prototype was fabricated in 0.18μm CMOS, operates at 660MHz, and converts 2.2V to 0.75-1.0V at ∼50mA.1 © 2008 IEEE.

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Power consumption of a multi-GHz local clock driver is reduced by returning energy stored in the clock-tree load capacitance back to the on-chip power-distribution grid. We call this type of return energy recycling. To achieve a nearly square clock waveform, the energy is transferred in a non-resonant way using an on-chip inductor in a configuration resembling a full-bridge DC-DC converter. A zero-voltage switching technique is implemented in the clock driver to reduce dynamic power loss associated with the high switching frequencies. A prototype implemented in 90 nm CMOS shows a power savings of 35% at 4 GHz. The area needed for the inductor in this new clock driver is about 6% of a local clock region. © 2006 IEEE.

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The design and manufacture of a prototype chip level power supply is described, with both simulated and experimental results. Of particular interest is the inclusion of a fully integrated on-chip LC filter. A high switching frequency of 660MHz and the design of a device drive circuit reduce losses by supply stacking, low-swing signaling and charge recycling. The paper demonstrates that a chip level converter operating at high frequency can be built and shows how this can be achieved, using zero voltage switching techniques similar to those commonly used in larger converters. Both simulations and experimental data from a fabricated circuit in 0.18μm CMOS are included. The circuit converts 2.2V to 0.75∼1.0V at ∼55mA. ©2008 IEEE.

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The first monolithically integrated 44 switch with power monitoring function using on-chip PIN photodiodes is reported. Using 10Gb/s signals, under active power control an IPDR of 12dB for a 1dB power penalty is achieved. © 2012 OSA.

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We report an on-chip integrated ferroelectric liquid crystal (FLC) waveguide structure suitable for telecommunication applications. Single gaps with different widths of 5, 10, and 20 μ m inside individual silica waveguides were filled with an FLC mixture. The waveguide devices operate as a binary switch or an attenuator in a temperature range from 30 °C to 60 °C. The FLC mixture exhibited a good alignment quality in these gaps without alignment layers. A good extinction ratio of up to 33.9 dB and a low insertion loss of <4.3 dB at λ = 1550 nm were observed. Switching times of <100 μs were obtained for the low electric fields applied in this experiment. © 2012 IEEE.

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A novel film bulk acoustic resonator (FBAR) with two resonant frequencies which have opposite reactions to temperature changes has been designed. The two resonant modes respond differently to changes in temperature and pressure, with the frequency shift being linearly correlated with temperature and pressure changes. By utilizing the FBAR's sealed back trench as a cavity, an on-chip single FBAR sensor suitable for measuring pressure and temperature simultaneously is proposed and demonstrated. The experimental results show that the pressure coefficient of frequency for the lower frequency peak of the FBAR sensors is approximately -17.4 ppm kPa-1, while that for the second peak is approximately -6.1 ppm kPa-1, both of them being much more sensitive than other existing pressure sensors. This dual mode on-chip pressure sensor is simple in structure and operation, can be fabricated at very low cost, and yet requires no specific package, therefore has great potential for applications. © 2012 IOP Publishing Ltd.

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The paper reports on the in-situ growth of zinc oxide nanowires (ZnONWs) on a complementary metal oxide semiconductor (CMOS) substrate, and their performance as a sensing element for ppm (parts per million) levels of toluene vapour in 3000 ppm humid air. Zinc oxide NWs were grown using a low temperature (only 90°C) hydrothermal method. The ZnONWs were first characterised both electrically and through scanning electron microscopy. Then the response of the on-chip ZnONWs to different concentrations of toluene (400-2600ppm) was observed in air at 300°C. Finally, their gas sensitivity was determined and found to lie between 0.1% and 0.3% per ppm. © 2013 IEEE.

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A novel temperature and pressure sensor based on a single film bulk acoustic resonator (FBAR) is designed. This FBAR support two resonant modes, which response opposite to the change of temperature. By sealed the back cavity of a back-trench membrane type FBAR with silicon wafer, an on-chip single FBAR sensor suitable for measuring temperature and pressure simultaneously is proposed. For unsealed device, the experimental results show that the first resonant mode has a temperature coefficient of frequency (TCF) of 69.5ppm/K, and the TCF of the second mode is -8.1ppm/K. After sealed the back trench, it can be used as a pressure sensor, the pressure coefficient of frequency (PCF) for the two resonant mode is -17.4ppm/kPa and -6.1 ppm/kPa respectively, both of them being more sensitive than other existing pressure sensors. © 2013 Trans Tech Publications Ltd, Switzerland.

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Side by side with the great advantages of plasmonics in nanoscale light confinement, the inevitable ohmic loss results in significant joule heating in plasmonic devices. Therefore, understanding optical-induced heat generation and heat transport in integrated on-chip plasmonic devices is of major importance. Specifically, there is a need for in situ visualization of electromagnetic induced thermal energy distribution with high spatial resolution. This paper studies the heat distribution in silicon plasmonic nanotips. Light is coupled to the plasmonic nanotips from a silicon nanowaveguide that is integrated with the tip on chip. Heat is generated by light absorption in the metal surrounding the silicon nanotip. The steady-state thermal distribution is studied numerically and measured experimentally using the approach of scanning thermal microscopy. It is shown that following the nanoscale heat generation by a 10 mW light source within a silicon photonic waveguide the temperature in the region of the nanotip is increased by ∼ 15 °C compared with the ambient temperature. Furthermore, we also perform a numerical study of the dynamics of the heat transport. Given the nanoscale dimensions of the structure, significant heating is expected to occur within the time frame of picoseconds. The capability of measuring temperature distribution of plasmonic structures at the nanoscale is shown to be a powerful tool and may be used in future applications related to thermal plasmonic applications such as control heating of liquids, thermal photovoltaic, nanochemistry, medicine, heat-assisted magnetic memories, and nanolithography.

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We experimentally demonstrate a frequency modulation locked servo loop, locked to a resonance line of an on-chip microdisk resonator in a silicon nitride platform. By using this approach, we demonstrate real-time monitoring of refractive index variations with a precision approaching 10(-7) RIU, using a moderate Q factor of 10(4). The approach can be applied for intensity independent, dynamic and precise index of refraction monitoring for biosensing applications.

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We experimentally demonstrate an on-chip compact and simple to fabricate silicon Schottky photodetector for telecom wavelengths operating on the basis of internal photoemission process. The device is realized using CMOS compatible approach of local-oxidation of silicon, which enables the realization of the photodetector and low-loss bus photonic waveguide at the same fabrication step. The photodetector demonstrates enhanced internal responsivity of 12.5mA/W for operation wavelength of 1.55µm corresponding to an internal quantum efficiency of 1%, about two orders of magnitude higher than our previously demonstrated results [22]. We attribute this improved detection efficiency to the presence of surface roughness at the boundary between the materials forming the Schottky contact. The combination of enhanced quantum efficiency together with a simple fabrication process provides a promising platform for the realization of all silicon photodetectors and their integration with other nanophotonic and nanoplasmonic structures towards the construction of monolithic silicon opto-electronic circuitry on-chip.

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The capability to focus electromagnetic energy at the nanoscale plays an important role in nanoscinece and nanotechnology. It allows enhancing light matter interactions at the nanoscale with applications related to nonlinear optics, light emission and light detection. It may also be used for enhancing resolution in microscopy, lithography and optical storage systems. Hereby we propose and experimentally demonstrate the nanoscale focusing of surface plasmons by constructing an integrated plasmonic/photonic on chip nanofocusing device in silicon platform. The device was tested directly by measuring the optical intensity along it using a near-field microscope. We found an order of magnitude enhancement of the intensity at the tip's apex. The spot size is estimated to be 50 nm. The demonstrated device may be used as a building block for "lab on a chip" systems and for enhancing light matter interactions at the apex of the tip.

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We experimentally demonstrate an on-chip nanoscale silicon surface-plasmon Schottky photodetector based on internal photoemission process and operating at telecom wavelengths. The device is fabricated using a self-aligned approach of local-oxidation of silicon (LOCOS) on silicon on insulator substrate, which provides compatibility with standard complementary metal-oxide semiconductor technology and enables the realization of the photodetector and low-loss bus photonic waveguide at the same fabrication step. Additionally, LOCOS technique allows avoiding lateral misalignment between the silicon surface and the metal layer to form a nanoscale Schottky contact. The fabricated devices showed enhanced detection capability for shorter wavelengths that is attributed to increased probability of the internal photoemission process. We found the responsivity of the nanodetector to be 0.25 and 13.3 mA/W for incident optical wavelengths of 1.55 and 1.31 μm, respectively. The presented device can be integrated with other nanophotonic and nanoplasmonic structures for the realization of monolithic opto-electronic circuitry on-chip.

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We demonstrate an integrated on-chip compact and high efficiency Schottky detector for telecom wavelengths based on silicon metal waveguide. Detection is based on the internal photoemission process. Theory and experimental results are discussed. © 2012 OSA.