Analysis of SEB and SEGR in super-junction MOSFETs

The electric field distribution in the super junction power MOSFET is analyzed using analytical modeling and numerical simulations in this paper. The single-event burn-out (SEB) and single-event gate rupture (SEGR) phenomena in this device are studied in detail. It is demonstrated that the super junction device is much less sensitive to SEB and SEGR compared to the standard power MOSFET. The physical mechanism is explained.

Dynamical behavior of damped driven coupled single electron simple harmonic oscillators

Coherent coupling between a large number of qubits is the goal for scalable approaches to solid state quantum information processing. Prototype systems can be characterized by spectroscopic techniques. Here, we use pulsed-continuous wave microwave spectroscopy to study the behavior of electrons trapped at defects within the gate dielectric of a sol-gel-based high-k silicon MOSFET. Disorder leads to a wide distribution in trap properties, allowing more than 1000 traps to be individually addressed in a single transistor within the accessible frequency domain. Their dynamical behavior is explored by pulsing the microwave excitation over a range of times comparable to the phase coherence time and the lifetime of the electron in the trap. Trap occupancy is limited to a single electron, which can be manipulated by resonant microwave excitation and the resulting change in trap occupancy is detected by the change in the channel current of the transistor. The trap behavior is described by a classical damped driven simple harmonic oscillator model, with the phase coherence, lifetime and coupling strength parameters derived from a continuous wave (CW) measurement only. For pulse times shorter than the phase coherence time, the energy exchange between traps, due to the coupling, strongly modulates the observed drain current change. This effect could be exploited for 2-qubit gate operation. The very large number of resonances observed in this system would allow a complex multi-qubit quantum mechanical circuit to be realized by this mechanism using only a single transistor.

HVIC switch for high-frequency power converters

A high voltage integrated circuit (HVIC) switch designed as a building block for power converters operating up to 13.56 MHz from off-line voltages is presented. A CMOS-compatible, 500 V power device process is used to integrate control circuitry with a high-speed MOS gate driver and high voltage lateral power MOSFET. Fabrication of the HVIC switches has proceeded in two stages. The first batch of devices showed switching times of less than 5 ns for the power switch and good high frequency performance of a level-shifter for driving half bridge converters. In the second phase, a switch that monolithically integrates all the elements required to form a complete high-frequency converter has been designed.

Spice modelling of the superjunction IGBT

This paper presents a SPICE model of the SuperJunction Insulated Gate Bipolar Transistor (SJIGBT) [1]. SPICE simulation results are in good agreement with the DESSIS simulation results under DC conditions. This model consists of an intrinsic MOSFET and a parallel combination of a wide and a narrow base pnp BJTs. A parasitic JFET is also included to account for the restricted current flow between two adjacent p-wells. In addition the JFET component also models the additional depletion region caused by the transverse junction at the upper side of the n-drift region where the current is mainly transported via majority carriers.

Comparative switching behaviour of silicon transistors and practical silicon carbide transistors

The motivation for our work is to identify a space for silicon carbide (SiC) devices in the silicon (Si) world. This paper presents a detailed experimental investigation of the switching behaviour of silicon and silicon carbide transistors (a JFET and a cascode device comprising a Si-MOSFET and a SiC-JFET). The experimental method is based on a clamped inductive load chopper circuit that puts considerable stress on the device and increases the transient power dissipation. A precise comparison of switching behaviour of Si and SiC devices on similar terms is the novelty of our work. The cascode is found to be an attractive fast switching device, capable of operating in two different configurations whose switching equivalent circuits are proposed here. The effect of limited dv/dt of the Si-MOSFET on the switching of the SiC-JFET in a cascode is also critically analysed.

700V smart trench IGBT with monolithic over-voltage and over-current protecting functions

An advanced 700V Smart Trench IGBT with monolithically integrated over-voltage and over-current protecting circuits is presented in this paper. The proposed Smart IGBT comprises a sense IGBT, a low voltage lateral n-channel MOSFET (M 1), an avalanche diode (D av), and poly-crystalline Zener diodes (ZD) and resistor (R poly). Mix-mode transient simulations with MEDICI have proven the functionalities of the protecting circuits when the device is operating under abnormal conditions, such as Unclamped Inductive Switching (UIS) and Short Circuit (SC) condition. A Trench IGBT process is used to fabricate this device with total 11 masks including one metal mask only. The characterizations of the fabricated device exhibit the clamping capability of the avalanche diode and voltage pull-down ability of the MOSFET. © 2012 IEEE.

SuperJunction IGBTS: An evolutionary step of silicon power devices with high impact potential

15 years ago the vertical SuperJunction (SJ) concept conceived for SJ power MOSFETs was the last, major breakthrough in the field of silicon power devices. Today, the SuperJunction MOSFET technologies have reached a mature stage characterized by gradual performance improvements. SuperJunction Insulated Gate Bipolar Transistors (SJ IGBTs) could interrupt this stagnation holding promise to revitalize voltage classes from 600 up to 1200 V. Such SJ IGBTs surpass by a very significant margin their SJ MOSFET counterparts both in terms of power handling capability, on-state and turn-off losses, all at the same time. On the higher end of the voltage class, SJ IGBTs would top the performance of 1.2 kV IGBTs by a similar margin. © 2012 IEEE.

Energy recycling from multigigahertz clocks using fully integrated switching converters

Large digital chips use a significant amount of energy to broadcast a low-skew, multigigahertz clock to millions of latches located throughout the chip. Every clock cycle, the large aggregate capacitance of the clock network is charged from the supply and then discharged to ground. Instead of wasting this stored energy, it is possible to recycle the energy by controlling its delivery to another part of the chip using an on-chip dc-dc converter. The clock driver and switching converter circuits share many compatible characteristics that allow them to be merged into a single design and fully integrated on-chip. Our buck converter prototype, manufactured in 90-nm CMOS, provides a proof-of-concept that clock network energy can be recycled to other parts of the chip, thus lowering overall energy consumption. It also confirms that monolithic multigigahertz switching converters utilizing zero-voltage switching can be implemented in deep-submicrometer CMOS. With multigigahertz operation, fully integrated inductors and capacitors use a small amount of chip area with low losses. Combining the clock driver with the power converter can share the large MOSFET drivers necessary as well as being energy and space efficient. We present an analysis of the losses which we confirm by experimentally comparing the merged circuit with a conventional clock driver. © 2012 IEEE.

Shaping pulse transitions by active voltage control for reduced EMI generation

High-performance power switching devices (IGBT/MOSFET) realise high-performance power converters. Unfortunately, with a high switching speed of the IGBT or MOSFET freewheel diode chopper cell, the circuit has intrinsic sources of high-level EMI. Therefore, costly EMI filters or shielding are normally demanded on the load and supply side. Although an S-shaped voltage transient with a high order of derivation eliminates the discontinuity and could suppress HF spectrum of EMI emissions, a practical control scheme is still under development. In this paper, Active Voltage Control (AVC) is applied to successfully define IGBT switching dynamics with a smoothed Gaussian waveform so a reduced EMI can be achieved without extra EMI suppression devices. © 2013 IEEE.

800V lateral IGBT in bulk Si for low power compact SMPS applications

An 800V rated lateral IGBT for high frequency, low-cost off-line applications has been developed. The LIGBT features a new method of adjusting the bipolar gain, based on a floating N+ stripe in front of the P+ anode/drain region. The floating N+ layer enhances the carrier recombination at the anode/drain side of the drift region resulting in a very significant decrease in the turn-off speed and substantially lower overall losses. Switching speeds as low as 140ns at 25oC and 300ns at 125oC have been achieved with corresponding equivalent Rdson at 125oC below 90mω.cm2. A fully operational AC-DC converter using a controller with an integrated LIGBT+depletion mode MOSFET chip has been designed and qualified in plastic SOP8 packages and used in 5W, 65kHz SMPS applications. The device is fabricated in 0.6μm bulk silicon CMOS technology without any additional masking steps. © 2013 IEEE.

Progress in the understanding of Ni silicide formation for advanced MOS structures

Metallic silicides have been used as contact materials on source/drain and gate in metal-oxide semiconductor (MOS) structure for 40 years. Since the 65 nm technology node, NiSi is the preferred material for contact in microelectronic due to low resistivity, low thermal budget, and low Si consumption. Ni(Pt)Si with 10 at.% Pt is currently employed in recent technologies since Pt allows to stabilize NiSi at high temperature. The presence of Pt and the very low thickness (<10 nm) needed for the device contacts bring new concerns for actual devices. In this work, in situ techniques [X-ray diffraction (XRD), X-ray reflectivity (XRR), sheet resistance, differential scanning calorimetry (DSC)] were combined with atom probe tomography (APT) to study the formation mechanisms as well as the redistribution of dopants and alloy elements (Pt, Pd.) during the silicide formation. Phenomena like nucleation, lateral growth, interfacial reaction, diffusion, precipitation, and transient phase formation are investigated. The effect of alloy elements (Pt, Pd.) and dopants (As, B.) as well as stress and defects induced by the confinement in devices on the silicide formation mechanism and alloying element redistribution is examined. In particular APT has been performed for the three-dimensional (3D) analysis of MOSFET at the atomic scale. The advances in the understanding of the mechanisms of formation and redistribution are discussed. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.