Partial soi power LDMOS with a variable low-kappa; Dielectric buried layer and a buried P layer

A power LDMOS on partial silicon on insulator (PSOI) with a variable low-κ dielectric (VLKD) buried layer and a buried p (BP) layer is proposed (VLKD BPSOI). At a low κ value, the electric field strength in the buried dielectric (EI) is enhanced, and a Si window makes the substrate share the vertical voltage drop, leading to a high vertical breakdown voltage (BV). Moreover, three interface field peaks are introduced by the BP, the Si window, and the VLKD, which modulate the fields in the SOI layer, the VLKD layer, and the substrate; consequently, a high BV is obtained. Furthermore, the BP reduces the specific on-resistance (Ron), and the Si window alleviates the self-heating effect (SHE). The BV for VLKD BPSOI is enhanced by 34.5%, and Ron is decreased by 26.6%, compared with those for the conventional PSOI, and VLKD BPSOI also maintains a low SHE. © 2006 IEEE.

Low loss HF band SOI wine glass bulk mode capacitive square-plate resonator

This paper reports on the design and electrical characterization of a single crystal silicon micromechanical square-plate resonator. The microresonator has been excited in the anti-symmetrical wine glass mode at a resonant frequency of 5.166 MHz and exhibits an impressive quality factor (Q) of 3.7 × 106 at a pressure of 33 mtorr. The device has been fabricated in a commercial foundry process. An associated motional resistance of approximately 50 kΩ using a dc bias voltage of 60 V is measured for a transduction gap of 2 νm due to the ultra-high Q of the resonator. This result corresponds to a frequency-Q product of 1.9 × 1013, the highest reported for a fundamental mode single-crystal silicon resonator and on par with some of the best quartz crystal resonators. The results are indicative of the superior performance of silicon as a mechanical material, and show that the wine glass resonant mode is beneficial for achieving high quality factors allowed by the material limit. © 2009 IOP Publishing Ltd.

A fully integrated 660 MHz low-swing energy-recycling DC-DC converter

A fully integrated 0.18 μm DC-DC buck converter using a low-swing "stacked driver" configuration is reported in this paper. A high switching frequency of 660 MHz reduces filter components to fit on chip, but this suffers from high switching losses. These losses are reduced using: 1) low-swing drivers; 2) supply stacking; and 3) introducing a charge transfer path to deliver excess charge from the positive metal-oxide semiconductor drive chain to the load, thereby recycling the charge. The working prototype circuit converts 2.2 to 0.75-1.0 V at 40-55 mA. Design and simulation of an improved circuit is also included that further improves the efficiency by enhancing the charge recycling path, providing automated zero voltage switching (ZVS) operation, and synchronizing the half-swing gating signals. © 2009 IEEE.

Real-time experimental demonstration of low-cost VCSEL intensity-modulated 11.25 Gb/s optical OFDM signal transmission over 25 km PON systems.

The feasibility of utilising low-cost, un-cooled vertical cavity surface-emitting lasers (VCSELs) as intensity modulators in real-time optical OFDM (OOFDM) transceivers is experimentally explored, for the first time, in terms of achievable signal bit rates, physical mechanisms limiting the transceiver performance and performance robustness. End-to-end real-time transmission of 11.25 Gb/s 64-QAM-encoded OOFDM signals over simple intensity modulation and direct detection, 25 km SSMF PON systems is experimentally demonstrated with a power penalty of 0.5 dB. The low extinction ratio of the VCSEL intensity-modulated OOFDM signal is identified to be the dominant factor determining the maximum obtainable transmission performance. Experimental investigations indicate that, in addition to the enhanced transceiver performance, adaptive power loading can also significantly improve the system performance robustness to variations in VCSEL operating conditions. As a direct result, the aforementioned capacity versus reach performance is still retained over a wide VCSEL bias (driving) current (voltage) range of 4.5 mA to 9 mA (275 mVpp to 320 mVpp). This work is of great value as it demonstrates the possibility of future mass production of cost-effective OOFDM transceivers for PON applications.

Metastability mechanisms in thin film transistors quantitatively resolved using post-stress relaxation of threshold voltage

A new approach is presented to resolve bias-induced metastability mechanisms in hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs). The post stress relaxation of threshold voltage (V(T)) was employed to quantitatively distinguish between the charge trapping process in gate dielectric and defect state creation in active layer of transistor. The kinetics of the charge de-trapping from the SiN traps is analytically modeled and a Gaussian distribution of gap states is extracted for the SiN. Indeed, the relaxation in V(T) is in good agreement with the theory underlying the kinetics of charge de-trapping from gate dielectric. For the TFTs used in this work, the charge trapping in the SiN gate dielectric is shown to be the dominant metastability mechanism even at bias stress levels as low as 10 V.

Dual gate photo-thin film transistor with high photoconductive gain for high reliability, and low noise flat panel transparent imager

In this presentation, we report excellent electrical and optical characteristics of a dual gate photo thin film transistor (TFT) with bi-layer oxide channel, which was designed to provide virgin threshold voltage (V T) control, improve the negative bias illumination temperature stress (NBITS) reliability, and offer high photoconductive gain. In order to address the photo-sensitivity of phototransistor for the incoming light, top transparent InZnO (IZO) gate was employed, which enables the independent gate control of dual gate photo-TFT without having any degradation of its photosensitivity. Considering optimum initial V T and NBITS reliability for the device operation, the top gate bias was judiciously chosen. In addition, the speed and noise performance of the photo-TFT is competitive with silicon photo-transistors, and more importantly, its superiority lies in optical transparency. © 2011 IEEE.

Low partial pressure chemical vapor deposition of graphene on copper

A systematic study of the Cu-catalyzed chemical vapor deposition of graphene under extremely low partial pressure is carried out. A carbon precursor supply of just P CH4∼ 0.009 mbar during the deposition favors the formation of large-area uniform monolayer graphene verified by Raman spectra. A diluted HNO 3 solution is used to remove Cu before transferring graphene onto SiO 2/Si substrates or carbon grids. The graphene can be made suspended over a ∼12 μm distance, indicating its good mechanical properties. Electron transport measurements show the graphene sheet resistance of ∼0.6 kΩ/□ at zero gate voltage. The mobilities of electrons and holes are ∼1800 cm 2/Vs at 4.2 K and ∼1200 cm 2/Vs at room temperature. © 2011 IEEE.

Near-ultraviolet zinc oxide nanowire sensor using low temperature hydrothermal growth.

Two near-ultraviolet (UV) sensors based on solution-grown zinc oxide (ZnO) nanowires (NWs) which are only sensitive to photo-excitation at or below 400 nm wavelength have been fabricated and characterized. Both devices keep all processing steps, including nanowire growth, under 100 °C for compatibility with a wide variety of substrates. The first device type uses a single optical lithography step process to allow simultaneous in situ horizontal NW growth from solution and creation of symmetric ohmic contacts to the nanowires. The second device type uses a two-mask optical lithography process to create asymmetric ohmic and Schottky contacts. For the symmetric ohmic contacts, at a voltage bias of 1 V across the device, we observed a 29-fold increase in current in comparison to dark current when the NWs were photo-excited by a 400 nm light-emitting diode (LED) at 0.15 mW cm(-2) with a relaxation time constant (τ) ranging from 50 to 555 s. For the asymmetric ohmic and Schottky contacts under 400 nm excitation, τ is measured between 0.5 and 1.4 s over varying time internals, which is ~2 orders of magnitude faster than the devices using symmetric ohmic contacts.

Compact three-dimensional silicon termination solutions for high voltage SOI SuperJunction

This paper demonstrates and discusses novel "three dimensional" silicon based junction isolation/termination solutions suitable for high density ultra-low-resistance Lateral Super-Junction structures. The proposed designs are both compact and effective in safely distributing the electrostatic potential away from the active device area. The designs are based on the utilization of existing layers in the device fabrication line, hence resulting in no extra complexity or cost increase. The study/demonstration is done through extensive experimental measurements and numerical simulations. © 2012 IEEE.

Predictive optimisation of high-power IGBT switching under Active Voltage Control

Active Voltage Control (AVC) is an implementation of classic Proportional-Derivative (PD) control and multi-loop feedback control to force IGBT to follow a pre-set switching trajectory. The initial objective of AVC was mainly to synchronise the switching of IGBTs connected in series so as to realise voltage balancing between devices. For a single IGBT switching, the AVC reference needs further optimisation. Thus, a predictive manner of AVC reference generation is required to cope with the nonlinear IGBT switching parameters while performing low loss switching. In this paper, an improved AVC structure is adopted along with a revised reference which accommodates the IGBT nonlinearity during switching and is predictive based on current being switched. Experimental and simulation results show that close control of a single IGBT switching is realised. It is concluded that good performance can be obtained, but the proposed method needs careful stability analysis for parameter choice. © 2013 IEEE.