352 resultados para Quantum Gate


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The growth techniques which have enabled the realization of InGaN-based multi-quantum-well (MQW) structures with high internal quantum efficiencies (IQE) on 150mm (6-in.) silicon substrates are reviewed. InGaN/GaN MQWs are deposited onto GaN templates on large-area (111) silicon substrates, using AlGaN strain-mediating interlayers to inhibit thermal-induced cracking and wafer-bowing, and using a SiN x interlayer to reduce threading dislocation densities in the active region of the MQW structure. MQWs with high IQE approaching 60% have been demonstrated. Atomic resolution electron microscopy and EELS analysis have been used to study the nature of the important interface between the Si(111) substrate and the AlN nucleation layer. We demonstrate an amorphous SiN x interlayer at the interface about 2nm wide, which does not, however, prevent good epitaxy of the AlN on the Si(111) substrate. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

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A steady-state, physically-based analytical model for the Trench Insulated Gate Bipolar Transistor which accounts for a combined PIN diode - PNP transistor carrier dynamics is proposed. Previous models (i.e. PIN model and PNP transistor model) cannot account properly for the carrier dynamics in Trench IGBT since neither the PNP transistor nor the PIN diode effect can be neglected. An optimized Trench IGBT with a large ratio between the accumulation layer and the cell size leads to substantially improved on-state characteristics, which makes the Trench IGBT potentially the most attractive device in the area of high voltage fast switching devices.

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This paper presents an improvement of an IGBT gate drive implementing Active Voltage Control (AVC), and investigates the impact of various parameters affecting its performance. The effects of the bandwidths of various elements and the gains of AVC are shown in simulation and experimentally. Also, the paper proposes connecting a small Active Snubber between the IGBT collector and its gate integrated within the AVC. The effect of this snubber on enhancing the stability of the gate drive is demonstrated. It will be shown that using a wide bandwidth operational amplifier and integrating the Active Snubber within the gate drive reduces the minimum gate resistor required to achieve stability of the controller. Consequently, the response time of the IGBT to control signals is significantly reduced, the switching losses then can be minimised and, hence, the performance of gate drive as whole is improved. This reflects positively on turn-off and turn-on transitions achieving voltage sharing between the IGBTs connected in series to construct a higher voltage switch, making series IGBTs a feasible practice. ©2008 IEEE.

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The design and manufacture of a prototype chip level power supply is described, with both simulated and experimental results. Of particular interest is the inclusion of a fully integrated on-chip LC filter. A high switching frequency of 660MHz and the design of a device drive circuit reduce losses by supply stacking, low-swing signaling and charge recycling. The paper demonstrates that a chip level converter operating at high frequency can be built and shows how this can be achieved, using zero voltage switching techniques similar to those commonly used in larger converters. Both simulations and experimental data from a fabricated circuit in 0.18μm CMOS are included. The circuit converts 2.2V to 0.75∼1.0V at ∼55mA. ©2008 IEEE.

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A low specific on-resistance (R-{{\rm on}, {\rm sp}}) integrable silicon-on-insulator (SOI) MOSFET is proposed, and its mechanism is investigated by simulation. The SOI MOSFET features double trenches and dual gates (DTDG SOI): an oxide trench in the drift region, a buried gate inset in the oxide trench, and another trench gate (TG) extended to a buried oxide layer. First, the dual gates form dual conduction channels, and the extended gate widens the vertical conduction area; both of which sharply reduce R-{{\rm on}, {\rm sp}}. Second, the oxide trench folds the drift region in the vertical direction, resulting in a reduced device pitch and R-{{\rm on}, {\rm sp}}. Third, the oxide trench causes multidirectional depletion. This not only enhances the reduced surface field effect and thus reshapes the electric field distribution but also increases the drift doping concentration, leading to a reduced R-{{\rm on}, {\rm sp}} and an improved breakdown voltage (BV). Compared with a conventional SOI lateral Double-diffused metal oxide semiconductor (LDMOS), the DTDG MOSFET increases BV from 39 to 92 V at the same cell pitch or decreases R-{{\rm on}, { \rm sp}} by 77% at the same BV by simulation. Finally, the TG extended synchronously acts as an isolation trench between the high/low-voltage regions in a high-voltage integrated circuit, saving the chip area and simplifying the isolation process. © 2006 IEEE.

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Ultrashort superradiant pulse generation from a 1580 nm AlGaInAs multiple quantum-well (MQW) semiconductor structure has been experimentally demonstrated for the first time. Superradiance is confirmed by analyzing the evolution of the optical temporal waveforms and spectra. Superradiant trends and regimes are studied as a function of driving condition. An optical pulse train is obtained at 1580 nm wavelength, with pulse durations as short as 390 fs and pulse peak powers of 7.2 W.

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This paper presents a comprehensive theoretical study of the Trench Insulated Gate Bipolar Transistors (TIGBT). Specific physical and geometrical effects, such as the accumulation layer injection, increased channel density, increased channel charge and transversal electric field modulation are discussed. The potential advantages of the Trench IGBT over its conventional planar variant are highlighted. It is concluded that the Trench IGBT is one of the most promising structures in the area of high voltage MOS-controllable switching devices.

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In this presentation, we report excellent electrical and optical characteristics of a dual gate photo thin film transistor (TFT) with bi-layer oxide channel, which was designed to provide virgin threshold voltage (V T) control, improve the negative bias illumination temperature stress (NBITS) reliability, and offer high photoconductive gain. In order to address the photo-sensitivity of phototransistor for the incoming light, top transparent InZnO (IZO) gate was employed, which enables the independent gate control of dual gate photo-TFT without having any degradation of its photosensitivity. Considering optimum initial V T and NBITS reliability for the device operation, the top gate bias was judiciously chosen. In addition, the speed and noise performance of the photo-TFT is competitive with silicon photo-transistors, and more importantly, its superiority lies in optical transparency. © 2011 IEEE.

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Trapped electrons, located close to the channel of a transistor, are promising as data storage elements in non-classical information processing. Cryogenic microwave spectroscopy has shown that these electrons give rise to high quality factor resonances in the drain current and a post excitation dynamic behaviour that is related to the system lifetime. Using a floating poly-silicon gate transistor, single shot spectroscopy is performed to characterise the dynamic behaviour during excitation. This behaviour is seen to be dominated by the decay of the transient component, which gives rise to oscillations around the high quality factor resonance. © 2012 American Institute of Physics.

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In this paper we propose novel designs that enhance the plasma concentration across the Field Stop IGBT. The "p-ring" and the "point-injection" type devices exhibit increased cathode side conductivity modulation which results in impressive IGBT performance improvement. These designs are shown to be extremely effective in lowering the on-state losses without compromising the switching performance or the breakdown rating. For the same switching losses we can achieve more than 20% reduction of the on state energy losses compared to the conventional FS IGBT. © 2012 IEEE.