Growth of carbon nanotubes on fully processed silicon-on-insulator CMOS substrates.

This paper describes the growth of Carbon Nanotubes (CNTs) both aligned and non-aligned on fully processed CMOS substrates containing high temperature tungsten metallization. While the growth method has been demonstrated in fabricating CNT gas sensitive layers for high temperatures SOI CMOS sensors, it can be employed in a variety of applications which require the use of CNTs or other nanomaterials with CMOS electronics. In our experiments we have grown CNTs both on SOI CMOS substrates and SOI CMOS microhotplates (suspended on membranes formed by post-CMOS deep RIE etching). The fully processed SOI substrates contain CMOS devices and circuits and additionally, some wafers contained high current LDMOSFETs and bipolar structures such as Lateral Insulated Gate Bipolar Transistors. All these devices were used as test structures to investigate the effect of additional post-CMOS processing such as CNT growth, membrane formation, high temperature annealing, etc. Electrical characterisation of the devices with CNTs were performed along with SEM and Raman spectroscopy. The CNTs were grown both at low and high temperatures, the former being compatible with Aluminium metallization while the latter being possible through the use of the high temperature CMOS metallization (Tungsten). In both cases we have found that there is no change in the electrical behaviour of the CMOS devices, circuits or the high current devices. A slight degradation of the thermal performance of the CMOS microhotplates was observed due to the extra heat dissipation path created by the CNT layers, but this is expected as CNTs exhibit a high thermal conductance. In addition we also observed that in the case of high temperature CNT growth a slight degradation in the manufacturing yield was observed. This is especially the case where large area membranes with a diameter in excess of 500 microns are used.

Effect of size, morphology and crystallinity of seed crystal on the nucleation and growth of single grain Y-Ba-Cu-O

The effect of size, morphology and crystallinity of seed crystals on the nucleation and growth of large grain Y-Ba-Cu-O (YBCO) bulk superconductors fabricated by top seeded melt growth (TSMG) has been investigated. Seeding bulk samples with small, square shaped seed crystals leads to point nucleation and growth of the superconducting YBa2Cu3O7-y (Y-123) phase that exhibits the usual square habitual growth symmetry. The use of triangular and circular shaped seed crystals, however, modifies significantly the growth habit geometry of the grain. The use of large area seeds both increases the rate of epitaxial nucleation of the Y-123 phase and produces relatively large crystals in the incongruent melt, which decreases significantly the processing times of large grain samples. The present study is relevant to decrease processing times of samples with both preferred or no growth sectors and for multiple seeding of large grain samples which contain clean grain boundaries. © 2005 Published by Elsevier Ltd.

Growth and characterization of carbon nanotubes for field-emission-display applications

This paper will report on the production, dimensional control, and characterization of arrays of cold-cathode field emitters based on multiwall carbon nanotubes, suitable for use in large-area field-emission-based displays.

High-efficiency InGaN/GaN quantum well structures on large area silicon substrates

The growth techniques which have enabled the realization of InGaN-based multi-quantum-well (MQW) structures with high internal quantum efficiencies (IQE) on 150mm (6-in.) silicon substrates are reviewed. InGaN/GaN MQWs are deposited onto GaN templates on large-area (111) silicon substrates, using AlGaN strain-mediating interlayers to inhibit thermal-induced cracking and wafer-bowing, and using a SiN x interlayer to reduce threading dislocation densities in the active region of the MQW structure. MQWs with high IQE approaching 60% have been demonstrated. Atomic resolution electron microscopy and EELS analysis have been used to study the nature of the important interface between the Si(111) substrate and the AlN nucleation layer. We demonstrate an amorphous SiN x interlayer at the interface about 2nm wide, which does not, however, prevent good epitaxy of the AlN on the Si(111) substrate. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Growth of ultrahigh density single-walled carbon nanotube forests by improved catalyst design.

We have grown vertically aligned single-walled carbon nanotube forests with an area density of 1.5 × 10(13) cm(-2), the highest yet achieved, by reducing the average diameter of the nanotubes. We use a nanolaminate Fe-Al(2)O(3) catalyst design consisting of three layers of Al(2)O(3), Fe, and Al(2)O(3), in which the lower Al(2)O(3) layer is densified by an oxygen plasma treatment to increase its diffusion barrier properties, to allow a thinner catalyst layer to be used. This high nanotube density is desirable for using carbon nanotubes as interconnects in integrated circuits.

Controlled growth orientation of carbon nanotube pillars by catalyst patterning in microtrenches

We present a novel method for controlling the growth orientation of individual carbon nanotube (CNT) microstructures on a silicon wafer substrate. Our method controls the CNT forest orientation by patterning the catalyst layer used in the CNTs growth on slanted KOH edges. The overlap of catalyst area on the horizontal bottom and sloped sidewall surfaces of the KOH-etched substrate enables precise variation of the growth direction. These inclined structures can profit from the outstanding mechanical, electrical, thermal, and optical properties of CNTs and can therefore improve the performance of several MEMS devices. Inclined CNT microstructures could for instance be used as cantilever springs in probe card arrays, as tips in dip-pen lithography, and as sensing element in advanced transducers. ©2009 IEEE.

Failure and formation of axial nanowire heterostructures in vapor-liquid-solid growth

To observe the axial growth behavior of InAs on GaAs nanowires, InAs was grown for different growth durations on GaAs nanowires using Au nanoparticles. Through transmission electron microscopy, we have observed the following evolution steps for the InAs growth. (1) In the initial stages of the InAs growth, InAs clusters into a wedge shape preferentially at an edge of the Au/GaAs interface by minimizing Au/InAs interfacial area; (2) with further growth of InAs, the Au particle moves sidewards and then downwards by preserving an interface with GaAs nanowire sidewalls. The lower interfacial energy of Au/GaAs than that of Au/In As is attributed to be the reason for such Au movement. This downward movement of the Au nanoparticle later terminates when the nanoparticle encounters InAs growing radially on the GaAs nanowire sidewalls, and with further supply of In and As vapor reactants, the Au nanoparticle assists the formation of InAs branches. These observations give some insights into vapor-liquid-solid growth and the formation of kinks in nanowire heterostructures. © 2008 Materials Research Society.

In-Situ grown carbon nanotubes for enhanced CO2 detection in non-dispersive-infra-red system

Non-dispersive-infra-red (NDIR) sensors are believed to be one of the most selective and robust solutions for CO2 detection, though cost prohibits their broader integration. In this paper we propose a commercially viable silicon-on-insulator (SOI) complementary metal-oxide (CMOS) micro-electro-mechanical (MEMS) technology for an IR thermal emitter. For the first time, vertically aligned multi walled carbon nanotubes (VA-MWCNTs) are suggested as a possible coating for the enhancement of the emission intensity of the optical source of a NDIR system. VA-MWCNTs have been grown in situ by chemical vapour deposition (CVD) exclusively on the heater area. Optical microscopy, scanning electron microscopy and Raman spectroscopy have been used to verify the quality of the VA-MWCNTs growth. The CNT-coated emitter demonstrated an increased response to CO2 of approx. 60%. Furthermore, we show that the VA-MWCNTs are stable up to temperatures of 500°C for up to 100 hours. © 2013 IEEE.

Growth mechanism of graphene on platinum: Surface catalysis and carbon segregation

A model of the graphene growth mechanism of chemical vapor deposition on platinum is proposed and verified by experiments. Surface catalysis and carbon segregation occur, respectively, at high and low temperatures in the process, representing the so-called balance and segregation regimes. Catalysis leads to self-limiting formation of large area monolayer graphene, whereas segregation results in multilayers, which evidently "grow from below." By controlling kinetic factors, dominantly monolayer graphene whose high quality has been confirmed by quantum Hall measurement can be deposited on platinum with hydrogen-rich environment, quench cooling, tiny but continuous methane flow and about 1000°C growth temperature. © 2014 AIP Publishing LLC.

Increased carbon nanotube area density after catalyst generation from cobalt disilicide using a cyclic reactive ion etching approach

We used a cyclic reactive ion etching (RIE) process to increase the Co catalyst density on a cobalt disilicide (CoSi2) substrate for carbon nanotube (CNT) growth. Each cycle of catalyst formation consists of a room temperature RIE step and an annealing step at 450 °C. The RIE step transfers the top-surface of CoSi2 into cobalt fluoride; while the annealing reduces the fluoride into metallic Co nanoparticles. We have optimized this cyclic RIE process and determined that the catalyst density can be doubled in three cycles, resulting in a final CNT shell density of 6.6 × 10 11 walls·cm-2. This work demonstrates a very effective approach to increase the CNT density grown directly on silicides. © 2014 AIP Publishing LLC.

High performance transistors based on the controlled growth of triisopropylsilylethynyl-pentacene crystals via non-isotropic solvent evaporation

Triisopropylsilylethynyl-pentacene (TIPS-PEN) has proven to be one of the most promising small molecules in the field of molecular electronics, due to its unique features in terms of stability, performance and ease of processing. Among a wide variety of well-established techniques for the deposition of TIPS-PEN, blade-metered methods have recently gained great interest towards the formation of uniform crystalline films over a large area. Following this rationale, we herein designed a versatile approach based on blade-coating, which overcomes the problem of anisotropic crystal formation by manipulating the solvent evaporation behaviour, in a way that brings about a preferential degree of crystal orientation. The applicability of this method was evaluated by fabricating field-effect transistors on glass as well as on silicon dioxide/silicon (SiO2/Si) substrates. Interestingly, in an attempt to improve the rheological and wetting behaviour of the liquid films on the SiO2/Si substrates, we introduced a polymeric interlayer of polystyrene (PS) or polymethylmethacrylate (PMMA) which concurrently acts as passivation and crystallization assisting layer. In this case, the synergistic effects of the highly-ordered crystalline structure and the oxide surface modification were thoroughly investigated. The overall performance of the fabricated devices revealed excellent electrical characteristics, with high saturation mobilities up to 0.72 cm2 V-1 s-1 (on glass with polymeric dielectric), on/off current ratio >104 and low threshold voltage values (<-5 V). This journal is © the Partner Organisations 2014.