78 resultados para network-on-chip


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We investigate numerically and experimentally the on-chip nanoscale focusing of surface plasmon polaritons (SPPs) in metallic nanotip coupled to the silicon waveguide. Strong field enhancement is observed at the apex of the tip. © 2011 IEEE.

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We present a numerical simulations, fabrication and experimental results for on-chip focusing of surface plasmon polaritons (SPPs) in metal nanotip coupled to the silicon waveguide © 2011 OSA.

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We demonstrate the on-chip nanoscale focusing of surface plasmons in metallic nanotip coupled to the silicon waveguide. Strong field enhancement is observed at the apex of the tip. Enhancing light matter interactions is discussed. © 2011 Optical Society of America.

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We demonstrate an integrated on-chip plasmonic enhanced Schottky detector for telecom wavelengths based on the internal photoemission process. This CMOS compatible device may serve as a promising alternative to the Si-Ge detectors. © 2011 Optical Society of America.

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We present a numerical simulations, fabrication and experimental results for on-chip focusing of surface plasmon polaritons (SPPs) in metal nanotip coupled to the silicon waveguide. © 2011 Optical Society of America.

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We demonstrate the tunability of a silicon nitride micro-resonator using the concept of Digital Microfluidics. Our system allows driving micro-droplets on-chip, enabling the control of the effective refractive index at the vicinity of the resonator. © 2010 OSA/FiO/LS 2010.

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We investigate numerically and experimentally the on-chip nanoscale focusing of surface plasmon polaritons (SPPs) in metallic nanotip coupled to the silicon waveguide. Strong field enhancement is observed at the apex of the tip. © 2010 Optical Society of America.

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Planar plasmonic devices are becoming attractive for myriad applications, owing to their potential compatibility with standard microelectronics technology and the capability for densely integrating a large variety of plasmonic devices on a chip. Mitigating the challenges of using plasmonics in on-chip configurations requires precise control over the properties of plasmonic modes, in particular their shape and size. Here we achieve this goal by demonstrating a planar plasmonic graded-index lens focusing surface plasmons propagating along the device. The plasmonic mode is manipulated by carving subwavelength features into a dielectric layer positioned on top of a uniform metal film, allowing the local effective index of the plasmonic mode to be controlled using a single binary lithographic step. Focusing and divergence of surface plasmons is demonstrated experimentally. The demonstrated approach can be used for manipulating the propagation of surface plasmons, e.g., for beam steering, splitting, cloaking, mode matching, and beam shaping applications.

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Large digital chips use a significant amount of energy to distribute a multi-GHz clock. By discharging the clock network to ground every cycle, the energy stored in this large capacitor is wasted. Instead, the energy can be recovered using an on-chip DC-DC converter. This paper investigates the integration of two DC-DC converter topologies, boost and buck-boost, with a high-speed clock driver. The high operating frequency significantly shrinks the required size of the L and C components so they can be placed on-chip; typical converters place them off-chip. The clock driver and DC-DC converter are able to share the entire tapered buffer chain, including the widest drive transistors in the final stage. To achieve voltage regulation, the clock duty cycle must be modulated; implying only single-edge-triggered flops should be used. However, this minor drawback is eclipsed by the benefits: by recovering energy from the clock, the output power can actually exceed the additional power needed to operate the converter circuitry, resulting in an effective efficiency greater than 100%. Furthermore, the converter output can be used to operate additional power-saving features like low-voltage islands or body bias voltages. ©2008 IEEE.

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Aluminum nitride (AlN) piezoelectric thin films with c-axis crystal orientation on polymer substrates can potentially be used for development of flexible electronics and lab-on-chip systems. In this study, we investigated the effects of deposition parameters on the crystal structure of AlN thin films on polymer substrates deposited by reactive direct-current magnetron sputtering. The results show that low sputtering pressure as well as optimized N 2/Ar flow ratio and sputtering power is beneficial for AlN (002) orientation and can produce a highly (002) oriented columnar structure on polymer substrates. High sputtering power and low N 2/Ar flow ratio increase the deposition rate. In addition, the thickness of Al underlayer also has a strong influence on the film crystallography. The optimal deposition parameters in our experiments are: deposition pressure 0.38 Pa, N 2/Ar flow ratio 2:3, sputtering power 414 W, and thickness of Al underlayer less than 100 nm. © 2012 Elsevier B.V. All rights reserved.

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Large digital chips use a significant amount of energy to broadcast a low-skew, multigigahertz clock to millions of latches located throughout the chip. Every clock cycle, the large aggregate capacitance of the clock network is charged from the supply and then discharged to ground. Instead of wasting this stored energy, it is possible to recycle the energy by controlling its delivery to another part of the chip using an on-chip dc-dc converter. The clock driver and switching converter circuits share many compatible characteristics that allow them to be merged into a single design and fully integrated on-chip. Our buck converter prototype, manufactured in 90-nm CMOS, provides a proof-of-concept that clock network energy can be recycled to other parts of the chip, thus lowering overall energy consumption. It also confirms that monolithic multigigahertz switching converters utilizing zero-voltage switching can be implemented in deep-submicrometer CMOS. With multigigahertz operation, fully integrated inductors and capacitors use a small amount of chip area with low losses. Combining the clock driver with the power converter can share the large MOSFET drivers necessary as well as being energy and space efficient. We present an analysis of the losses which we confirm by experimentally comparing the merged circuit with a conventional clock driver. © 2012 IEEE.

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This paper describes a new generation of integrated solid-state gas-sensors embedded in SOI micro-hotplates. The micro-hotplates lie on a SOI membrane and consist of MOSFET heaters that elevate the operating temperature, through self-heating, of a gas sensitive material. These sensors are fully compatible with SOI CMOS or BiCMOS technologies, offer ultra-low power consumption (under 100 mW), high sensitivity, low noise, low unit cost, reproducibility and reliability through the use of on-chip integration. In addition, the new integrated sensors offer a nearly uniform temperature distribution over the active area at its operating temperatures at up to about 300-350°C. This makes SOI-based gas-sensing devices particularly attractive for use in handheld battery-operated gas monitors. This paper reports on the design of a chemo-resistive gas sensor and proposes for the first time an intelligent SOI membrane microcalorimeter using active micro-FET heaters and temperature sensors. A comprehensive set of numerical and analogue simulations is also presented including complex 2D and 3D electro-thermal numerical analyses. © 2001 Elsevier Science B.V. All rights reserved.

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Capacitive parasitic feedthrough is an impediment that is inherent to all electrically interfaced micron scale resonant devices, resulting in increased challenges to their integration in more complex circuits, particularly as devices are scaled to operate at higher frequencies for RF applications. In this paper, a technique to cancel the undesirable effects of capacitive feedthrough that was previously proposed is here developed for an on-chip implementation. The method reported in this paper benefits from the simplicity of its implementation, and its effectiveness is demonstrated in this paper. This technique is demonstrated for two disk-plate resonators that have been excited in the wine glass mode at 5.4 MHz, though applicable to almost any electrically interfaced resonator. Measurements of the electrical transmission from these resonators show that the magnitude of the frequency response of the system is enhanced by up to 19 dB, while the phase is found to shift through a full 180° about the resonant frequency. This method is proposed as a useful addition to other techniques for enhancing the measured response of electrostatic micromechanical resonators. © 2009 Elsevier B.V. All rights reserved.

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A fully integrated 0.18 μm DC-DC buck converter using a low-swing "stacked driver" configuration is reported in this paper. A high switching frequency of 660 MHz reduces filter components to fit on chip, but this suffers from high switching losses. These losses are reduced using: 1) low-swing drivers; 2) supply stacking; and 3) introducing a charge transfer path to deliver excess charge from the positive metal-oxide semiconductor drive chain to the load, thereby recycling the charge. The working prototype circuit converts 2.2 to 0.75-1.0 V at 40-55 mA. Design and simulation of an improved circuit is also included that further improves the efficiency by enhancing the charge recycling path, providing automated zero voltage switching (ZVS) operation, and synchronizing the half-swing gating signals. © 2009 IEEE.