20 resultados para intel processor


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A lattice Boltzmann method is used to model gas-solid reactions where the composition of both the gas and solid phase changes with time, while the boundary between phases remains fixed. The flow of the bulk gas phase is treated using a multiple relaxation time MRT D3Q19 model; the dilute reactant is treated as a passive scalar using a single relaxation time BGK D3Q7 model with distinct inter- and intraparticle diffusivities. A first-order reaction is incorporated by modifying the method of Sullivan et al. [13] to include the conversion of a solid reactant. The detailed computational model is able to capture the multiscale physics encountered in reactor systems. Specifically, the model reproduced steady state analytical solutions for the reaction of a porous catalyst sphere (pore scale) and empirical solutions for mass transfer to the surface of a sphere at Re=10 (particle scale). Excellent quantitative agreement between the model and experiments for the transient reduction of a single, porous sphere of Fe 2O 3 to Fe 3O 4 in CO at 1023K and 10 5Pa is demonstrated. Model solutions for the reduction of a packed bed of Fe 2O 3 (reactor scale) at identical conditions approached those of experiments after 25 s, but required prohibitively long processor times. The presented lattice Boltzmann model resolved successfully mass transport at the pore, particle and reactor scales and highlights the relevance of LB methods for modelling convection, diffusion and reaction physics. © 2012 Elsevier Inc.

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This paper presents a heterogeneous reconfigurable system for real-time applications applying particle filters. The system consists of an FPGA and a multi-threaded CPU. We propose a method to adapt the number of particles dynamically and utilise the run-time reconfigurability of the FPGA for reduced power and energy consumption. An application is developed which involves simultaneous mobile robot localisation and people tracking. It shows that the proposed adaptive particle filter can reduce up to 99% of computation time. Using run-time reconfiguration, we achieve 34% reduction in idle power and save 26-34% of system energy. Our proposed system is up to 7.39 times faster and 3.65 times more energy efficient than the Intel Xeon X5650 CPU with 12 threads, and 1.3 times faster and 2.13 times more energy efficient than an NVIDIA Tesla C2070 GPU. © 2013 Springer-Verlag.

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A field programmable gate array (FPGA)-based predictive controller for a spacecraft rendezvous manoeuvre is presented. A linear time varying prediction model is used to accommodate elliptical orbits, and a variable prediction horizon is used to facilitate finite time completion of manoeuvres. The resulting constrained optimisation problems are solved using a primal dual interior point algorithm. The majority of the computational demand is in solving a set of linear equations at each iteration of this algorithm. To accelerate this operation, a custom circuit is implemented, using a combination of Mathworks HDL Coder and Xilinx System Generator for DSP, and used as a peripheral to a MicroBlaze soft core processor. The system is demonstrated in closed loop by linking the FPGA with a simulation of the plant dynamics running in Simulink on a PC, using Ethernet. © 2013 EUCA.

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Copyright © 2014 John Wiley & Sons, Ltd. Copyright © 2014 John Wiley & Sons, Ltd. Summary A field programmable gate array (FPGA) based model predictive controller for two phases of spacecraft rendezvous is presented. Linear time-varying prediction models are used to accommodate elliptical orbits, and a variable prediction horizon is used to facilitate finite time completion of the longer range manoeuvres, whilst a fixed and receding prediction horizon is used for fine-grained tracking at close range. The resulting constrained optimisation problems are solved using a primal-dual interior point algorithm. The majority of the computational demand is in solving a system of simultaneous linear equations at each iteration of this algorithm. To accelerate these operations, a custom circuit is implemented, using a combination of Mathworks HDL Coder and Xilinx System Generator for DSP, and used as a peripheral to a MicroBlaze soft-core processor on the FPGA, on which the remainder of the system is implemented. Certain logic that can be hard-coded for fixed sized problems is implemented to be configurable online, in order to accommodate the varying problem sizes associated with the variable prediction horizon. The system is demonstrated in closed-loop by linking the FPGA with a simulation of the spacecraft dynamics running in Simulink on a PC, using Ethernet. Timing comparisons indicate that the custom implementation is substantially faster than pure embedded software-based interior point methods running on the same MicroBlaze and could be competitive with a pure custom hardware implementation.