23 resultados para complementary logic
Resumo:
Air stable complementary polymer inverters were demonstrated by inkjet printing of both top-gate electrodes and the semiconductors in ambient conditions. The p-type and n-type polymer semiconductors were also thermally annealed in ambient conditions after printing. The good performance of circuits in ambient condition shows that the transistors are not only air-stable in term of ambient humidity and oxygen, but also inert to ion migration through dielectrics from the printed gate. The result obtained here has further confirmed the feasibility of fabrication of low-cost polymer complementary circuits in a practical environment. © 2011 Elsevier B.V. All rights reserved.
Resumo:
We have for the first time developed a self-aligned metal catalyst formation process using fully CMOS (complementary metal-oxide-semiconductor) compatible materials and techniques, for the synthesis of aligned carbon nanotubes (CNTs). By employing an electrically conductive cobalt disilicide (CoSi 2) layer as the starting material, a reactive ion etch (RIE) treatment and a hydrogen reduction step are used to transform the CoSi 2 surface into cobalt (Co) nanoparticles that are active to catalyze aligned CNT growth. Ohmic contacts between the conductive substrate and the CNTs are obtained. The process developed in this study can be applied to form metal nanoparticles in regions that cannot be patterned using conventional catalyst deposition methods, for example at the bottom of deep holes or on vertical surfaces. This catalyst formation method is crucially important for the fabrication of vertical and horizontal interconnect devices based on CNTs. © 2012 American Institute of Physics.
Resumo:
Recent development of solution processable organic semiconductors delineates the emergence of a new generation of air-stable, high performance p- and n-type materials. This makes it indeed possible for printed organic complementary circuits (CMOS) to be used in real applications. The main technical bottleneck for organic CMOS to be adopted as the next generation organic integrated circuit is how to deposit and pattern both p- and n-type semiconductor materials with high resolutions at the same time. It represents a significant technical challenge, especially if it can be done for multiple layers without mask alignment. In this paper, we propose a one-step self-aligned fabrication process which allows the deposition and high resolution patterning of functional layers for both p- and n-channel thin film transistors (TFTs) simultaneously. All the dimensional information of the device components is featured on a single imprinting stamp, and the TFT-channel geometry, electrodes with different work functions, p- and n-type semiconductors and effective gate dimensions can all be accurately defined by one-step imprinting and the subsequent pattern transfer process. As an example, we have demonstrated an organic complementary inverter fabricated by 3D imprinting in combination with inkjet printing and the measured electrical characteristics have validated the feasibility of the novel technique. © 2012 Elsevier B.V. All rights reserved.
Resumo:
Carbon nanotube (CNT) based nano electromechanical system (NEMS) were developed to apply to the logic and the memory circuit. The electrical 'on-off' behavior induced by the mechanical movements of CNTs can promise low power consumption in circuit with very low level leakage current. Additionally, the unique vertical structure of nanotubes allows high integration density for devices. © 2012 IEEE.
Resumo:
This paper introduces a novel method for the training of a complementary acoustic model with respect to set of given acoustic models. The method is based upon an extension of the Minimum Phone Error (MPE) criterion and aims at producing a model that makes complementary phone errors to those already trained. The technique is therefore called Complementary Phone Error (CPE) training. The method is evaluated using an Arabic large vocabulary continuous speech recognition task. Reductions in word error rate (WER) after combination with a CPE-trained system were obtained with up to 0.7% absolute for a system trained on 172 hours of acoustic data and up to 0.2% absolute for the final system trained on nearly 2000 hours of Arabic data.
Resumo:
Electronic systems are a very good platform for sensing biological signals for fast point-of-care diagnostics or threat detection. One of the solutions is the lab-on-a-chip integrated circuit (IC), which is low cost and high reliability, offering the possibility for label-free detection. In recent years, similar integrated biosensors based on the conventional complementary metal oxide semiconductor (CMOS) technology have been reported. However, post-fabrication processes are essential for all classes of CMOS biochips, requiring biocompatible electrode deposition and circuit encapsulation. In this work, we present an amorphous silicon (a-Si) thin film transistor (TFT) array based sensing approach, which greatly simplifies the fabrication procedures and even decreases the cost of the biosensor. The device contains several identical sensor pixels with amplifiers to boost the sensitivity. Ring oscillator and logic circuits are also integrated to achieve different measurement methodologies, including electro-analytical methods such as amperometric and cyclic voltammetric modes. The system also supports different operational modes. For example, depending on the required detection arrangement, a sample droplet could be placed on the sensing pads or the device could be immersed into the sample solution for real time in-situ measurement. The entire system is designed and fabricated using a low temperature TFT process that is compatible to plastic substrates. No additional processing is required prior to biological measurement. A Cr/Au double layer is used for the biological-electronic interface. The success of the TFT-based system used in this work will open new avenues for flexible label-free or low-cost disposable biosensors. © 2013 Materials Research Society.