45 resultados para Thin cell layer
Substrate-assisted nucleation of ultra-thin dielectric layers on graphene by atomic layer deposition
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We report on a large improvement in the wetting of Al 2O 3 thin films grown by un-seeded atomic layer deposition on monolayer graphene, without creating point defects. This enhanced wetting is achieved by greatly increasing the nucleation density through the use of polar traps induced on the graphene surface by an underlying metallic substrate. The resulting Al 2O 3/graphene stack is then transferred to SiO 2 by standard methods. © 2012 American Institute of Physics.
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Multiple color states have been realized in single unit cell using double electrochromic (EC) reaction. The precise control of bistability in EC compounds which can maintain several colors on the two separated electrodes allows this new type of pixel to be realized. The specific electrical driving gives a way to maintain both sides in the reduced EC states and this colors overlapping in the vertical view direction can achieve the black state. The four color states (G, B, W, BK) in one cell/pixel can make a valuable progress to achieve a high quality color devices such like electronic paper, outdoor billboard, smart window and flexible display using external light source. © 2012 Optical Society of America.
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The performance of polymer-fullerene bulk heterojunction (BHJ) solar cells is strongly dependent on the vertical distribution of the donor and acceptor regions within the BHJ layer. In this work, we investigate in detail the effect of the hole transport layer (HTL) physical properties and the thermal annealing on the BHJ morphology and the solar cell performance. For this purpose, we have prepared solar cells with four distinct formulations of poly(3,4- ethylenedioxythiophene) poly(styrenesulfonate) (PEDOT:PSS) buffer layers. The samples were subjected to thermal annealing, applied either before (pre-annealing) or after (post-annealing) the cathode metal deposition. The effect of the HTL and the annealing process on the BHJ ingredient distribution - namely, poly(3-hexylthiophene) (P3HT) and [6,6]-phenyl C61 butyric acid methyl ester (PCBM) - has been studied by spectroscopic ellipsometry and atomic force microscopy. The results revealed P3HT segregation at the top region of the films, which had a detrimental effect on all pre-annealed devices, whereas PCBM was found to accumulate at the bottom interface. This demixing process depends on the PEDOT:PSS surface energy; the more hydrophilic the surface the more profound is the vertical phase separation within the BHJ. At the same time those samples suffer from high recombination losses as evident from the analysis of the J-V measurements obtained in the dark. Our results underline the significant effect of the HTL-active and active-ETL (electron transport layer) interfacial composition that should be taken into account during the optimization of all polymer-fullerene solar cells. © 2012 The Royal Society of Chemistry.
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This paper considers plasma-enhanced chemical vapor deposited (PECVD) silicon nitride (SiNx) and silicon oxide (SiOx) as gate dielectrics for organic thin-film transistors (OTFTs), with solution-processed poly[5, 5′ -bis(3-dodecyl-2-thienyl)-2, 2′ -bithiophene] (PQT-12) as the active semiconductor layer. We examine transistors with SiNx films of varying composition deposited at 300 °C as well as 150 °C for plastic compatibility. The transistors show over 100% (two times) improvement in field-effect mobility as the silicon content in SiNx increases, with mobility (μFE) up to 0.14 cm2 /V s and on/off current ratio (ION / IOFF) of 108. With PECVD SiOx gate dielectric, preliminary devices exhibit a μFE of 0.4 cm2 /V s and ION / IOFF of 108. PQT-12 OTFTs with PECVD SiNx and SiOx gate dielectrics on flexible plastic substrates are also presented. These results demonstrate the viability of using PECVD SiN x and SiOx as gate dielectrics for OTFT circuit integration, where the low temperature and large area deposition capabilities of PECVD films are highly amenable to integration of OTFT circuits targeted for flexible and lightweight applications. © 2008 American Institute of Physics.
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A cross-sectional transmission electron microscope study of the low density layers at the surface and at the substrate-film interface of tetrahedral amorphous carbon (ta-C) films grown on (001) silicon substrates is presented. Spatially resolved electron energy loss spectroscopy is used to determine the bonding and composition of a tetrahedral amorphous carbon film with nanometre spatial resolution. For a ta-C film grown with a substrate bias of -300 V, an interfacial region approximately 5 nm wide is present in which the carbon is sp2 bonded and is mixed with silicon and oxygen from the substrate. An sp2 bonded layer observed at the surface of the film is 1.3 ± 0.3 nm thick and contains no detectable impurities. It is argued that the sp2 bonded surface layer is intrinsic to the growth process, but that the sp2 bonding in the interfacial layer at the substrate may be related to the presence of oxygen from the substrate.
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We report here the patterning of primary rat neurons and astrocytes from the postnatal hippocampus on ultra-thin parylene-C deposited on a silicon dioxide substrate, following observations of neuronal, astrocytic and nuclear coverage on strips of different lengths, widths and thicknesses. Neuronal and glial growth was characterized 'on', 'adjacent to' and 'away from' the parylene strips. In addition, the article reports how the same material combination can be used to isolate single cells along thin tracks of parylene-C. This is demonstrated with a series of high magnification images of the experimental observations for varying parylene strip widths and thicknesses. Thus, the findings demonstrate the possibility to culture cells on ultra-thin layers of parylene-C and localize single cells on thin strips. Such work is of interest and significance to the Neuroengineering and Multi-Electrode Array (MEA) communities, as it provides an alternative insulating material in the fabrication of embedded micro-electrodes, which can be used to facilitate single cell stimulation and recording in capacitive coupling mode. © 2010 Elsevier Ltd.
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Tetrahedrally bonded amorphous carbon (ta-C) is a new type of semiconducting thin film material. It can be produced at room temperature using the Filtered Cathodic Vacuum Arc technique. The as-grown undoped ta-C is p-type in nature but it can be n-doped by the addition of nitrogen during deposition. This paper will describe thin film transistor design and fabrication using ta-C as the active channel layer.
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This paper describes the fabrication and characterization of a carbon based, bottom gate, thin film transistor (TFT). The active layer is formed from highly sp2 bonded nitrogenated amorphous carbon (a-C:N) which is deposited at room temperature using a filtered cathodic vacuum arc technique. The TFT shows p-channel operation. The device exhibits a threshold voltage of 15 V and a field effect mobility of 10-4 cm2 V-1 s-1 . The valence band tail of a-C:N is observed to be much shallower than that of a-Si:H, but does not appear to severely impede the shift of the Fermi level. This may indicate that a significant proportion of the a-C tail states can still contribute to conduction.
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This paper describes the effect of the state of the inlet boundary layer (laminar or turbulent) on the structure of the endwall flow on two different profiles of low-pressure (LP) turbine blades (solid thin and hollow thick). At present the state of the endwall boundary layer at the inlet of a real LP turbine is not known. The intention of this paper is to show that, for different designs of LP turbine, the state of the inlet boundary layer affects the performance of the blade in very different ways. The testing was completed at low speed in a linear cascade using area traversing, flow visualization and static pressure measurements. The paper shows that, for a laminar inlet boundary layer, the two profiles have a similar loss distribution and structure of endwall flow. However, for a turbulent inlet boundary layer the two profiles are shown to differ significantly in both the total loss and endwall flow structure. The pressure side separation bubble on the solid thin profile is shown to interact with the passage vortex, causing a higher endwall loss than that measured on the hollow thick profile.
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The Rolls-Royce Integrated-Planar Solid Oxide Fuel Cell (IP-SOFC) consists of ceramic modules which have electrochemical cells printed on the outer surfaces. The cathodes are the outermost layer of each cell and are supplied with oxygen from air flowing over the outside of the module. The anodes are in direct contact with the ceramic structure and are supplied with fuel from internal gas channels. Natural gas is reformed into hydrogen for use by the fuel cells in a separate reformer module of similar design except that the fuel cells are replaced by a reforming catalyst layer. The performance of the modules is intrinsically linked to the behaviour of the gas flows within their porous structures. Because the porous layers are very thin, a one-dimensional flow model provides a good representation of the flow property variations between fuel channel and fuel cell or reforming catalyst. The multi-component convective-diffusive flows are simulated using a new theory of flow in porous material, the Cylindrical Pore Interpolation Model. The effects of the catalysed methane reforming and water-gas shift chemical reactions are also considered using appropriate kinetic models. It is found that the shift reaction, which is catalysed by the anode material, has certain beneficial effects on the fuel cell module performance. In the reformer module it was found that the flow resistance of the porous support structure makes it difficult to sustain a high methane conversion rate. Although the analysis is based on IP-SOFC geometry, the modelling approach and general conclusions are applicable to other types of SOFC.
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Thin film transistors (TFTs) utilizing an hydrogenated amorphous silicon (a-Si:H) channel layer exhibit a shift in the threshold voltage with time under the application of a gate bias voltage due to the creation of metastable defects. These defects are removed by annealing the device with zero gate bias applied. The defect removal process can be characterized by a thermalization energy which is, in turn, dependent upon an attempt-to-escape frequency for defect removal. The threshold voltage of both hydrogenated and deuterated amorphous silicon (a-Si:D) TFTs has been measured as a function of annealing time and temperature. Using a molecular dynamics simulation of hydrogen and deuterium in a silicon network in the H2 * configuration, it is shown that the experimental results are consistent with an attempt-to-escape frequency of (4.4 ± 0.3) × 1013 Hz and (5.7 ± 0.3) × 1013 Hz for a-Si:H and a-Si:D respectively which is attributed to the oscillation of the Si-H and Si-D bonds. Using this approach, it becomes possible to describe defect removal in hydrogenated and deuterated material by the thermalization energies of (1.552 ± 0.003) eV and (1.559 ± 0.003) eV respectively. This correlates with the energy per atom of the Si-H and Si-D bonds. © 2006 Elsevier B.V. All rights reserved.
Resumo:
CMOS nanocrystalline silicon thin film transistors with high field effect mobility are reported. The transistors were directly deposited by radio-frequency plasma enhanced chemical vapor deposition at 150°C The transistors show maximum field effect mobility of 450 cm2/V-s for electrons and 100 cm2/V-s for holes at room temperature. We attribute the high mobilities to a reduction of the oxygen content, which acts as an accidental donor. Indeed, secondary ion mass spectrometry measurements show that the impurity concentration in the nanocrystalline Si layer is comparable to, or lower than, the defect density in the material, which is already low thanks to hydrogen passivation.