Evidence of quantum lateral confinement in side-gated resonant tunnelling diodes formed by patterned substrate regrowth

MBE regrowth on patterned np-GaAs wafers has been used to fabricate GaAs/AlGaAs double barrier resonant tunnel diodes with a side-gate in the plane of the quantum well. The physical diameters vary from 1 to 20 μm. For a nominally 1 μm diameter diode the peak current is reduced by more than 95% at a side-gate voltage of -2 V at 1.5 K, which we estimate corresponds to an active tunnel region diameter of 75 nm ± 10 nm. At high gate biases additional structure appears in the conductance data. Differential I-V measurements show a linear dependence of the spacing of subsidiary peaks on gate bias indicating lateral quantum confinement. © 1996 American Institute of Physics.

High tuning range AlSi RF MEMS capacitors fabricated with sacrificial amorphous silicon surface micromachining

This paper reports the fabrication and electrical characterization of high tuning range AlSi RF MEMS capacitors. We present experimental results obtained by a surface micromachining process that uses dry etching of sacrificial amorphous silicon to release Al-1%Si membranes and has a low thermal budget (<450 °C) being compatible with CMOS post-processing. The proposed silicon sacrificial layer dry etching (SSLDE) process is able to provide very high Si etch rates (3-15 μm/min, depending on process parameters) with high Si: SiO2 selectivity (>10,000:1). Single- and double-air-gap MEMS capacitors, as well as some dedicated test structures needed to calibrate the electro-mechanical parameters and explore the reliability of the proposed technology, have been fabricated with the new process. S-parameter measurements from 100 MHz up to 2 GHz have shown a capacitance tuning range higher than 100% with the double-air-gap architecture. The tuning range can be enlarged with a proper DC electrical bias of the capacitor electrodes. Finally, the reported results make the proposed MEMS tuneable capacitor a good candidate for above-IC integration in communications applications. © 2004 Elsevier B.V. All rights reserved.

First human hNT neurons patterned on parylene-C/silicon dioxide substrates: Combining an accessible cell line and robust patterning technology for the study of the pathological adult human brain

In this communication, we describe a new method which has enabled the first patterning of human neurons (derived from the human teratocarcinoma cell line (hNT)) on parylene-C/silicon dioxide substrates. We reveal the details of the nanofabrication processes, cell differentiation and culturing protocols necessary to successfully pattern hNT neurons which are each key aspects of this new method. The benefits in patterning human neurons on silicon chip using an accessible cell line and robust patterning technology are of widespread value. Thus, using a combined technology such as this will facilitate the detailed study of the pathological human brain at both the single cell and network level. © 2010 Elsevier B.V.

Efficiency measurement of GaN-based quantum well and light-emitting diode structures grown on silicon substrates

The optical efficiency of GaN-based multiple quantum well (MQW) and light emitting diode (LED) structures grown on Si(111) substrates by metal-organic vapor phase epitaxy was measured and compared with equivalent structures on sapphire. The crystalline quality of the LED structures was comprehensively characterized using x-ray diffraction, atomic force microscopy, and plan-view transmission electron microscopy. A room temperature photoluminescence (PL) internal quantum efficiency (IQE) as high as 58% has been achieved in an InGaN/GaN MQW on Si, emitting at 460 nm. This is the highest reported PL-IQE of a c-plane GaN-based MQW on Si, and the radiative efficiency of this sample compares well with similar structures grown on sapphire. Processed LED devices on Si also show good electroluminescence (EL) performance, including a forward bias voltage of ∼3.5 V at 20 mA and a light output power of 1 mW at 45 mA from a 500 ×500 μm2 planar device without the use of any additional techniques to enhance the output coupling. The extraction efficiency of the LED devices was calculated, and the EL-IQE was then estimated to have a maximum value of 33% at a current density of 4 A cm-2, dropping to 30% at a current density of 40 A cm-2 for a planar LED device on Si emitting at 455 nm. The EL-IQE was clearly observed to increase as the structural quality of the material increased for devices on both sapphire and Si substrates. © 2011 American Institute of Physics.

Assembly and inspection of liquid crystal on silicon devices

Liquid crystal on silicon (LCOS) is one of the most exciting technologies, combining the optical modulation characteristics of liquid crystals with the power and compactness of a silicon backplane. The objective of our work is to improve cell assembly and inspection methods by introducing new equipment for automated assembly and by using an optical inspection microscope. A Suss-Micro'Tec Universal device bonder is used for precision assembly and device packaging and an Olympus BX51 high resolution microscope is employed for device inspection. ©2009 Optical Society of America.

Low-temperature (≤600 °C) semi-insulating oxygen-doped silicon films by the PECVD technique for large-area power applications

This work describes the deposition, annealing and characterisation of semi-insulating oxygen-doped silicon films at temperatures compatible with polysilicon circuitry on glass. The semi-insulating layers are deposited by the plasma enhanced chemical vapour deposition technique from silane (SiH4), nitrous oxide (N2O) and helium (He) gas mixtures at a temperature of 350 °C. The as-deposited films are then furnace annealed at 600 °C which is the maximum process temperature. Raman analysis shows the as-deposited and annealed films to be completely amorphous. The most important deposition variable is the N2O SiH4 gas ratio. By varying the N2O SiH4 ratio the conductivity of the annealed films can be accurately controlled, for the first time, down to a minimum of ≈10-7Ω-1cm-1 where they exhibit a T -1 4 temperature dependence indicative of a hopping conduction mechanism. Helium dilution of the reactant gases is shown to improve both film uniformity and reproducibility. A model for the microstructure of these semi-insulating amorphous oxygen-doped silicon films is proposed to explain the observed physical and electrical properties. © 1995.

Low temperature (≤ 600°C) semi-insulating oxygen-doped silicon films by the PECVD technique for large area power applications

This work describes the annealing and characterisation of semi-insulating oxygen-doped silicon films deposited by the Plasma Enhanced Chemical Vapour Deposition (PECVD) technique from silane (SiH4), nitrous oxide (N2O) and helium (He) gas mixtures. The maximum process temperature is chosen to be compatible with large area polycrystalline silicon (poly-Si) circuitry on glass. The most important deposition variable is shown to be the N2O SiH4 gas ratio. Helium dilution results in improved film uniformity and reproducibility. Raman analysis shows the 'as-deposited' and annealed films to be completely amorphous. A model for the microstructure of these Semi-Insulating Amorphous Oxygen-doped Silicon (SIAOS) films is proposed to explain the observed physical and electrical properties. © 1995.

Amorphous carbon-silicon alloys prepared by a high plasma density source

The addition of silicon to hydrogenated amorphous carbon can have the advantageous effect of lowering the compressive stress, improving the thermal stability of its hydrogen and maintaining a low friction coefficient up to high humidity. Most experiments to date have been on a-C1-xSix:H alloys deposited by RF plasma enhanced chemical vapour deposition (PECVD). This method gives alloys with considerable hydrogen content and only moderate hardness. Here, we use a high plasma density source, the electron cyclotron wave resonance (ECWR) source, to prepare films with a high deposition rate. The composition and bonding in the alloys is determined by XPS, visible and UV Raman and FTIR spectroscopy. We find that it is possible to produce hard, low stress, low friction, almost humidity insensitive a-C1-xSix:H alloys with a good optical transparency and a band gap over 2 eV.

Properties of amorphous carbon-silicon alloys deposited by a high plasma density source

The addition of silicon to hydrogenated amorphous carbon can have the advantageous effect of lowering the compressive stress, improving the thermal stability of its hydrogen, and maintaining a low friction coefficient up to high humidity. Most experiments to date have been on hydrogenated amorphous carbon-silicon alloys (a-C1-xSix:H) deposited by rf plasma enhanced chemical vapor deposition. This method gives alloys with sizeable hydrogen content and only moderate hardness. Here we use a high plasma density source known as the electron cyclotron wave resonance source to prepare films with higher sp3 content and lower hydrogen content. The composition and bonding in the alloys is determined by x-ray photoelectron spectroscopy, Rutherford backscattering, elastic recoil detection analysis, visible and ultraviolet (UV) Raman spectroscopy, infrared spectroscopy, and x-ray reflectivity. We find that it is possible to produce relatively hard, low stress, low friction, almost humidity insensitive a-C1-xSix:H alloys with a good optical transparency and a band gap well over 2.5 eV. The friction behavior and friction mechanism of these alloys are studied and compared with that of a-C:H, ta-C:H, and ta-C. We show how UV Raman spectroscopy allows the direct detection of Si-C, Si-Hx, and C-Hx vibrations, not seen in visible Raman spectra. © 2001 American Institute of Physics.

High quality assembly of phase-only liquid crystal on silicon ((LCOS) devices

Liquid crystal on silicon (LCOS) for phase-only holography is ideally made to better optical tolerance than that for conventional amplitude modulating applications. Die-level assembly is suited to custom devices and pre-production prototypes because of its flexibility and efficiency in conserving the silicon backplane. Combined with automated assembly, it will allow high reproducibility and fast turnaround time, paving the way for pre-production testing and customer sampling before mass production. Pre-assembly optical testing is the key element in the process. By taking into account the flatness of both the backplane and the front glass plate, we have assembled high quality LCOS devices. We have reached our aim of less than one quarter wavelength phase distortion across the active area. © 2011 IEEE.

Isolating single primary rat hippocampal neurons and astrocytes on ultra-thin patterned parylene-C/silicon dioxide substrates

We report here the patterning of primary rat neurons and astrocytes from the postnatal hippocampus on ultra-thin parylene-C deposited on a silicon dioxide substrate, following observations of neuronal, astrocytic and nuclear coverage on strips of different lengths, widths and thicknesses. Neuronal and glial growth was characterized 'on', 'adjacent to' and 'away from' the parylene strips. In addition, the article reports how the same material combination can be used to isolate single cells along thin tracks of parylene-C. This is demonstrated with a series of high magnification images of the experimental observations for varying parylene strip widths and thicknesses. Thus, the findings demonstrate the possibility to culture cells on ultra-thin layers of parylene-C and localize single cells on thin strips. Such work is of interest and significance to the Neuroengineering and Multi-Electrode Array (MEA) communities, as it provides an alternative insulating material in the fabrication of embedded micro-electrodes, which can be used to facilitate single cell stimulation and recording in capacitive coupling mode. © 2010 Elsevier Ltd.