Post-CMOS wafer level growth of carbon nanotubes for low-cost microsensors--a proof of concept.

Here we demonstrate a novel technique to grow carbon nanotubes (CNTs) on addressable localized areas, at wafer level, on a fully processed CMOS substrate. The CNTs were grown using tungsten micro-heaters (local growth technique) at elevated temperature on wafer scale by connecting adjacent micro-heaters through metal tracks in the scribe lane. The electrical and optical characterization show that the CNTs are identical and reproducible. We believe this wafer level integration of CNTs with CMOS circuitry enables the low-cost mass production of CNT sensors, such as chemical sensors.

Post-processing of vertical-cavity surface-emitting lasers for transverse mode and polarization control

The operation on how high quality single-mode operation can be readily attained on etching circles in multimode devices is discussed. Arrays of such spots can also be envisaged. Control of the polarization state is also achieved by use of deep line etches. The output filaments and beam shapes of the conventional multimode vertical cavity surface emitting lasers (VCSEL) is shown to be engineered in terms of their positions, widths, and polarizations by use of focused ion beam etching (FIBE). Several GaAs quantum well top-emitting devices with cavity diameters of 10 μm and 18 μm were investigated.

Mode control in vertical-cavity surface-emitting lasers by post-processing using focused ion-beaih etching

Single-mode emission is achieved in previously multimode gain-guided vertical-cavity surface-emitting lasers (VCSEL's) by localized modification of the mirror reflectivity using focused ion-beam etching. Reflectivity engineering is also demonstrated to suppress transverse mode emission in an oxide-confined device, reducing the spectral width from 1.2 nm to less than 0.5 nm.

The post-processed Galerkin method applied to non-linear shell vibrations

We present the results of a computational study of the post-processed Galerkin methods put forward by Garcia-Archilla et al. applied to the non-linear von Karman equations governing the dynamic response of a thin cylindrical panel periodically forced by a transverse point load. We spatially discretize the shell using finite differences to produce a large system of ordinary differential equations (ODEs). By analogy with spectral non-linear Galerkin methods we split this large system into a 'slowly' contracting subsystem and a 'quickly' contracting subsystem. We then compare the accuracy and efficiency of (i) ignoring the dynamics of the 'quick' system (analogous to a traditional spectral Galerkin truncation and sometimes referred to as 'subspace dynamics' in the finite element community when applied to numerical eigenvectors), (ii) slaving the dynamics of the quick system to the slow system during numerical integration (analogous to a non-linear Galerkin method), and (iii) ignoring the influence of the dynamics of the quick system on the evolution of the slow system until we require some output, when we 'lift' the variables from the slow system to the quick using the same slaving rule as in (ii). This corresponds to the post-processing of Garcia-Archilla et al. We find that method (iii) produces essentially the same accuracy as method (ii) but requires only the computational power of method (i) and is thus more efficient than either. In contrast with spectral methods, this type of finite-difference technique can be applied to irregularly shaped domains. We feel that post-processing of this form is a valuable method that can be implemented in computational schemes for a wide variety of partial differential equations (PDEs) of practical importance.

Metastability mechanisms in thin film transistors quantitatively resolved using post-stress relaxation of threshold voltage

A new approach is presented to resolve bias-induced metastability mechanisms in hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs). The post stress relaxation of threshold voltage (V(T)) was employed to quantitatively distinguish between the charge trapping process in gate dielectric and defect state creation in active layer of transistor. The kinetics of the charge de-trapping from the SiN traps is analytically modeled and a Gaussian distribution of gap states is extracted for the SiN. Indeed, the relaxation in V(T) is in good agreement with the theory underlying the kinetics of charge de-trapping from gate dielectric. For the TFTs used in this work, the charge trapping in the SiN gate dielectric is shown to be the dominant metastability mechanism even at bias stress levels as low as 10 V.