79 resultados para Photovoltaic converters


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A high voltage integrated circuit (HVIC) switch designed as a building block for power converters operating up to 13.56 MHz from off-line voltages is presented. A CMOS-compatible, 500 V power device process is used to integrate control circuitry with a high-speed MOS gate driver and high voltage lateral power MOSFET. Fabrication of the HVIC switches has proceeded in two stages. The first batch of devices showed switching times of less than 5 ns for the power switch and good high frequency performance of a level-shifter for driving half bridge converters. In the second phase, a switch that monolithically integrates all the elements required to form a complete high-frequency converter has been designed.

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This paper describes a solid state electrical emulator devised for laboratory testing of power conditioning electronics for direct drive linear wave energy converters (DDLWEC). Two rectification strategies are considered; a uni-directional boost topology, and an H-bridge which may be controlled in either uni- or bidirectional modes.

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The developments of standard, projects and technology of PV concentrator system was briefly reported. A detailed description of photovoltaic concentrator system was given, which included technology and recent development of optical components, receivers and balance of system (BOS). The heat sink of passive cooling and active cooling was given. A brief discussion promise of this technology was included. Finally, main technological problems were presented.

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Analyses of photovoltaic power generation based on Lyapunov's theorems are presented. The characteristics of the photovoltaic module and the power conditioning unit are analyzed in order to establish energy functions that assess the stability of solutions and define safe regions of operation. Furthermore, it is shown that grid-connected photovoltaic modules driven at maximum power may become unstable under normal grid transients. In such cases, stability can be maintained by allowing an operational margin defined as the energy difference between the stable and the unstable solutions of the system. Simulations show that modules cope well with grid transients when a sufficiently large margin is used.

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Large digital chips use a significant amount of energy to distribute a multi-GHz clock. By discharging the clock network to ground every cycle, the energy stored in this large capacitor is wasted. Instead, the energy can be recovered using an on-chip DC-DC converter. This paper investigates the integration of two DC-DC converter topologies, boost and buck-boost, with a high-speed clock driver. The high operating frequency significantly shrinks the required size of the L and C components so they can be placed on-chip; typical converters place them off-chip. The clock driver and DC-DC converter are able to share the entire tapered buffer chain, including the widest drive transistors in the final stage. To achieve voltage regulation, the clock duty cycle must be modulated; implying only single-edge-triggered flops should be used. However, this minor drawback is eclipsed by the benefits: by recovering energy from the clock, the output power can actually exceed the additional power needed to operate the converter circuitry, resulting in an effective efficiency greater than 100%. Furthermore, the converter output can be used to operate additional power-saving features like low-voltage islands or body bias voltages. ©2008 IEEE.