High-efficiency InGaN/GaN quantum well structures on large area silicon substrates

The growth techniques which have enabled the realization of InGaN-based multi-quantum-well (MQW) structures with high internal quantum efficiencies (IQE) on 150mm (6-in.) silicon substrates are reviewed. InGaN/GaN MQWs are deposited onto GaN templates on large-area (111) silicon substrates, using AlGaN strain-mediating interlayers to inhibit thermal-induced cracking and wafer-bowing, and using a SiN x interlayer to reduce threading dislocation densities in the active region of the MQW structure. MQWs with high IQE approaching 60% have been demonstrated. Atomic resolution electron microscopy and EELS analysis have been used to study the nature of the important interface between the Si(111) substrate and the AlN nucleation layer. We demonstrate an amorphous SiN x interlayer at the interface about 2nm wide, which does not, however, prevent good epitaxy of the AlN on the Si(111) substrate. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Turn-off failure mechanism in large area IGCTs

The destruction mechanism in large area IGCTs (Integrated Gate Commutated Thyristors) under inductive switching conditions is analyzed in detail. The three-dimensional nature of the turn-off process in a 91mm diameter wafer is simulated with a two-dimensional representation. Simulation results show that the final destruction is caused by the uneven dynamic avalanche current distribution across the wafer. © 2011 IEEE.

Controllable chemical vapor deposition of large area uniform nanocrystalline graphene directly on silicon dioxide

Metal-catalyst-free chemical vapor deposition (CVD) of large area uniform nanocrystalline graphene on oxidized silicon substrates is demonstrated. The material grows slowly, allowing for thickness control down to monolayer graphene. The as-grown thin films are continuous with no observable pinholes, and are smooth and uniform across whole wafers, as inspected by optical-, scanning electron-, and atomic force microscopy. The sp 2 hybridized carbon structure is confirmed by Raman spectroscopy. Room temperature electrical measurements show ohmic behavior (sheet resistance similar to exfoliated graphene) and up to 13 of electric-field effect. The Hall mobility is ∼40 cm 2/Vs, which is an order of magnitude higher than previously reported values for nanocrystalline graphene. Transmission electron microscopy, Raman spectroscopy, and transport measurements indicate a graphene crystalline domain size ∼10 nm. The absence of transfer to another substrate allows avoidance of wrinkles, holes, and etching residues which are usually detrimental to device performance. This work provides a broader perspective of graphene CVD and shows a viable route toward applications involving transparent electrodes. © 2012 American Institute of Physics.

Direct chemical vapor deposition of large-area carbon thin films on gallium nitride for transparent electrodes: A first attempt

Direct formation of large-area carbon thin films on gallium nitride by chemical vapor deposition without metallic catalysts is demonstrated. A high flow of ammonia is used to stabilize the surface of the GaN (0001)/sapphire substrate during the deposition at 950°C. Various characterization methods verify that the synthesized thin films are largely sp 2 bonded, macroscopically uniform, and electrically conducting. The carbon thin films possess optical transparencies comparable to that of exfoliated graphene. This paper offers a viable route toward the use of carbon-based materials for future transparent electrodes in III-nitride optoelectronics, such as GaN-based light emitting diodes and laser diodes. © 1988-2012 IEEE.

Frame assisted H2O electrolysis induced H2 bubbling transfer of large area graphene grown by chemical vapor deposition on Cu

An improved technique for transferring large area graphene grown by chemical vapor deposition on copper is presented. It is based on mechanical separation of the graphene/copper by H2 bubbles during H2O electrolysis, which only takes a few tens of seconds while leaving the copper cathode intact. A semi-rigid plastic frame in combination with thin polymer layer span on graphene gives a convenient way of handling- and avoiding wrinkles and holes in graphene. Optical and electrical characterizations prove the graphene quality is better than that obtained by traditional wet etching transfer. This technique appears to be highly reproducible and cost efficient. © 2013 American Institute of Physics.

A graphene-based large area surface-conduction electron emission display

The fabrication and functionality of a 21 cm graphene-based transverse electron emission display panel is presented. A screen-printed triode edge electron emission geometry has been developed based on chemical vapor deposited (CVD) graphene supported on vertically aligned carbon nanotubes (CNT) necessary to minimize electrostatic shielding induced by the proximal bulk substrate. Integrated ZnO tetrapod electron scatterers have been shown to increase the emission efficiency by more than 90%. Simulated electron trajectories validate the observed emission characteristics with driving voltages less than 60 V. Fabricated display panels have shown real-time video capabilities that are hysteresis free (<0.2%), have extremely stable lifetimes (<3% variation over 10 h continuous operation) in addition to rapid temporal responses (<1 ms). © 2013 Elsevier Ltd. All rights reserved.

Low-cost high-efficiency GaN LED on large-area si substrate

The use of large size Si substrates for epitaxy of nitride light emitting diode (LED) structures has attracted great interest because Si wafers are readily available in large diameter at low cost. In addition, such wafers are compatible with existing processing lines for the 6-inch and larger wafer sizes commonly used in the electronics industry. With the development of various methods to avoid wafer cracking and reduce the defect density, the performance of GaN-based LED and electronic devices has been greatly improved. In this paper, we review our methods of growing crack-free InGaN-GaN multiple quantum well (MQW) LED structures of high crystalline quality on Si(111) substrates. The performance of processed LED devices and its dependence on the threading dislocation density were studied. Full wafer-level LED processing using a conventional 6-inch III-V processing line is also presented, demonstrating the great advantage of using large-size Si substrates for mass production of GaN LED devices.

Top down scale-up of semiconducting nanostructures for large area electronics

In this paper, we present a study on electrical and optical characteristics of n-type tin-oxide nanowires integrated based on top-down scale-up strategy. Through a combination of contact printing and plasma based back-channel passivation, we have achieved stable electrical characteristics with standard deviation in mobility and threshold voltage of 9.1% and 25%, respectively, for a large area of 1× 1 cm2 area. Through use of contact printing, high alignment of nanowires was achieved thus minimizing the number of nanowire-nanowire junctions, which serve to limit carrier transport in the channel. In addition, persistent photoconductivity has been observed, which we attribute to oxygen vacancy ionization and subsequent elimination using a gate pulse driving scheme. © 2014 IEEE.

Zinc oxide nanowire networks for macroelectronic devices

Highly transparent zinc oxide (ZnO) nanowire networks have been used as the active material in thin film transistors (TFTs) and complementary inverter devices. A systematic study on a range of networks of variable density and TFT channel length was performed. ZnO nanowire networks provide a less lithographically intense alternative to individual nanowire devices, are always semiconducting, and yield significantly higher mobilites than those achieved from currently used amorphous Si and organic TFTs. These results suggest that ZnO nanowire networks could be ideal for inexpensive large area electronics. © 2009 American Institute of Physics.