A study of frequency response in silicon heterojunction bipolar transistors with amorphous silicon emitters

A detailed physical model of amorphous silicon (aSi:H) is incorporated into a twodimensional device simulator to examine the frequency response limits of silicon heterojunction bipolar transistors (HBT's) with aSi:H emitters. The cutoff frequency is severely limited by the transit time in the emitter space charge region, due to the low electron drift mobility in aSi:H, to 98 MHz which compares poorly with the 37 GHz obtained for a silicon homojunction bipolar transistor with the same device structure. The effects of the amorphous heteroemitter material parameters (doping, electron drift mobility, defect density and interface state density) on frequency response are then examined to find the requirements for an amorphous heteroemitter material such that the HBT has better frequency response than the equivalent homojunction bipolar transistor. We find that an electron drift mobility of at least 100 cnr'V"'"1 is required in the amorphous heteroemitter and at a heteroemitter drift mobility of 350 cm2 · V1· s1 and heteroemitter doping of 5×1017 cm3, a maximum cutoff frequency of 52 GHz can be expected. © 1996 IEEE.

Switching speed enhancement of the LDMOSFETs using partial-SOI technology

To overcome reduced breakdown voltage and self-heating effects inherent in silicon-on-insulator (SOI) power integrated circuits while still maintaining good isolation between low power CMOS circuits and the high power cells, partial SOI (PSOI) technology has been proposed. PSOI devices make use of both buried oxide and substrate depletion to support the breakdown voltage. 2D analyses and modeling of parasitic capacitances in PSOI structures show that PSOI-lightly doped MOSFETs can increase the switching speed by as much as four times compared to conventional SOI structures, making them very attractive for high switching applications.

Analytic model for turn off in the silicon-on-insulator LIGBT

Lateral insulated gate bipolar transistors (LIGBTs) in silicon-on-insulator (SOI) show a unique turn off characteristic when compared to junction-isolated RESURF LIGBTs or vertical IGBTs. The turn off characteristic shows an extended `terrace' where, after the initial fast transient characteristic of IGBTs due to the loss of the electron current, the current stays almost at the same value for an extended period of time, before suddenly dropping to zero. In this paper, we show that this terrace arises because there is a value of LIGBT current during switch off where the rate of expansion of the depletion region with respect to the anode current is infinite. Once this level of anode current is approached, the depletion region starts to expand very rapidly, and is only stopped when it reaches the n-type buffer layer surrounding the anode. Once this happens, the current rapidly drops to zero. A quasi-static analytic model is derived to explain this behaviour. The analytically modelled turn off characteristic agrees well with that found by numerical simulation.