Focused ion beam etching of GaN

We have investigated the use of focused ion beam (FIB) etching for the fabrication of GaN-based devices. Although work has shown that conventional reactive ion etching (RIE) is in most cases appropriate for the GaN device fabrication, the direct write facility of FIB etching - a well-established technique for optical mask repair and for IC failure analysis and repair - without the requirement for depositing an etch mask is invaluable. A gallium ion beam of about 20nm diameter was used to sputter GaN material. The etching rate depends linearly on the ion dose per area with a slope of 3.5×10 -4μm3/pC. At a current of 3nA, for example, this corresponds to an etch rate of 1.05μm3/s. Good etching qualities have been achieved with a side wall roughness significantly below 0.1μm. Changes in the roughness of the etched surface plane stay below 8nm.

Method of etching

A method of creating micro patterned devices by patterning thin films which are deposited on a substrate. A channel or channels is created on the substrate, the width being of fine enough resolution such that a flowable mask material can be drawn along the channel by capillary forces.

Electron-beam-induced direct etching of graphene

We present electron-beam-induced oxidation of single- and bilayer graphene devices in a low-voltage scanning electron microscope. We show that the injection of oxygen leads to targeted etching at the focal point, enabling us to pattern graphene with a resolution of better than 20 nm. Voltage-contrast imaging, in conjunction with finite-element simulations, explain the secondary-electron intensities and correlate them to the etch profile. © 2013 Elsevier Ltd. All rights reserved.

Increased carbon nanotube area density after catalyst generation from cobalt disilicide using a cyclic reactive ion etching approach

We used a cyclic reactive ion etching (RIE) process to increase the Co catalyst density on a cobalt disilicide (CoSi2) substrate for carbon nanotube (CNT) growth. Each cycle of catalyst formation consists of a room temperature RIE step and an annealing step at 450 °C. The RIE step transfers the top-surface of CoSi2 into cobalt fluoride; while the annealing reduces the fluoride into metallic Co nanoparticles. We have optimized this cyclic RIE process and determined that the catalyst density can be doubled in three cycles, resulting in a final CNT shell density of 6.6 × 10 11 walls·cm-2. This work demonstrates a very effective approach to increase the CNT density grown directly on silicides. © 2014 AIP Publishing LLC.

Design and coupled-effect simulations of CMOS micro gas-sensors built on SOI thin membranes

This paper describes coupled-effect simulations of smart micro gas-sensors based on standard BiCMOS technology. The smart sensor features very low power consumption, high sensitivity and potential low fabrication cost achieved through full CMOS integration. For the first time the micro heaters are made of active CMOS elements (i.e. MOSFET transistors) and embedded in a thin SOI membrane consisting of Si and SiO2 thin layers. Micro gas-sensors such as chemoresistive, microcalorimeteric and Pd/polymer gate FET sensors can be made using this technology. Full numerical analyses including 3D electro-thermo-mechanical simulations, in particular stress and deflection studies on the SOI membranes are presented. The transducer circuit design and the post-CMOS fabrication process, which includes single sided back-etching, are also reported.

High tuning range AlSi RF MEMS capacitors fabricated with sacrificial amorphous silicon surface micromachining

This paper reports the fabrication and electrical characterization of high tuning range AlSi RF MEMS capacitors. We present experimental results obtained by a surface micromachining process that uses dry etching of sacrificial amorphous silicon to release Al-1%Si membranes and has a low thermal budget (<450 °C) being compatible with CMOS post-processing. The proposed silicon sacrificial layer dry etching (SSLDE) process is able to provide very high Si etch rates (3-15 μm/min, depending on process parameters) with high Si: SiO2 selectivity (>10,000:1). Single- and double-air-gap MEMS capacitors, as well as some dedicated test structures needed to calibrate the electro-mechanical parameters and explore the reliability of the proposed technology, have been fabricated with the new process. S-parameter measurements from 100 MHz up to 2 GHz have shown a capacitance tuning range higher than 100% with the double-air-gap architecture. The tuning range can be enlarged with a proper DC electrical bias of the capacitor electrodes. Finally, the reported results make the proposed MEMS tuneable capacitor a good candidate for above-IC integration in communications applications. © 2004 Elsevier B.V. All rights reserved.

Laser micromachining of thin films for optoelectronic devices and packages

Focused laser micromachining in an optical microscope system is used to prototype packages for optoelectronic devices and to investigate new materials with potential applications in packaging. Micromachined thin films are proposed as mechanical components to locate fibres and other optical and electrical components on opto-assemblies. This paper reports prototype structures which are micromachined in silicon carbide to produce beams 5 μm thick by (i) laser cutting a track in a SiC coated Si wafer, (ii) undercutting by anisotropic silicon etching using KOH in water, and (iii) trimming if necessary with the laser system. This approach has the advantage of fast turn around and proof of concept. Mechanical test data are obtained from the prototype SiC beam package structures by testing with a stylus profilometer. The Youngs modulus obtained for chemical vapour deposited silicon carbide is 360 +/- 50 GPa indicating that it is a promising material for packaging applications.

Microfabrication and application of reservoir pins for liquid transfer in biotechnology

Microarraying involves laying down genetic elements onto a solid substrate for DNA analysis on a massively parallel scale. Microarrays are prepared using a pin-based robotic platform to transfer liquid samples from microtitre plates to an array pattern of dots of different liquids on the surface of glass slides where they dry to form spots diameter < 200 μm. This paper presents the design, materials selection, micromachining technology and performance of reservoir pins for microarraying. A conical pin is produced by (i) conventional machining of stainless steel or wet etching of tungsten wire, followed by (ii) micromachining with a focused laser to produce a microreservoir and a capillary channel structure leading from the tip. The pin has a flat end diameter < 100 μm from which a 500 μm long capillary channel < 15 μm wide leads up the pin to a reservoir. Scanning electron micrographs of the metal surface show roughness on the scale of 10 μm, but the pins nevertheless give consistent and reproducible spotting performance. The pin capacity is 80 nanolitres of fluid containing DNA, and at least 50 spots can be printed before replenishing the reservoir. A typical robot holds can hold up to 64 pins. This paper discusses the fabrication technology, the performance and spotting uniformity for reservoir pins, the possible limits to miniaturization of pins using this approach, and the future prospects for contact and non-contact arraying technology.

Optically triggered polarisation bistability in GaInAsP twin stripe injection lasers using integrated devices

A bistable polarization switching element and optical triggering source has been produced by etching a facet in a twin stripe semiconductor laser. The switching element is formed by a pair of stripe segments at one end of the device and triggered with short light pulses from the other two segments. Detector limited switching risetimes have been measured at 250 ps.

Lateral field emitters fabricated using carbon nanotubes

We report on the fabrication of lateral emitters using carbon nanotubes (CNTs) grown via plasma enhanced chemical vapour deposition (PECVD). Carbon nanotubes are dispersed randomly onto a substrate, mapped, contacted with metal, and by etching the substrate, a suspended lateral emitter structure is formed. Field emission measurements from the lateral emitters show a turn-on voltage as low as 12 V. The emission characteristics showed good fits to the Fowler-Nordheim (FN) theory indicating that conventional field emission was indeed observed from these devices. © 2003 Elsevier Science B.V. All rights reserved.

Fabrication of multiwalled carbon nanotube bridges by poly-methylmethacrylate suspended dispersion

Poly-methylmethacrylate suspended dispersion was used to fabricate multiwalled carbon nanotube (MWCNT) bridges. Using this technique, nanotubes could be suspended between metal electrodes without any chemical etching of the substrate. The electrical measurement on suspended MWCNT bridges shows that the room temperature resistance ranges from under a kω to a few Mω.

Carbon nanotube alignment via electrohydrodynamic patterning of nanocomposites

Electrohydrodynamic (EHD) pattern formation in carbon nanotube-polymer composite films yields well-defined patterns on the micrometer scale along with the alignment of carbon nanotubes (CNTs) within these patterns. Conductive pathways in nanotube networks formed during EHD patterning of nanocomposite films results in a substantial increase in the composites' conductivity at loadings exceeding the percolation threshold. The degree of nanotube alignment can be tuned by adjusting the EHD parameters and the degree of alignment is mirrored by the conductivity across the film. Using etching techniques or by embedding relatively long nanotubes, patterned surfaces decorated by CNT brushes were generated. Copyright © 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

More oomph

An ingenious new CMOS-compatible process which promises to significantly improve the performance of power devices is discussed. A novel power device concept based on the use of high voltage regions suspended on thin semiconductor/dielectric membranes is reported. The membrane power devices are manufactured in a fully-CMOS compatible silicon-on-insulator (SOI) process followed by a bulk etching step and subsequent back-passivation. The concept is applicable to a class of high voltage devices such as LDMOSFETs, diodes, LIGBTs and superjunctions.