Ready configuration of machines into an existing manufacturing system

This paper focuses on simplifying and easing the integration of a new machine into an existing conventional hierarchical manufacturing system. Based on a distributed manufacturing paradigm, it proposes the functions and interfaces that a new machine and an existing manufacturing system should possess so that ready and simple configuration of additional machines can be achieved. The configuration process is intended to include, not only mechanical and electrical interfaces, but also decision system interfaces (such as planning, scheduling, and shop-floor control). Preliminary laboratory experiments to compare the reconfigurability resulting from a conventional integration method and the proposed distributed method are presented and discussed. © 2007 ISAM.

Deposition of carbon nanotubes on CMOS

We demonstrate the growth of multi wall and single wall carbon nanotubes (CNT) onto substrates containing commercial 1-m CMOS integrated circuits. The low substrate temperature growth (450°C) was achieved by using hot filament (1000 °C) to preheat the source gases (C 2H 2 and NH 3) and in situ mass spe-ctroscopy was used to identify the gas species present. Field effect transistors based on Single Walled Carbon Nanotube (SWNT) grown under such conditions were fabricated and examined. CNT growth was performed directly on the passivation layer of the CMOS integrated circuits. Individual n- and p-type CMOS transistors were compared before and after CNT growth. The transistors survive and operate after the CNT growth process, although small degradations are observed in the output current (for p-transistors) and leakage current (for both p- and n-type transistors). © 2010 IEEE.

Low partial pressure chemical vapor deposition of graphene on copper

A systematic study of the Cu-catalyzed chemical vapor deposition of graphene under extremely low partial pressure is carried out. A carbon precursor supply of just P CH4∼ 0.009 mbar during the deposition favors the formation of large-area uniform monolayer graphene verified by Raman spectra. A diluted HNO 3 solution is used to remove Cu before transferring graphene onto SiO 2/Si substrates or carbon grids. The graphene can be made suspended over a ∼12 μm distance, indicating its good mechanical properties. Electron transport measurements show the graphene sheet resistance of ∼0.6 kΩ/□ at zero gate voltage. The mobilities of electrons and holes are ∼1800 cm 2/Vs at 4.2 K and ∼1200 cm 2/Vs at room temperature. © 2011 IEEE.

Synthesis of zinc oxide nanostructures by microheaters in the ambient environment

A catalyst-free synthesis of ZnO nanostructures using platinum microheaters under ambient environmental conditions has been developed. Different types of ZnO nanostructures are synthesized from the oxidization of Zn thin film by local heating. The characterization of two shapes of Pt microheaters is investigated and the relationship between the applied power for heat generation and ZnO nanostructure synthesis is investigated by local heating experiments under ambient conditions. Based on the developed heating approach, synthesis area, location, and morphologies of ZnO nanostructures can be controlled through the deposited thickness of Zn layer and applied heating voltages. Furthermore, a connected multiple-structure (Zn-ZnO-Zn) layer is synthesized using combinative multimicroheaters. © 2002-2012 IEEE.

Centrifuge coating for low-waste solution processing of transparent nanostructured electrodes

Centrifuge coating was implemented to fabricate nanostructured conductive layers through solution processing at room temperature. This coating procedure allows fast evaporation, thereby fixing the nanomaterials in their dispersed state onto a substrate by the centrifuge action. Material wastes were minimized by mitigating the effects of particle reaggregation. Using this method, we fabricate single-wall nanotube coatings on different substrates such as polyethylene terephthalate, polydimethylsiloxane, and an acrylic elastomer with no prior surface modification of the substrate. The effects of the choice of solvents on the morphology and subsequent performance of the coating network are studied. © 2002-2012 IEEE.

Multi-walled carbon nanotube conductivity enhancement and band gap widening via rapid pulsed thermal annealing

Herein we report on the transport characteristics of rapid pulsed vacuum-arc thermally annealed, individual and network multi-walled carbon nanotubes. Substantially reduced defect densities (by at least an order of magnitude), measured by micro-Raman spectroscopy, and were achieved by partial reconstruction of the bamboo-type defects during thermal pulsing compared with more traditional single-pulse thermal annealing. Rapid pulsed annealed processed networks and individual multi-walled nanotubes showed a consistent increase in conductivity (of over a factor of five at room temperature), attributed to the reduced number density of resistive axial interfaces and, in the case of network samples, the possible formation of structural bonds between crossed nanotubes. Compared to the highly defective as-grown nanotubes, the pulsed annealed samples exhibited reduced temperature sensitivity in their transport characteristics signifying the dominance of scattering events from structural defects. Transport measurements in the annealed multi-walled nanotubes deviated from linear Ohmic, typically metallic, behavior to an increasingly semiconducting-like behavior attributed to thermally induced axial strains. Rapid pulsed annealed networks had an estimated band gap of 11.26 meV (as-grown; 6.17 meV), and this observed band gap enhancement was inherently more pronounced for individual nanotubes compared with the networks most likely attributed to mechanical pinning effect of the probing electrodes which possibly amplifies the strain induced band gap. In all instances the estimated room temperature band gaps increased by a factor of two. The gating performance of back-gated thin-film transistor structures verified that the observed weak semiconductivity (p-type) inferred from the transport characteristic at room temperature. © 2014 Copyright Taylor & Francis Group, LLC.