Ni-silicide growth kinetics in Si and Si/SiO2 core/shell nanowires.

A systematic study of the kinetics of axial Ni silicidation of as-grown and oxidized Si nanowires (SiNWs) with different crystallographic orientations and core diameters ranging from ∼ 10 to 100 nm is presented. For temperatures between 300 and 440 °C the length of the total axial silicide intrusion varies with the square root of time, which provides clear evidence that the rate limiting step is diffusion of Ni through the growing silicide phase(s). A retardation of Ni-silicide formation for oxidized SiNWs is found, indicative of a stress induced lowering of the diffusion coefficients. Extrapolated growth constants indicate that the Ni flux through the silicided NW is dominated by surface diffusion, which is consistent with an inverse square root dependence of the silicide length on the NW diameter as observed for (111) orientated SiNWs. In situ TEM silicidation experiments show that NiSi(2) is the first forming phase for as-grown and oxidized SiNWs. The silicide-SiNW interface is thereby atomically abrupt and typically planar. Ni-rich silicide phases subsequently nucleate close to the Ni reservoir, which for as-grown SiNWs can lead to a complete channel break-off for prolonged silicidation due to significant volume expansion and morphological changes.

Taper-free and vertically oriented Ge nanowires on Ge/Si substrates grown by a two-temperature process

Taper-free and vertically oriented Ge nanowires were grown on Si (111) substrates by chemical vapor deposition with Au nanoparticle catalysts. To achieve vertical nanowire growth on the highly lattice mismatched Si substrate, a thin Ge buffer layer was first deposited, and to achieve taper-free nanowire growth, a two-temperature process was employed. The two-temperature process consisted of a brief initial base growth step at high temperature followed by prolonged growth at lower temperature. Taper-free and defect-free Ge nanowires grew successfully even at 270 °C, which is 90 °C lower than the bulk eutectic temperature. The yield of vertical and taper-free nanowires is over 90%, comparable to that of vertical but tapered nanowires grown by the conventional one-temperature process. This method is of practical importance and can be reliably used to develop novel nanowire-based devices on relatively cheap Si substrates. Additionally, we observed that the activation energy of Ge nanowire growth by the two-temperature process is dependent on Au nanoparticle size. The low activation energy (∼5 kcal/mol) for 30 and 50 nm diameter Au nanoparticles suggests that the decomposition of gaseous species on the catalytic Au surface is a rate-limiting step. A higher activation energy (∼14 kcal/mol) was determined for 100 nm diameter Au nanoparticles which suggests that larger Au nanoparticles are partially solidified and that growth kinetics become the rate-limiting step. © 2011 American Chemical Society.

Defect-free GaAs/AlGaAs Core-shell nanowires on Si substrates

We report straight and vertically aligned defect-free GaAs nanowires grown on Si(111) substrates by metal-organic chemical vapor deposition. By deposition of thin GaAs buffer layers on Si substrates, these nanowires could be grown on the buffer layers with much less stringent conditions as otherwise imposed by epitaxy of III-V compounds on Si. Also, crystal-defect-free GaAs nanowires were grown by using either a two-temperature growth mode consisting of a short initial nucleation step under higher temperature followed by subsequent growth under lower temperature or a rapid growth rate mode with high source flow rate. These two growth modes not only eliminated planar crystallographic defects but also significantly reduced tapering. Core-shell GaAs-AlGaAs nanowires grown by the two-temperature growth mode showed improved optical properties with strong photoluminescence and long carrier life times. © 2011 American Chemical Society.

Structural and optical characterization of vertical GaAs/GaP core-shell nanowires grown on Si substrates

GaAs nanowires were grown on Si (111) substrates. By coating a thin GaAs buffer layer on Si surface and using a two-temperature growth, the morphology and crystal structure of GaAs nanowires were dramatically improved. The strained GaAs/GaP core-shell nanowires, based on the improved GaAs nanowires with a shell thickness of 25 nm, showed a significant shift in emission energy of 260 meV from the unstrained GaAs nanowires. © 2010 IEEE.

Novel growth and properties of GaAs nanowires on Si substrates.

Straight, vertically aligned GaAs nanowires were grown on Si(111) substrates coated with thin GaAs buffer layers. We find that the V/III precursor ratio and growth temperature are crucial factors influencing the morphology and quality of buffer layers. A double layer structure, consisting of a thin initial layer grown at low V/III ratio and low temperature followed by a layer grown at high V/III ratio and high temperature, is crucial for achieving straight, vertically aligned GaAs nanowires on Si(111) substrates. An in situ annealing step at high temperature after buffer layer growth improves the surface and structural properties of the buffer layer, which further improves the morphology of the GaAs nanowire growth. Through such optimizations we show that vertically aligned GaAs nanowires can be fabricated on Si(111) substrates and achieve the same structural and optical properties as GaAs nanowires grown directly on GaAs(111)B substrates.

Improvement of morphology, structure, and optical properties of GaAs nanowires grown on Si substrates

We investigate vertical and defect-free growth of GaAs nanowires on Si (111) substrates via a vapor-liquid-solid (VLS) growth mechanism with Au catalysts by metal-organic chemical vapor deposition (MOCVD). By using annealed thin GaAs buffer layers on the surface of Si substrates, most nanowires are grown on the substrates straight, following (111) direction; by using two temperature growth, the nanowires were grown free from structural defects, such as twin defects and stacking faults. Systematic experiments about buffer layers indicate that V/III ratio of precursor and growth temperature can affect the morphology and quality of the buffer layers. Especially, heterostructural buffer layers grown with different V/III ratios and temperatures and in-situ post-annealing step are very helpful to grow well arranged, vertical GaAs nanowires on Si substrates. The initial nanowires having some structural defects can be defect-free by two-temperature growth mode with improved optical property, which shows us positive possibility for optoelectronic device application. ©2010 IEEE.

Low-cost high-efficiency GaN LED on large-area si substrate

The use of large size Si substrates for epitaxy of nitride light emitting diode (LED) structures has attracted great interest because Si wafers are readily available in large diameter at low cost. In addition, such wafers are compatible with existing processing lines for the 6-inch and larger wafer sizes commonly used in the electronics industry. With the development of various methods to avoid wafer cracking and reduce the defect density, the performance of GaN-based LED and electronic devices has been greatly improved. In this paper, we review our methods of growing crack-free InGaN-GaN multiple quantum well (MQW) LED structures of high crystalline quality on Si(111) substrates. The performance of processed LED devices and its dependence on the threading dislocation density were studied. Full wafer-level LED processing using a conventional 6-inch III-V processing line is also presented, demonstrating the great advantage of using large-size Si substrates for mass production of GaN LED devices.

Laser microstructuring of Si surfaces for low-threshold field-electron emission

Dense arrays of high aspect ratio Si micro-pyramids have been formed by cumulative high intensity laser irradiation of doped Si wafers in an SF6 environment. A comparative study using nanosecond (XeCl, 308 nm) and femtosecond (Ti: Sapphire, 800 nm and KrF, 248 nm) laser pulses has been performed in this work. The influence of pulse duration and ambient gas pressure (SF6) is also presented. Scanning electron microscopy has shown that upon laser irradiation conical features appear on the Si surface in a rather homogenous distribution and with a spontaneous self alignment into arrays. Their lowest tip diameter is 800 nm; while their height reaches up to 90 mum. Secondary tip decoration appears on the surface of the formed spikes. Areas of 2 X 2 mm(2) covered with Si cones have been tested as cold cathode field emitters. After several conditioning cycles, the field emission threshold for the studied Si tips is as low as 2 V/mum, with an emission current of 10(-3) A/cm(2) at 4 V/mum. Even though these structures have smaller aspect ratios than good quality carbon nanotubes, their field emission properties are similar. The simple and direct formation of field emission Si arrays over small pre-selected areas by laser irradiation could lead to a novel approach for the development of electron sources. (C) 2003 Elsevier B.V. All rights reserved.

Development of a classical force field for the oxidized Si surface: application to hydrophilic wafer bonding.

We have developed a classical two- and three-body interaction potential to simulate the hydroxylated, natively oxidized Si surface in contact with water solutions, based on the combination and extension of the Stillinger-Weber potential and of a potential originally developed to simulate SiO(2) polymorphs. The potential parameters are chosen to reproduce the structure, charge distribution, tensile surface stress, and interactions with single water molecules of a natively oxidized Si surface model previously obtained by means of accurate density functional theory simulations. We have applied the potential to the case of hydrophilic silicon wafer bonding at room temperature, revealing maximum room temperature work of adhesion values for natively oxidized and amorphous silica surfaces of 97 and 90 mJm(2), respectively, at a water adsorption coverage of approximately 1 ML. The difference arises from the stronger interaction of the natively oxidized surface with liquid water, resulting in a higher heat of immersion (203 vs 166 mJm(2)), and may be explained in terms of the more pronounced water structuring close to the surface in alternating layers of larger and smaller densities with respect to the liquid bulk. The computed force-displacement bonding curves may be a useful input for cohesive zone models where both the topographic details of the surfaces and the dependence of the attractive force on the initial surface separation and wetting can be taken into account.