526 resultados para SILICON DIODES


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The configuration space of boron in silicon has been investigated using an empirical potential approach. This study indicates that energetically favourable configurations consist of a number of three-fold coordinated split interstitials. A configuration consisting of a four-fold boron-interstitial in combination with a two-fold silicon is found to be perfectly aligned in the <111> direction. This configuration in the positive charge state is a possibility for the boron interstitial related defect found via EPR and DLTS. © 1994.

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Non-hydrogenated tetrahedral amorphous carbon (ta-C) has shown superior field emission characteristics. The understanding of the emission mechanism has been hindered by the lack of any directly measured data on the band offsets between ta-C and Si. In this paper results from direct in situ X-ray photoemission spectroscopy (XPS) measurements of the band-offset between ta-C and Si are reported. The measurements were carried out using a filtered cathodic vacuum arc (FCVA) deposition system attached directly to an ultra-high vacuum (UHV) XPS chamber via a load lock chamber. Repeated XPS measurements were carried out after monolayer depositions on in situ cleaned Si substrates. The total film thickness for each set of measurements was approximately 5 nm. Analysis of the data from undoped ta-C on n and p Si show the unexpected result that the conduction band barrier between Si and ta-C remains around 1.0 eV, but that the valence band barrier changes from 0.7 to 0.0 eV. The band line up derived from these barriers suggests that the Fermi level in the ta-C lies 0.3 eV above the valence band on both p and n+Si. The heterojunction barriers when ta-C is doped with nitrogen are also presented. The implications of the heterojunction energy barrier heights for field emission from ta-C are discussed.

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An ingenious new CMOS-compatible process which promises to significantly improve the performance of power devices is discussed. A novel power device concept based on the use of high voltage regions suspended on thin semiconductor/dielectric membranes is reported. The membrane power devices are manufactured in a fully-CMOS compatible silicon-on-insulator (SOI) process followed by a bulk etching step and subsequent back-passivation. The concept is applicable to a class of high voltage devices such as LDMOSFETs, diodes, LIGBTs and superjunctions.

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A technique for pattern transfer onto carbon-diamond films deposited by radio-frequency plasma-enhanced chemical vapour deposition is reported. Such a technique involves standard photolithography processes and reactive ion etching by oxygen and is compatible with present day microelectronic technology. The patterns transferred are well defined with very good resolution. © 1992.

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The promising theoretical properties of diamond, together with the recent advances in producing high-quality single crystal diamond substrates, have increased the interest in using diamond in power electronic devices. This paper presents numerical and experimental off-state results for a diamond Schottky barrier diode (SBD), one of most studied unipolar devices in diamond. Finding a suitable termination structure is an essential step towards designing a high voltage diamond device. The ramp oxide structure shows very encouraging electronic performance when used to terminate diamond SBDs. High-k dielectrics are also considered in order to further improve the reliability and electrical performance of the structure. © 2007 Elsevier B.V. All rights reserved.

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A detailed physical model of amorphous silicon (aSi:H) is incorporated into a twodimensional device simulator to examine the frequency response limits of silicon heterojunction bipolar transistors (HBT's) with aSi:H emitters. The cutoff frequency is severely limited by the transit time in the emitter space charge region, due to the low electron drift mobility in aSi:H, to 98 MHz which compares poorly with the 37 GHz obtained for a silicon homojunction bipolar transistor with the same device structure. The effects of the amorphous heteroemitter material parameters (doping, electron drift mobility, defect density and interface state density) on frequency response are then examined to find the requirements for an amorphous heteroemitter material such that the HBT has better frequency response than the equivalent homojunction bipolar transistor. We find that an electron drift mobility of at least 100 cnr'V"'"1 is required in the amorphous heteroemitter and at a heteroemitter drift mobility of 350 cm2 · V1· s1 and heteroemitter doping of 5×1017 cm3, a maximum cutoff frequency of 52 GHz can be expected. © 1996 IEEE.

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This paper presents a comparison between SiC and diamond Schottky barrier diodes using the oxide ramp termination. The influences of the dielectric thickness and relative permittivity on the diode's electrical performance are investigated. Typical commercial drift layer parameters are used for this study. The extension of the space charge area throughout the drift region and the current distribution at breakdown are shown. The efficiency of the termination is also evaluated for both SiC and diamond diodes. © (2009) Trans Tech Publications, Switzerland.

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Novel alternatives to the conventional single crystal diamond Schottky metal-intrinsic-p+ (m-i-p+) diode is presented in this work. The conduction mechanism of the device is analysed and structural modifications to enhance its performance are proposed. The periodic inclusion of highly p+ doped thin δ-layers and p+ spots in the intrinsic voltage blocking layer of the diode drastically improves the forward performance of these devices enhancing the forward current of the device by a factor of 10 - 17 with a maximum forward current density of ̃ 40 A/cm 2 for a 2 kV device.

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The paper's goal is the first demonstration of the fabrication of high power Schottky diodes on synthetic diamond using oxide ramp termination. In order to allow full activated impurities at room temperature and a high hole mobility a low boron doping of the drift layer is employed. Several aspects of the manufacturing technology are presented. A termination with a small ramp angle can be obtained using only RIE technique due to diamond wafer nonuniformity (roughness). Experimental forward and reverse characteristics measured on diamond diodes are also included. © 2007 IEEE.