Amorphous oxide semiconductor TFTs for displays and imaging

© 2013 IEEE. This paper reviews the mechanisms underlying visible light detection based on phototransistors fabricated using amorphous oxide semiconductor technology. Although this family of materials is perceived to be optically transparent, the presence of oxygen deficiency defects, such as vacancies, located at subgap states, and their ionization under illumination, gives rise to absorption of blue and green photons. At higher energies, we have the usual band-to-band absorption. In particular, the oxygen defects remain ionized even after illumination ceases, leading to persistent photoconductivity, which can limit the frame-rate of active matrix imaging arrays. However, the persistence in photoconductivity can be overcome through deployment of a gate pulsing scheme enabling realistic frame rates for advanced applications such as sensor-embedded display for touch-free interaction.

Top down scale-up of semiconducting nanostructures for large area electronics

In this paper, we present a study on electrical and optical characteristics of n-type tin-oxide nanowires integrated based on top-down scale-up strategy. Through a combination of contact printing and plasma based back-channel passivation, we have achieved stable electrical characteristics with standard deviation in mobility and threshold voltage of 9.1% and 25%, respectively, for a large area of 1× 1 cm2 area. Through use of contact printing, high alignment of nanowires was achieved thus minimizing the number of nanowire-nanowire junctions, which serve to limit carrier transport in the channel. In addition, persistent photoconductivity has been observed, which we attribute to oxygen vacancy ionization and subsequent elimination using a gate pulse driving scheme. © 2014 IEEE.

Study of high performance re-timing using a 40 Gb/s hybrid-integrated mach-zehnder all-optical regenerator

We experimentally show that a hybrid-integrated Mach-Zehnder switch with a high performance gate profile allows retiming of optical signals with an accuracy of 500-700fs even if the input timing jitter is increased to 3ps. © 2004 Optical Society of America.

Ni(Pt)-silicide contacts on CMOS devices: Impact of substrate nature and Pt concentration on the phase formation

Ni silicides used as contacts in source/drain and gate of advanced CMOS devices were analyzed by atom probe tomography (APT) at atomic scale. These measurements were performed on 45 nm nMOS after standard self-aligned silicide (salicide) process using Ni(5 at.% Pt) alloy. After the first annealing (RTA1), δ-Ni2Si was the only phase formed on gate and source/drain while, after the second annealing (RTA2), two different Ni silicides have been formed: NiSi on the gate and δ-Ni2Si on the source and drain. This difference between source/drain and gate regions in nMOS devices has been related to the Si substrate nature (poly or mono-crystalline) and to the size of the contact. In fact, NiSi seems to have difficulties to nucleate in the narrow source/drain contact on mono-crystalline Si. The results have been compared to analysis performed on 28 nm nMOS where the Pt concentration is higher (10 at.% Pt). In this case, θ-Ni2Si is the first phase to form after RTA1 and NiSi is then formed at the same time on source (or drain) and gate after RTA2. The absence of the formation of NiSi from δ-Ni 2Si/Si(1 0 0) interface compared to θ-Ni2Si/Si(1 0 0) interface could be related to the difference of the interface energies. The redistributions of As and Pt in different silicides and interfaces were measured and discussed. In particular, it has been evidenced that Pt redistributions obtained on both 45 and 28 nm MOS transistors correspond to respective Pt distributions measured on blanket wafers. © 2013 Elsevier B.V. All rights reserved.

Atom probe tomography for advanced metallization

In microelectronics, the increase in complexity and the reduction of devices dimensions make essential the development of new characterization tools and methodologies. Indeed advanced characterization methods with very high spatial resolution are needed to analyze the redistribution at the nanoscale in devices and interconnections. The atom probe tomography has become an essential analysis to study materials at the nanometer scale. This instrument is the only analytical microscope capable to produce 3D maps of the distribution of the chemical species with an atomic resolution inside a material. This technique has benefit from several instrumental improvements during last years. In particular, the use of laser for the analysis of semiconductors and insulating materials offers new perspectives for characterization. The capability of APT to map out elements at the atomic scale with high sensitivity in devices meets the characterization requirements of semiconductor devices such as the determination of elemental distributions for each device region. In this paper, several examples will show how APT can be used to characterize and understand materials and process for advanced metallization. The possibilities and performances of APT (chemical analysis of all the elements, atomic resolution, planes determination, crystallographic information...) will be described as well as some of its limitations (sample preparation, complex evaporation, detection limit, ...). The examples illustrate different aspect of metallization: dopant profiling and clustering, metallic impurities segregation on dislocation, silicide formation and alloying, high K/metal gate optimization, SiGe quantum dots, as well as analysis of transistors and nanowires. © 2013 Elsevier B.V. All rights reserved.

Fourier spectrum based extraction of an equivalent trap state density in indium gallium zinc oxide transistors

Segregating the dynamics of gate bias induced threshold voltage shift, and in particular, charge trapping in thin film transistors (TFTs) based on time constants provides insight into the different mechanisms underlying TFTs instability. In this Letter we develop a representation of the time constants and model the magnitude of charge trapped in the form of an equivalent density of created trap states. This representation is extracted from the Fourier spectrum of the dynamics of charge trapping. Using amorphous In-Ga-Zn-O TFTs as an example, the charge trapping was modeled within an energy range of ΔEt 0.3 eV and with a density of state distribution as Dt(Et-j)=Dt0exp(-ΔEt/ kT)with Dt0 = 5.02 × 1011 cm-2 eV-1. Such a model is useful for developing simulation tools for circuit design. © 2014 AIP Publishing LLC.