Stepped gate polysilicon thin film transistor for large area power applications

For the first time, we report a new poly-Si stepped gate Thin Film Transistor (SG TFT) on glass. The Density of States extracted from measured I-V characteristics has been used to evaluate the device performance with a two dimensional device simulator. The results show that the three-terminal SG TFT device has a switching speed comparable to a low voltage structure and the high on-current capability of a metal field plate (MFP) TFT and the potential for comparable breakdown characteristics.

Carbon based bottom gate thin film transistor

This paper describes the fabrication and characterization of a carbon based, bottom gate, thin film transistor (TFT). The active layer is formed from highly sp2 bonded nitrogenated amorphous carbon (a-C:N) which is deposited at room temperature using a filtered cathodic vacuum arc technique. The TFT shows p-channel operation. The device exhibits a threshold voltage of 15 V and a field effect mobility of 10-4 cm2 V-1 s-1 . The valence band tail of a-C:N is observed to be much shallower than that of a-Si:H, but does not appear to severely impede the shift of the Fermi level. This may indicate that a significant proportion of the a-C tail states can still contribute to conduction.

Method for determining erosion resistance of fibre-insulating materials

A method was developed for the estimation of the erosive wear of fiber-insulating materials. The wear increases with increasing impact velocity of the particles, increasing impact angle, particle size and the thermal ageing of the fibre elements. Through CFD simulation of the particle-containing gas flow, the erosion depth can be predicted.

Modeling of MOS-side carrier injection in trench-gate IGBTs

A compact trench-gate IGBT model that captures MOS-side carrier injection is developed. The model retains the simplicity of a one-dimensional solution to the ambipolar diffusion equation, but at the same time captures MOS-side carrier injection and its effects on steady-state carrier distribution in the drift region and on switching waveforms. © 2007 IEEE.

Effect of gate dielectric scaling in nanometer scale vertical thin film transistors

A short channel vertical thin film transistor (VTFT) with 30 nm SiN x gate dielectric is reported for low voltage, high-resolution active matrix applications. The device demonstrates an ON/OFF current ratio as high as 10 9, leakage current in the fA range, and a sub-threshold slope steeper than 0.23 V/dec exhibiting a marked improvement with scaling of the gate dielectric thickness. © 2011 American Institute of Physics.