Dynamical behavior of damped driven coupled single electron simple harmonic oscillators

Coherent coupling between a large number of qubits is the goal for scalable approaches to solid state quantum information processing. Prototype systems can be characterized by spectroscopic techniques. Here, we use pulsed-continuous wave microwave spectroscopy to study the behavior of electrons trapped at defects within the gate dielectric of a sol-gel-based high-k silicon MOSFET. Disorder leads to a wide distribution in trap properties, allowing more than 1000 traps to be individually addressed in a single transistor within the accessible frequency domain. Their dynamical behavior is explored by pulsing the microwave excitation over a range of times comparable to the phase coherence time and the lifetime of the electron in the trap. Trap occupancy is limited to a single electron, which can be manipulated by resonant microwave excitation and the resulting change in trap occupancy is detected by the change in the channel current of the transistor. The trap behavior is described by a classical damped driven simple harmonic oscillator model, with the phase coherence, lifetime and coupling strength parameters derived from a continuous wave (CW) measurement only. For pulse times shorter than the phase coherence time, the energy exchange between traps, due to the coupling, strongly modulates the observed drain current change. This effect could be exploited for 2-qubit gate operation. The very large number of resonances observed in this system would allow a complex multi-qubit quantum mechanical circuit to be realized by this mechanism using only a single transistor.

Ballistic Single-Electron Quputer

We propose a new solid state implementation of a quantum computer (quputer) using ballistic single electrons as flying qubits in 1D nanowires. We use a single electron pump (SEP) to prepare the initial state and a single electron transistor (SET) to measure the final state. Single qubit gates are implemented using quantum dots as phase shifters and electron waveguide couplers as beam splitters. A Coulomb coupler acts as a 2-qubit gate, using a mutual phase modulation effect. Since the electron phase coherence length in GaAs/AlGaAs heterostructures is of the order of 30$\mu$m, several gates (tens) can be implemented before the system decoheres.

Application of electron beams in thermal processing of semiconductor materials and devices

Rapid and effective thermal processing methods using electron beams are described in this paper. Heating times ranging from a fraction of a second to several seconds and temperatures up to 1400°C are attainable. Applications such as the annealing of ion implanted material, both without significant dopant diffusion and with highly controlled diffusion of impurities, are described. The technique has been used successfully to activate source/drain regions for fine geometry NMOS transistors. It is shown that electron beams can produce localised heating of semiconductor substrates and a resolution of approximately 1 μm has been achieved. Electron beam heating has been applied to improving the crystalline quality of silicon-on sapphire used in CMOS device fabrication. Silicon layers with defect levels approaching bulk material have been obtained. Finally, the combination of isothermal and selective annealing is shown to have application in recrystallisation of polysilicon films on an insulating layer. The approach provides the opportunity of producing a silicon-on-insulator substrate with improved crystalline quality compared to silicon-on-sapphire at a potentially lower cost. It is suggested that rapid heating methods are expected to provide a real alternative to conventional furnace processing of semiconductor devices in the development of fabrication technology. © 1984 Benn electronics Publications Ltd, Luton.

TECHNIQUES FOR PRODUCING DEFECT-FREE SOI BY DUAL ELECTRON BEAM HEATING OF DEPOSITED POLYSILICON.

Advances in the dual electron-beam recrystallization technique arising from the fast scanning of a line beam parallel to the edges of narrow seeding windows are described. The resultant recrystallized layers are essentially defect-free, have good surface flatness, and cover large areas.

Performance of CMOS Devices in Silicon-on-Sapphire Films After Solid-Phase Epitaxial Growth With Rapid Electron-Beam Heating

The crystal quality of 0.3-μm-thick as-grown epitaxial silicon-on-sapphire (SOS) was improved using solid-phase epitaxy (SPE) by implantation with silicon to 1015 ions/cm2 at 175 keV and rapid annealing using electron-beam heating, n-channel and p-channel transistormobilities increased by 31 and 19 percent, respectively, and a reduction in ring-oscillator stage delay confirmed that crystal defects near the upper silicon surface had been removed. Leakage in n-channel transistors was not significantly affected by the regrowth process but for p-channel transistors back-channel leakage was considerably greater than for the control devices. This is attributed to aluminum released by damage to the sapphire during silicon implantation. © 1985 IEEE

Formation of silicon-on-insulator layers by electron beam recrystallization

This paper outlines the development of the electron beam recrystallization approach to the formation of silicon-on-insulator layers. The technique of recrystallizing seeded layers by a line electron beam has been widely adopted. Present practice in electron beam recrystallization is reviewed, both from materials and process points of view. Applications of silicon-on-insulator substrates formed in this way are described, particularly in three-dimensional integration. © 1988.

Density, sp3 content and internal layering of DLC films by X-ray reflectivity and electron energy loss spectroscopy

A variety of hydrogenated and non-hydrogenated amorphous carbon thin films have been characterized by means of grazing-incidence X-ray reflectivity (XRR) to give information about their density, thickness, surface roughness and layering. We used XRR to validate the density of ta-C, ta-C:H and a-C:H films derived from the valence plasmon in electron energy loss spectroscopy measurements, up to 3.26 and 2.39 g/cm3 for ta-C and ta-C:H, respectively. By comparing XRR and electron energy loss spectroscopy (EELS) data, we have been able for the first time to fit a common electron effective mass of m*/me = 0.87 for all amorphous carbons and diamond, validating the `quasi-free' electron approach to density from valence plasmon energy. While hydrogenated films are found to be substantially uniform in density across the film, ta-C films grown by the filtered cathodic vacuum arc (FCVA) show a multilayer structure. However, ta-C films grown with an S-bend filter show a high uniformity and only a slight dependence on the substrate bias of both sp3 and layering.

Low field electron emission from nanoclustered carbon grown by cathodic arc

Nanocluster carbon films grown using a cathodic arc process at room temperature in the presence of background gases such as helium are found to be good electron emitters. The variation in the surface morphology and the corresponding emission characteristics of the films with change in helium partial pressure (5×10-4 to 50 Torr) during film growth are reported. The effect of helium partial pressure on clustering was studied for films grown at nitrogen partial pressures of 10-4 and 10-3 Torr. The surface morphology of the films varied from smooth through clusters (with sizes 50-200 nm) to fibrous films. The threshold field varied from 1 to 10 V/μm for an emission current density 1 μA/cm2.

Erratum: "Zinc oxide nanostructures and high electron mobility nanocomposite thin film transistors" (IEEE Transactions on Electron Devices (2009))

In the above entitled paper (ibid., vol. 55, no. 11, pp. 3001-3011), two errors were noticed after the paper went to press. The errors are corrected here.

CNTs and CNT/ZnO nanostructures for use as electron sources

The aim of this paper is to describe the growth and optimization of carbon nanotube (CNT) and CNT/Zinc Oxide nanostructures to produce novel electron sources. The emitters studied in this project are based on regular array of vertically aligned 5 μm height and 50 nm diameter CNTs with a pitch of 10 μm as described previously (1). Such a cathode design allows us to minimize electric field shielding effects and thus to help in optimizing the emitted current density. We have previously obtained a current density of 1 A/cm 2 from such arrays in DC mode, and over 12 A/cm2 in pulsed mode at RF frequencies. © 2010 IEEE.