235 resultados para ambipolar transistors


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In this paper an Active Voltage Control (AVC) technique is presented, for series connection of insulated-gate-bipolar-transistors (IGBT) and control of diode recovery. The AVC technique can control the switching trajectory of an IGBT according to a pre-set reference signal. In series connections, every series connected IGBT follows the reference and so that the dynamic voltage sharing is achieved. Another key advantage for AVC is that by changing the reference signal at turn-on, the diode recovery can be optimised. © 2010 IEEE.

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We characterized the electrical conductance of well-structured multi-walled carbon nanotubes (MWCNTs) which had post-treated by a rapid vacuum arc thermal annealing process and structure defects in these nanotubes are removed. We found that the after rapid vacuum arc annealing, the conductivity of well-structured MWCNTs can be improved by an order of magnitude. We also investigated the conductivity of MWCNTs bundle by the variation of temperatures. These results show that the conductance of annealed defect-free MWCNTs is sensitive to temperature imply the phonon scatting dominated the electron conductions. Compare to the well-structured MWCNTs, the defect scattering dominated the electron conduction in the as-grown control sample which has large amount of structure defects. A detail measurement of electron conduction from an individual well-structured MWCNT shows that the conductivity increases with temperatures which imply such MWCNTs exhibited semiconductor properties. We also produced back-gated field-effect transistors using these MWCNTs. It shows that the well-structured MWCNT can act as p-type semiconductor. © 2010 IEEE.

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From the wide spectrum of potential applications of graphene, ranging from transistors and chemical sensors to nanoelectromechanical devices and composites, the field of photonics and optoelectronics is believed to be one of the most promising. Indeed, graphene's suitability for high-speed photodetection was demonstrated in an optical communication link operating at 10 Gbit s 1. However, the low responsivity of graphene-based photodetectors compared with traditional III-V-based ones is a potential drawback. Here we show that, by combining graphene with plasmonic nanostructures, the efficiency of graphene-based photodetectors can be increased by up to 20 times, because of efficient field concentration in the area of a p-n junction. Additionally, wavelength and polarization selectivity can be achieved by employing nanostructures of different geometries. © 2011 Macmillan Publishers Limited. All rights reserved.

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Amorphous silicon thin-film transistors and pixel driver circuits for organic light-emitting diode displays have been fabricated on plastic substrates. Pixel circuits demonstrate sufficient current delivery and long-term stable operation. © 2005 IEEE.

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Air stable complementary polymer inverters were demonstrated by inkjet printing of both top-gate electrodes and the semiconductors in ambient conditions. The p-type and n-type polymer semiconductors were also thermally annealed in ambient conditions after printing. The good performance of circuits in ambient condition shows that the transistors are not only air-stable in term of ambient humidity and oxygen, but also inert to ion migration through dielectrics from the printed gate. The result obtained here has further confirmed the feasibility of fabrication of low-cost polymer complementary circuits in a practical environment. © 2011 Elsevier B.V. All rights reserved.

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With the emergence of transparent electronics, there has been considerable advancement in n-type transparent semiconducting oxide (TSO) materials, such as ZnO, InGaZnO, and InSnO. Comparatively, the availability of p-type TSO materials is more scarce and the available materials are less mature. The development of p-type semiconductors is one of the key technologies needed to push transparent electronics and systems to the next frontier, particularly for implementing p-n junctions for solar cells and p-type transistors for complementary logic/circuits applications. Cuprous oxide (Cu2O) is one of the most promising candidates for p-type TSO materials. This paper reports the deposition of Cu2O thin films without substrate heating using a high deposition rate reactive sputtering technique, called high target utilisation sputtering (HiTUS). This technique allows independent control of the remote plasma density and the ion energy, thus providing finer control of the film properties and microstructure as well as reducing film stress. The effect of deposition parameters, including oxygen flow rate, plasma power and target power, on the properties of Cu2O films are reported. It is known from previously published work that the formation of pure Cu2O film is often difficult, due to the more ready formation or co-formation of cupric oxide (CuO). From our investigation, we established two key concurrent criteria needed for attaining Cu2O thin films (as opposed to CuO or mixed phase CuO/Cu2O films). First, the oxygen flow rate must be kept low to avoid over-oxidation of Cu2O to CuO and to ensure a non-oxidised/non-poisoned metallic copper target in the reactive sputtering environment. Secondly, the energy of the sputtered copper species must be kept low as higher reaction energy tends to favour the formation of CuO. The unique design of the HiTUS system enables the provision of a high density of low energy sputtered copper radicals/ions, and when combined with a controlled amount of oxygen, can produce good quality p-type transparent Cu2O films with electrical resistivity ranging from 102 to 104 Ω-cm, hole mobility of 1-10 cm2/V-s, and optical band-gap of 2.0-2.6 eV. These material properties make this low temperature deposited HiTUS Cu 2O film suitable for fabrication of p-type metal oxide thin film transistors. Furthermore, the capability to deposit Cu2O films with low film stress at low temperatures on plastic substrates renders this approach favourable for fabrication of flexible p-n junction solar cells. © 2011 Elsevier B.V. All rights reserved.

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Large digital chips use a significant amount of energy to distribute a multi-GHz clock. By discharging the clock network to ground every cycle, the energy stored in this large capacitor is wasted. Instead, the energy can be recovered using an on-chip DC-DC converter. This paper investigates the integration of two DC-DC converter topologies, boost and buck-boost, with a high-speed clock driver. The high operating frequency significantly shrinks the required size of the L and C components so they can be placed on-chip; typical converters place them off-chip. The clock driver and DC-DC converter are able to share the entire tapered buffer chain, including the widest drive transistors in the final stage. To achieve voltage regulation, the clock duty cycle must be modulated; implying only single-edge-triggered flops should be used. However, this minor drawback is eclipsed by the benefits: by recovering energy from the clock, the output power can actually exceed the additional power needed to operate the converter circuitry, resulting in an effective efficiency greater than 100%. Furthermore, the converter output can be used to operate additional power-saving features like low-voltage islands or body bias voltages. ©2008 IEEE.

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In this paper an Active Voltage Control (AVC) technique is presented, for series connection of insulated-gate-bipolar-transistors (IGBT) and control of diode recovery. The AVC technique can control the switching trajectory of an IGBT according to a pre-set reference signal. In series connections, every series connected IGBT follows the reference and so that the dynamic voltage sharing is achieved. For the static voltage balancing, the AVC technique can clamp the highest collector-to-emitter voltage to a pre-set clamping voltage level. By selecting the value of the clamping voltage, the difference among series connected IGBTs can be controlled in an accepted range. Another key advantage for AVC is that by changing the reference signal at turn-on, the diode recovery can be optimized. © 2011 EPE Association - European Power Electr.

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We demonstrate inkjet printing as a viable method for large-area fabrication of graphene devices. We produce a graphene-based ink by liquid phase exfoliation of graphite in N-methylpyrrolidone. We use it to print thin-film transistors, with mobilities up to ∼95 cm(2) V(-1) s(-1), as well as transparent and conductive patterns, with ∼80% transmittance and ∼30 kΩ/□ sheet resistance. This paves the way to all-printed, flexible, and transparent graphene devices on arbitrary substrates.

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We report on the photoresponse characteristics of tungsten disulfide (WS2) nanotubes. Field effect transistors (FETs) were fabricated by using individual WS2 multiwall nanotubes. Photo-sensitivity to visible light is clearly observed, with enhancement of the channel conductivity, carrier mobility and carrier concentration upon illumination in the visible regime. Polarization-sensitive measurements reveal a strong anisotropy of the photocurrent on the polarization angle of the incident light with respect to the WS2 nanotube axis. This nano-scale transistor capable of detecting visible light would have a wide range of applications in medical and consumer electronics. © 2008 IEEE. Crown Copyright.

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This paper presents a comprehensive theoretical study of the Trench Insulated Gate Bipolar Transistors (TIGBT). Specific physical and geometrical effects, such as the accumulation layer injection, increased channel density, increased channel charge and transversal electric field modulation are discussed. The potential advantages of the Trench IGBT over its conventional planar variant are highlighted. It is concluded that the Trench IGBT is one of the most promising structures in the area of high voltage MOS-controllable switching devices.

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We investigated the UV photoconductivity characteristics of ZnO nanowire field effect transistors (FETs) irradiated by proton beams. After proton beam irradiation (using a beam energy of 10 MeV and a fluence of 10 12 cm -2), the drain current and carrier density in the ZnO nanowire FETs decreased, and the threshold voltage shifted to the positive gate bias direction due to the creation of interface traps at the SiO 2/ZnO nanowire interface by the proton beam. The interface traps produced a higher surface barrier potential and a larger depletion region at the ZnO nanowire surface, affecting the photoconductivity and its decay time. The UV photoconductivity of the proton-irradiated ZnO nanowire FETs was higher and more prolonged than that of the pristine ZnO nanowire FETs. The results extend our understanding of the UV photoconductivity characteristics of ZnO nanowire devices and other materials when irradiated with highly energetic particles. © 2012 Elsevier B.V. All rights reserved.

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Recent development of solution processable organic semiconductors delineates the emergence of a new generation of air-stable, high performance p- and n-type materials. This makes it indeed possible for printed organic complementary circuits (CMOS) to be used in real applications. The main technical bottleneck for organic CMOS to be adopted as the next generation organic integrated circuit is how to deposit and pattern both p- and n-type semiconductor materials with high resolutions at the same time. It represents a significant technical challenge, especially if it can be done for multiple layers without mask alignment. In this paper, we propose a one-step self-aligned fabrication process which allows the deposition and high resolution patterning of functional layers for both p- and n-channel thin film transistors (TFTs) simultaneously. All the dimensional information of the device components is featured on a single imprinting stamp, and the TFT-channel geometry, electrodes with different work functions, p- and n-type semiconductors and effective gate dimensions can all be accurately defined by one-step imprinting and the subsequent pattern transfer process. As an example, we have demonstrated an organic complementary inverter fabricated by 3D imprinting in combination with inkjet printing and the measured electrical characteristics have validated the feasibility of the novel technique. © 2012 Elsevier B.V. All rights reserved.

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In this presentation, we report excellent electrical and optical characteristics of a dual gate photo thin film transistor (TFT) with bi-layer oxide channel, which was designed to provide virgin threshold voltage (V T) control, improve the negative bias illumination temperature stress (NBITS) reliability, and offer high photoconductive gain. In order to address the photo-sensitivity of phototransistor for the incoming light, top transparent InZnO (IZO) gate was employed, which enables the independent gate control of dual gate photo-TFT without having any degradation of its photosensitivity. Considering optimum initial V T and NBITS reliability for the device operation, the top gate bias was judiciously chosen. In addition, the speed and noise performance of the photo-TFT is competitive with silicon photo-transistors, and more importantly, its superiority lies in optical transparency. © 2011 IEEE.

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We demonstrate the growth of multi wall and single wall carbon nanotubes (CNT) onto substrates containing commercial 1-m CMOS integrated circuits. The low substrate temperature growth (450°C) was achieved by using hot filament (1000 °C) to preheat the source gases (C 2H 2 and NH 3) and in situ mass spe-ctroscopy was used to identify the gas species present. Field effect transistors based on Single Walled Carbon Nanotube (SWNT) grown under such conditions were fabricated and examined. CNT growth was performed directly on the passivation layer of the CMOS integrated circuits. Individual n- and p-type CMOS transistors were compared before and after CNT growth. The transistors survive and operate after the CNT growth process, although small degradations are observed in the output current (for p-transistors) and leakage current (for both p- and n-type transistors). © 2010 IEEE.