The local and global stability of confined planar wakes at intermediate Reynolds number

At high Reynolds numbers, wake flows become more globally unstable when they are confined within a duct or between two flat plates. At Reynolds numbers around 100, however, global analyses suggest that such flows become more stable when confined, while local analyses suggest that they become more unstable. The aim of this paper is to resolve this apparent contradiction by examining a set of obstacle-free wakes. In this theoretical and numerical study, we combine global and local stability analyses of planar wake flows at $\mathit{Re}= 100$ to determine the effect of confinement. We find that confinement acts in three ways: it modifies the length of the recirculation zone if one exists, it brings the boundary layers closer to the shear layers, and it can make the flow more locally absolutely unstable. Depending on the flow parameters, these effects work with or against each other to destabilize or stabilize the flow. In wake flows at $\mathit{Re}= 100$ with free-slip boundaries, flows are most globally unstable when the outer flows are 50 % wider than the half-width of the inner flow because the first and third effects work together. In wake flows at $\mathit{Re}= 100$ with no-slip boundaries, confinement has little overall effect when the flows are weakly confined because the first two effects work against the third. Confinement has a strong stabilizing effect, however, when the flows are strongly confined because all three effects work together. By combining local and global analyses, we have been able to isolate these three effects and resolve the apparent contradictions in previous work.

Metastability mechanisms in thin film transistors quantitatively resolved using post-stress relaxation of threshold voltage

A new approach is presented to resolve bias-induced metastability mechanisms in hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs). The post stress relaxation of threshold voltage (V(T)) was employed to quantitatively distinguish between the charge trapping process in gate dielectric and defect state creation in active layer of transistor. The kinetics of the charge de-trapping from the SiN traps is analytically modeled and a Gaussian distribution of gap states is extracted for the SiN. Indeed, the relaxation in V(T) is in good agreement with the theory underlying the kinetics of charge de-trapping from gate dielectric. For the TFTs used in this work, the charge trapping in the SiN gate dielectric is shown to be the dominant metastability mechanism even at bias stress levels as low as 10 V.