Compact double-side liquid-impingement-cooled integrated power electronic module

This paper presents a compact integrated power electronic module (IPEM) which seeks to overcome the volumetric power density limitations of conventional packaging technologies. A key innovation has been the development of a substrate sandwich structure which permits double side cooling of the embedded dies whilst controlling the mechanical stresses both within the module and at the heat exchanger interface. A 3-phase inverter module has been developed, integrating the sandwich structures with high efficiency impingement coolers, delink capacitance and gate drive units. Full details of the IPEM construction and electrical evaluation are given in the paper. © 2007 IEEE.

Optimum design of 1.4KV trench IGBTs - The next generation of high power switching devices

The Trench Insulated Gate Bipolar Transistor (IGBT) is the most promising structure for the next generation of power semiconductor devices with wide applications ranging from motor control (1-4 kV) to HVDC (6.5 kV). Here we present for the first time an optimum design of a 1.4kV Trench IGBT using a new, fully integrated optimisation system comprising process and device simulators and the RSM optimiser. The use of this new TCAD system has contributed largely to realizing devices with characteristics far superior to the previous DMOS generation of IGBTs. Full experimental results on 1.4kV Trench IGBTs which are in excellent agreement with the TCAD predictions are reported.

Direct growth of horizontally aligned carbon nanotubes between electrodes and its application to field-effect transistors

This paper presents direct growth of horizontally aligned carbon nanotubes (CNTs) between two predefined various inter-spacing up to tens of microns of electrodes (pads) and its use as CNT field-effect transistors (CNT-FETs). The catalytic metals were prepared, consisting of iron (Fe), aluminum (Al) and platinum (Pt) triple layers, on the thermal silicon oxide substrate (Pt/Al/Fe/SiO2). Scanning electron microscopy measurements of CNT-FETs from the as-grown samples showed that over 80% of the nanotubes are grown across the catalytic electrodes. Moreover, the number of CNTs across the catalytic electrodes is roughly controllable by adjusting the growth condition. The Al, as the upper layer on Fe electrode, not only plays a role as a barrier to prevent vertical growth but also serves as a porous medium that helps in forming smaller nano-sized Fe particles which would be necessary for lateral growth of CNTs. Back-gate field effect transistors were demonstrated with the laterally aligned CNTs. The on/off ratios in all the measured devices are lower than 100 due to the drain leakage current. ©2010 IEEE.

Efficient carbon nanotube field emitter using electrospun carbon nanofibers as a flexible electrode

Thermal-stable, conductive, and flexible carbon fabric (CF), which is composed of thin carbon fibers prepared by electrospinning, was used for the substrate of carbon nanotube (CNT) field emitter arrays. The field emitter arrays were prepared by chemical vapor deposition (CVD). The current density-electric field characteristics revealed that the CNT field emitter arrays on CF produced a higher current density at a lower turn-on voltage compared to ones on a Si substrate. This emitter integrated with a gate electrode based on hierarchy-structured carbon materials, CNTs on CF, can be used for light sources, displays, and other electronic devices. © 2009 Materials Research Society.

Study of high performance Re-timing using a 40 Gb/s hybrid-integrated mach-zehnder all-optical regenerator

We experimentally show that a hybrid-integrated Mach-Zehnder switch with a high performance gate profile allows retiming of optical signals with an accuracy of 500-700fs even if the input timing jitter is increased to 3ps. © 2004 Optical Society of America.

Tuning of the electronic characteristics of ZnO nanowire field effect transistors by proton irradiation.

We demonstrated a controllable tuning of the electronic characteristics of ZnO nanowire field effect transistors (FETs) using a high-energy proton beam. After a short proton irradiation time, the threshold voltage shifted to the negative gate bias direction with an increase in the electrical conductance, whereas the threshold voltage shifted to the positive gate bias direction with a decrease in the electrical conductance after a long proton irradiation time. The electrical characteristics of two different types of ZnO nanowires FET device structures in which the ZnO nanowires are placed on the substrate or suspended above the substrate and photoluminescence (PL) studies of the ZnO nanowires provide substantial evidence that the experimental observations result from the irradiation-induced charges in the bulk SiO(2) and at the SiO(2)/ZnO nanowire interface, which can be explained by a surface-band-bending model in terms of gate electric field modulation. Our study on the proton-irradiation-mediated functionalization can be potentially interesting not only for understanding the proton irradiation effects on nanoscale devices, but also for creating the property-tailored nanoscale devices.

Nonvolatile memory functionality of ZnO nanowire transistors controlled by mobile protons.

We demonstrated the nonvolatile memory functionality of ZnO nanowire field effect transistors (FETs) using mobile protons that are generated by high-pressure hydrogen annealing (HPHA) at relatively low temperature (400 °C). These ZnO nanowire devices exhibited reproducible hysteresis, reversible switching, and nonvolatile memory behaviors in comparison with those of the conventional FET devices. We show that the memory characteristics are attributed to the movement of protons between the Si/SiO(2) interface and the SiO(2)/ZnO nanowire interface by the applied gate electric field. The memory mechanism is explained in terms of the tuning of interface properties, such as effective electric field, surface charge density, and surface barrier potential due to the movement of protons in the SiO(2) layer, consistent with the UV photoresponse characteristics of nanowire memory devices. Our study will further provide a useful route of creating memory functionality and incorporating proton-based storage elements onto a modified CMOS platform for FET memory devices using nanomaterials.

Growth of carbon nanotubes on fully processed silicon-on-insulator CMOS substrates.

This paper describes the growth of Carbon Nanotubes (CNTs) both aligned and non-aligned on fully processed CMOS substrates containing high temperature tungsten metallization. While the growth method has been demonstrated in fabricating CNT gas sensitive layers for high temperatures SOI CMOS sensors, it can be employed in a variety of applications which require the use of CNTs or other nanomaterials with CMOS electronics. In our experiments we have grown CNTs both on SOI CMOS substrates and SOI CMOS microhotplates (suspended on membranes formed by post-CMOS deep RIE etching). The fully processed SOI substrates contain CMOS devices and circuits and additionally, some wafers contained high current LDMOSFETs and bipolar structures such as Lateral Insulated Gate Bipolar Transistors. All these devices were used as test structures to investigate the effect of additional post-CMOS processing such as CNT growth, membrane formation, high temperature annealing, etc. Electrical characterisation of the devices with CNTs were performed along with SEM and Raman spectroscopy. The CNTs were grown both at low and high temperatures, the former being compatible with Aluminium metallization while the latter being possible through the use of the high temperature CMOS metallization (Tungsten). In both cases we have found that there is no change in the electrical behaviour of the CMOS devices, circuits or the high current devices. A slight degradation of the thermal performance of the CMOS microhotplates was observed due to the extra heat dissipation path created by the CNT layers, but this is expected as CNTs exhibit a high thermal conductance. In addition we also observed that in the case of high temperature CNT growth a slight degradation in the manufacturing yield was observed. This is especially the case where large area membranes with a diameter in excess of 500 microns are used.

Dynamical behavior of damped driven coupled single electron simple harmonic oscillators

Coherent coupling between a large number of qubits is the goal for scalable approaches to solid state quantum information processing. Prototype systems can be characterized by spectroscopic techniques. Here, we use pulsed-continuous wave microwave spectroscopy to study the behavior of electrons trapped at defects within the gate dielectric of a sol-gel-based high-k silicon MOSFET. Disorder leads to a wide distribution in trap properties, allowing more than 1000 traps to be individually addressed in a single transistor within the accessible frequency domain. Their dynamical behavior is explored by pulsing the microwave excitation over a range of times comparable to the phase coherence time and the lifetime of the electron in the trap. Trap occupancy is limited to a single electron, which can be manipulated by resonant microwave excitation and the resulting change in trap occupancy is detected by the change in the channel current of the transistor. The trap behavior is described by a classical damped driven simple harmonic oscillator model, with the phase coherence, lifetime and coupling strength parameters derived from a continuous wave (CW) measurement only. For pulse times shorter than the phase coherence time, the energy exchange between traps, due to the coupling, strongly modulates the observed drain current change. This effect could be exploited for 2-qubit gate operation. The very large number of resonances observed in this system would allow a complex multi-qubit quantum mechanical circuit to be realized by this mechanism using only a single transistor.

Ballistic Single-Electron Quputer

We propose a new solid state implementation of a quantum computer (quputer) using ballistic single electrons as flying qubits in 1D nanowires. We use a single electron pump (SEP) to prepare the initial state and a single electron transistor (SET) to measure the final state. Single qubit gates are implemented using quantum dots as phase shifters and electron waveguide couplers as beam splitters. A Coulomb coupler acts as a 2-qubit gate, using a mutual phase modulation effect. Since the electron phase coherence length in GaAs/AlGaAs heterostructures is of the order of 30$\mu$m, several gates (tens) can be implemented before the system decoheres.

Unified circuit model for the polysilicon TFT

This paper proposes two methods to improve the modelling of thin film transistors (TFTs). The first involves integrating Poissons equation numerically, given a density of trap states and other relevant material parameters including a constant mobility. Theresult is conductance as a numerical function of gate voltage. The second method recognizes that the data for areal conductance found by numerical integration, may easily be found by measurement without making assumptions about the density of trap states.

Correlation between density of states distributions and the fermi level position in interfacial regions of amorphous silicon thin film transistors

This paper investigates the variation of the integrated density of states with conduction activation energy in hydrogenated amorphous silicon thin film transistors. Results are given for two different gate insulator layers, PECVD silicon oxide and thermally grown silicon dioxide. The different gate insulators produce transistors with very different initial transfer characteristics, but the variation of integrated density of states with conduction activation energy is shown to be similar.

Low power all-optical switch in a passive InGaAsP multiple quantum well waveguide

We demonstrate the use of resonant bandfilling nonlinearity in an InGaAsP/InGaAsP Multiple Quantum Well (MQW) waveguide due to photogenerated carriers to obtain switching at pulse powers, which can readily be obtained from an erbium amplified diode laser source. In order to produce gating a polarisation rotation gate was used, which relies on an asymmetry in the nonlinear refraction on the principle axes of the waveguide.

HVIC switch for high-frequency power converters

A high voltage integrated circuit (HVIC) switch designed as a building block for power converters operating up to 13.56 MHz from off-line voltages is presented. A CMOS-compatible, 500 V power device process is used to integrate control circuitry with a high-speed MOS gate driver and high voltage lateral power MOSFET. Fabrication of the HVIC switches has proceeded in two stages. The first batch of devices showed switching times of less than 5 ns for the power switch and good high frequency performance of a level-shifter for driving half bridge converters. In the second phase, a switch that monolithically integrates all the elements required to form a complete high-frequency converter has been designed.

MOS and bipolar gated thyristor: A thyristor with IGBT switching characteristics

The IGBT has become the device of choice in many high-voltage-power electronic applications, by virtue of combining the ease of MOS gate control with an acceptable forward voltage drop. However, designers have retained an interest in MOS gated thyristor structures which have a turn-off capability. These offer low on-state losses as a result of their latching behaviour. Recently, there have been various proposals for dual-gate devices that have a thyristor on-state with IGBT-like switching. Many of these dual gated structures rely on advanced MOS technology, with inherent manufacturing difficulties. The MOS and bipolar gated thyristor offers all the advantages of dual gated performance, while employing standard IGBT processing techniques. The paper describes the MBGT in detail, and presents experimental and simulation results for devices based on realistic commercial processes. It is shown that the MBGT represents a viable power semiconductor device technology, suitable for a diverse range of applications. © IEE, 1998.