Model for quantum efficiency of guided mode plasmonic enhanced silicon Schottky detectors

Plasmonic enhanced Schottky detectors operating on the basis of the internal photoemission process are becoming an attractive choice for detecting photons with sub bandgap energy. Yet, the quantum efficiency of these detectors appears to be low compare to the more conventional detectors which are based on interband transitions in a semiconductor. Hereby we provide a theoretical model to predict the quantum efficiency of guided mode internal photoemission photodetector with focus on the platform of silicon plasmonics. The model is supported by numerical simulations and comparison to experimental results. Finally, we discuss approaches for further enhancement of the quantum efficiency.

Photovoltaic measurements in carbon nanotube - Amorphous silicon core/shell nanowire

Carbon nanotube is one of the promising materials for exploring new concepts in solar energy conversion and photon detection. Here, we report the first experimental realization of a single core/shell nanowire photovoltaic device (2-4μm) based on carbon nanotube and amorphous silicon. Specifically, a multi-walled carbon nanotube (MWNTs) was utilized as the metallic core, on which n-type and intrinsic amorphous silicon layers were coated. A Schottky junction was formed by sputtering a transparent conducting indium-tin-oxide layer to wrap the outer shell of the device. The single coaxial nanowire device showed typical diode ratifying properties with turn-on voltage around 1V and a rectification ratio of 104 when biased at ±2V. Under illumination, it gave an open circuit voltage of ∼0.26V. Our study has shown a simple and useful platform for gaining insight into nanowire charge transport and collection properties. Fundamental studies of such nanowire device are important for improving the efficiency of future nanowire solar cells or photo detectors. © 2012 IEEE.

On chip plasmonic enhanced silicon Schottky detector for telecom wavelengths

We demonstrate an integrated on-chip plasmonic enhanced Schottky detector for telecom wavelengths based on the internal photoemission process. This CMOS compatible device may serve as a promising alternative to the Si-Ge detectors. © 2012 OSA.

On chip plasmonic enhanced silicon schottky detector for telecom wavelengths

We demonstrate an integrated on-chip plasmonic enhanced Schottky detector for telecom wavelengths based on the internal photoemission process. This CMOS compatible device may serve as a promising alternative to the Si-Ge detectors. © 2011 Optical Society of America.

High speed liquid crystal over silicon display based on the flexoelectro-optic effect.

One of the key technologies to evolve in the displays market in recent years is liquid crystal over silicon (LCOS) microdisplays. Traditional LCOS devices and applications such as rear projection televisions, have been based on intensity modulation electro-optical effects, however, recent developments have shown that multi-level phase modulation from these devices is extremely sought after for applications such as holographic projectors, optical correlators and adaptive optics. Here, we propose alternative device geometry based on the flexoelectric-optic effect in a chiral nematic liquid crystal. This device is capable of delivering a multilevel phase shift at response times less than 100 microsec which has been verified by phase shift interferometry using an LCOS test device. The flexoelectric on silicon device, due to its remarkable characteristics, enables the next generation of holographic devices to be realized.

High tuning range AlSi RF MEMS capacitors fabricated with sacrificial amorphous silicon surface micromachining

This paper reports the fabrication and electrical characterization of high tuning range AlSi RF MEMS capacitors. We present experimental results obtained by a surface micromachining process that uses dry etching of sacrificial amorphous silicon to release Al-1%Si membranes and has a low thermal budget (<450 °C) being compatible with CMOS post-processing. The proposed silicon sacrificial layer dry etching (SSLDE) process is able to provide very high Si etch rates (3-15 μm/min, depending on process parameters) with high Si: SiO2 selectivity (>10,000:1). Single- and double-air-gap MEMS capacitors, as well as some dedicated test structures needed to calibrate the electro-mechanical parameters and explore the reliability of the proposed technology, have been fabricated with the new process. S-parameter measurements from 100 MHz up to 2 GHz have shown a capacitance tuning range higher than 100% with the double-air-gap architecture. The tuning range can be enlarged with a proper DC electrical bias of the capacitor electrodes. Finally, the reported results make the proposed MEMS tuneable capacitor a good candidate for above-IC integration in communications applications. © 2004 Elsevier B.V. All rights reserved.