117 resultados para semi-synthetic


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Semi-supervised clustering is the task of clustering data points into clusters where only a fraction of the points are labelled. The true number of clusters in the data is often unknown and most models require this parameter as an input. Dirichlet process mixture models are appealing as they can infer the number of clusters from the data. However, these models do not deal with high dimensional data well and can encounter difficulties in inference. We present a novel nonparameteric Bayesian kernel based method to cluster data points without the need to prespecify the number of clusters or to model complicated densities from which data points are assumed to be generated from. The key insight is to use determinants of submatrices of a kernel matrix as a measure of how close together a set of points are. We explore some theoretical properties of the model and derive a natural Gibbs based algorithm with MCMC hyperparameter learning. The model is implemented on a variety of synthetic and real world data sets.

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Traffic classification using machine learning continues to be an active research area. The majority of work in this area uses off-the-shelf machine learning tools and treats them as black-box classifiers. This approach turns all the modelling complexity into a feature selection problem. In this paper, we build a problem-specific solution to the traffic classification problem by designing a custom probabilistic graphical model. Graphical models are a modular framework to design classifiers which incorporate domain-specific knowledge. More specifically, our solution introduces semi-supervised learning which means we learn from both labelled and unlabelled traffic flows. We show that our solution performs competitively compared to previous approaches while using less data and simpler features. Copyright © 2010 ACM.

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Ground vibration due to underground railways is a significant source of disturbance for people living or working near the subways. The numerical models used to predict vibration levels have inherent uncertainty which must be understood to give confidence in the predictions. A semi-analytical approach is developed herein to investigate the effect of soil layering on the surface vibration of a halfspace where both soil properties and layer inclination angles are varied. The study suggests that both material properties and inclination angle of the layers have significant effect ( ± 10dB) on the surface vibration response. © 2009 IOP Publishing Ltd.

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This work describes the deposition and characterisation of semi-insulating oxygen-doped silicon films for the development of high voltage polycrystalline silicon (poly-Si) circuitry on glass. The performance of a novel poly-Si High Voltage Thin Film Transistor (HVTFT) structure, incorporating a layer of semi-insulating material, has been investigated using a two dimensional device simulator. The semi-insulating layer increases the operating voltage of the HVTFT structure by linearising the potential distribution in the device offset region. A glass compatible semi-insulating layer, suitable for HVTFT applications, has been deposited by the Plasma Enhanced Chemical Vapour Deposition (PECVD) technique from silane (SiH4), nitrous oxide (N2O) and helium (He) gas mixtures. The as-deposited films are furnace annealed at 600°C which is the maximum process temperature. By varying the N2O/SiH4 ratio the conductivity of the annealed films can be accurately controlled up to a maximum of around 10-7 Ω-1cm-1. Helium dilution of the reactant gases improves both film uniformity and reproducibility. Raman analysis shows the as-deposited and annealed films to be completely amorphous. A model for the microstructure of these Semi-Insulating Amorphous Oxygen-Doped Silicon (SIAOS) films is proposed to explain the observed physical and electrical properties.

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This work describes the deposition, annealing and characterisation of semi-insulating oxygen-doped silicon films at temperatures compatible with polysilicon circuitry on glass. The semi-insulating layers are deposited by the plasma enhanced chemical vapour deposition technique from silane (SiH4), nitrous oxide (N2O) and helium (He) gas mixtures at a temperature of 350 °C. The as-deposited films are then furnace annealed at 600 °C which is the maximum process temperature. Raman analysis shows the as-deposited and annealed films to be completely amorphous. The most important deposition variable is the N2O SiH4 gas ratio. By varying the N2O SiH4 ratio the conductivity of the annealed films can be accurately controlled, for the first time, down to a minimum of ≈10-7Ω-1cm-1 where they exhibit a T -1 4 temperature dependence indicative of a hopping conduction mechanism. Helium dilution of the reactant gases is shown to improve both film uniformity and reproducibility. A model for the microstructure of these semi-insulating amorphous oxygen-doped silicon films is proposed to explain the observed physical and electrical properties. © 1995.

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This work describes the annealing and characterisation of semi-insulating oxygen-doped silicon films deposited by the Plasma Enhanced Chemical Vapour Deposition (PECVD) technique from silane (SiH4), nitrous oxide (N2O) and helium (He) gas mixtures. The maximum process temperature is chosen to be compatible with large area polycrystalline silicon (poly-Si) circuitry on glass. The most important deposition variable is shown to be the N2O SiH4 gas ratio. Helium dilution results in improved film uniformity and reproducibility. Raman analysis shows the 'as-deposited' and annealed films to be completely amorphous. A model for the microstructure of these Semi-Insulating Amorphous Oxygen-doped Silicon (SIAOS) films is proposed to explain the observed physical and electrical properties. © 1995.

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A novel slope delay model for CMOS switch-level timing verification is presented. It differs from conventional methods in being semianalytic in character. The model assumes that all input waveforms are trapezoidal in overall shape, but that they vary in their slope. This simplification is quite reasonable and does not seriously affect precision, but it facilitates rapid solution. The model divides the stages in a switch-level circuit into two types. One corresponds to the logic gates, and the other corresponds to logic gates with pass transistors connected to their outputs. Semianalytic modeling for both cases is discussed.