199 resultados para leakage current


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This study explores a number of low-viscosity glass-forming polymers for their suitability as high-speed materials in electrohydrodynamic (EHD) lithography. The use of low-viscosity polymer films significantly reduces the patterning time (to below 10 s) compared to earlier approaches, without compromising the high fidelity of the replicated structures. The rapid pace of this process requires a method to monitor the completion of EHD pattern formation. To this end, the leakage current across the device is monitored and the sigmoidal shape of the current curve is correlated with the various stages of EHD pattern formation.

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A micromachined electrometer, based on the concept of a variable capacitor, has been designed, modeled, fabricated, and tested. The device presented in this paper functions as a modulated variable capacitor, wherein a dc charge to be measured is up-modulated and converted to an ac voltage output, thus improving the signal-to-noise ratio. The device was fabricated in a commercial standard SOI micromachining process without the need for any additional processing steps. The electrometer was tested in both air and vacuum at room temperature. In air, it has a charge-to-voltage conversion gain of 2.06 nV/e, and a measured charge noise floor of 52.4 e/rtHz. To reduce the effects of input leakage current, an electrically isolated capacitor has been introduced between the variable capacitor and input to sensor electronics. Methods to improve the sensitivity and resolution are suggested while the long-term stability of these sensors is modeled and discussed. © 2006 IEEE.

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This paper presents direct growth of horizontally aligned carbon nanotubes (CNTs) between two predefined various inter-spacing up to tens of microns of electrodes (pads) and its use as CNT field-effect transistors (CNT-FETs). The catalytic metals were prepared, consisting of iron (Fe), aluminum (Al) and platinum (Pt) triple layers, on the thermal silicon oxide substrate (Pt/Al/Fe/SiO2). Scanning electron microscopy measurements of CNT-FETs from the as-grown samples showed that over 80% of the nanotubes are grown across the catalytic electrodes. Moreover, the number of CNTs across the catalytic electrodes is roughly controllable by adjusting the growth condition. The Al, as the upper layer on Fe electrode, not only plays a role as a barrier to prevent vertical growth but also serves as a porous medium that helps in forming smaller nano-sized Fe particles which would be necessary for lateral growth of CNTs. Back-gate field effect transistors were demonstrated with the laterally aligned CNTs. The on/off ratios in all the measured devices are lower than 100 due to the drain leakage current. ©2010 IEEE.

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A short channel vertical thin film transistor (VTFT) with 30 nm SiN x gate dielectric is reported for low voltage, high-resolution active matrix applications. The device demonstrates an ON/OFF current ratio as high as 10 9, leakage current in the fA range, and a sub-threshold slope steeper than 0.23 V/dec exhibiting a marked improvement with scaling of the gate dielectric thickness. © 2011 American Institute of Physics.

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This paper reports an extensive analysis of the defect-related localized emission processes occurring in InGaN/GaN-based light-emitting diodes (LEDs) at low reverse- and forward-bias conditions. The analysis is based on combined electrical characterization and spectrally and spatially resolved electroluminescence (EL) measurements. Results of this analysis show that: (i) under reverse bias, LEDs can emit a weak luminescence signal, which is directly proportional to the injected reverse current. Reverse-bias emission is localized in submicrometer-size spots; the intensity of the signal is strongly correlated to the threading dislocation (TD) density, since TDs are preferential paths for leakage current conduction. (ii) Under low forward-bias conditions, the intensity of the EL signal is not uniform over the device area. Spectrally resolved EL analysis of green LEDs identifies the presence of localized spots emitting at 600 nm (i.e., in the yellow spectral region), whose origin is ascribed to localized tunneling occurring between the quantum wells and the barrier layers of the diodes, with subsequent defect-assisted radiative recombination. The role of defects in determining yellow luminescence is confirmed by the high activation energy of the thermal quenching of yellow emission (Ea =0.64&eV). © 2012 IEEE.

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We demonstrate the growth of multi wall and single wall carbon nanotubes (CNT) onto substrates containing commercial 1-m CMOS integrated circuits. The low substrate temperature growth (450°C) was achieved by using hot filament (1000 °C) to preheat the source gases (C 2H 2 and NH 3) and in situ mass spe-ctroscopy was used to identify the gas species present. Field effect transistors based on Single Walled Carbon Nanotube (SWNT) grown under such conditions were fabricated and examined. CNT growth was performed directly on the passivation layer of the CMOS integrated circuits. Individual n- and p-type CMOS transistors were compared before and after CNT growth. The transistors survive and operate after the CNT growth process, although small degradations are observed in the output current (for p-transistors) and leakage current (for both p- and n-type transistors). © 2010 IEEE.

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Carbon nanotube (CNT) based nano electromechanical system (NEMS) were developed to apply to the logic and the memory circuit. The electrical 'on-off' behavior induced by the mechanical movements of CNTs can promise low power consumption in circuit with very low level leakage current. Additionally, the unique vertical structure of nanotubes allows high integration density for devices. © 2012 IEEE.

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A high performance ferroelectric non-volatile memory device based on a top-gate ZnO nanowire (NW) transistor fabricated on a glass substrate is demonstrated. The ZnO NW channel was spin-coated with a poly (vinylidenefluoride-co-trifluoroethylene) (P(VDF-TrFE)) layer acting as a top-gate dielectric without buffer layer. Electrical conductance modulation and memory hysteresis are achieved by a gate electric field induced reversible electrical polarization switching of the P(VDF-TrFE) thin film. Furthermore, the fabricated device exhibits a memory window of ∼16.5 V, a high drain current on/off ratio of ∼105, a gate leakage current below ∼300 pA, and excellent retention characteristics for over 104 s. © 2014 AIP Publishing LLC.

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Most of the current understanding of tip leakage flows has been derived from detailed cascade experiments. However, the cascade model is inherently approximate since it is difficult to simulate the boundary conditions present in a real machine, particularly the secondary flows convecting from the upstream stator row and the relative motion of the casing and blade. This problem is further complicated when considering the high pressure turbine rotors of aero engines, where the high Mach numbers must also be matched in order to correctly model the aerodynamics and heat transfer. More realistic tests can be performed on high-speed turbines, but the experimental fidelity and resolution achievable in such set-ups is limited. In order to examine the differences between cascade models and real-engine behavior, the influence of boundary conditions on the tip leakage flow in an unshrouded high pressure turbine rotor is investigated using RANS calculations. This study examines the influence of the rotor inlet condition and relative casing motion. A baseline calculation with a simplified inlet condition and no relative endwall motion exhibits similar behavior to cascade studies. Only minor changes to the leakage flow are induced by introducing either a more realistic inlet condition or relative casing motion. However when both of these conditions are applied simultaneously the pattern of leakage flow is very different, with ingestion of flow over much of the early suction surface. The paper explores the physical processes driving this change and the impact on leakage losses and modeling requirements. Copyright © 2013 by ASME.