151 resultados para Switching Frequency
Resumo:
Compact Fluorescent Lamps (CFL) incorporating electronic ballasts are widely used in lighting. In many cases the ability to dim the lamp is a requirement Dimming can be achieved by varying the voltage supplied to the inverter or by changing the switching frequency of the inverter. The effect of dimming by both approaches on the power losses in the inverter is studied in this work. The lamp and associated inverter has been modeled in PSPICE, using a behavioral model for the CFL. Predicted losses are in good agreement with experimental data obtained from calorimetry. The model was then used to determine the distribution of losses within the inverter, enabling a comparison of the effects of the two dimming methods to be made. © 2006 IEEE.
Resumo:
Compact fluorescent lamps (CFLs) incorporating electronic ballasts are widely used in lighting. In many cases, the ability to dim the lamp is a requirement. Dimming can be achieved by varying the switching frequency of the inverter or by changing the voltage supplied to the inverter. The effect of dimming by both approaches on the power losses in the inverter is studied in this work. The lamp and associated inverter has been modeled in Pspice, using a behavioral model for the CFL. Predicted losses are in good agreement with experimental data obtained from calorimetry. After verification, the model was then used to determine the distribution of losses within the inverter, enabling a comparison of the effects of the two dimming methods to be made. © 2011 IEEE.
Resumo:
This paper presents the results of experimental and simulation investigations of the breakdown of losses in a small inverter fed induction motor. Factors that are considered include the impact of skew, excitation voltage waveform shape and PWM switching frequency. Detailed finite element simulations of the motor performance are carried out for the various conditions, with simulation results compared to calorimetric test results. © 2005 IEEE.
Resumo:
A fully integrated 0.18 μm DC-DC buck converter using a low-swing "stacked driver" configuration is reported in this paper. A high switching frequency of 660 MHz reduces filter components to fit on chip, but this suffers from high switching losses. These losses are reduced using: 1) low-swing drivers; 2) supply stacking; and 3) introducing a charge transfer path to deliver excess charge from the positive metal-oxide semiconductor drive chain to the load, thereby recycling the charge. The working prototype circuit converts 2.2 to 0.75-1.0 V at 40-55 mA. Design and simulation of an improved circuit is also included that further improves the efficiency by enhancing the charge recycling path, providing automated zero voltage switching (ZVS) operation, and synchronizing the half-swing gating signals. © 2009 IEEE.
Resumo:
The design and manufacture of a prototype chip level power supply is described, with both simulated and experimental results. Of particular interest is the inclusion of a fully integrated on-chip LC filter. A high switching frequency of 660MHz and the design of a device drive circuit reduce losses by supply stacking, low-swing signaling and charge recycling. The paper demonstrates that a chip level converter operating at high frequency can be built and shows how this can be achieved, using zero voltage switching techniques similar to those commonly used in larger converters. Both simulations and experimental data from a fabricated circuit in 0.18μm CMOS are included. The circuit converts 2.2V to 0.75∼1.0V at ∼55mA. ©2008 IEEE.
Resumo:
High-power converters usually need longer dead-times than their lower-power counterparts and a lower switching frequency. Also due to the complicated assembly layout and severe variations in parasitics, in practice the conventional dead-time specific adjustment or compensation for high-power converters is less effective, and usually this process is time-consuming and bespoke. For general applications, minimising or eliminating dead-time in the gate drive technology is a desirable solution. With the growing acceptance of power electronics building blocks (PEBB) and intelligent power modules (IPM), gate drives with intelligent functions are in demand. Smart functions including dead time elimination/minimisation can improve modularity, flexibility and reliability. In this paper, a dead-time minimisation using Active Voltage Control (AVC) gate drive is presented. © 2012 IEEE.
Resumo:
A high voltage integrated circuit (HVIC) switch designed as a building block for power converters operating up to 13.56 MHz from off-line voltages is presented. A CMOS-compatible, 500 V power device process is used to integrate control circuitry with a high-speed MOS gate driver and high voltage lateral power MOSFET. Fabrication of the HVIC switches has proceeded in two stages. The first batch of devices showed switching times of less than 5 ns for the power switch and good high frequency performance of a level-shifter for driving half bridge converters. In the second phase, a switch that monolithically integrates all the elements required to form a complete high-frequency converter has been designed.
Resumo:
The aim of this paper is to survey a range of applications of high-frequency asymptotic methods in aeroacoustics. Specifically, we are concerned with problems associated with noise generation, propagation and scattering as found in large modern aeroengines. With regard to noise generation, we consider the interaction between high-frequency vortical waves and thin aerofoils, with particular emphasis being placed on the way in which the vortical waves act on the non-uniform mean flow around the aerofoil. A ray-theoretic description of the resulting sound as it propagates along the engine intake is then presented, followed by consideration of the diffraction of these rays by the (possibly asymmetric) intake lip to produce sound in the far field. A range of more detailed possible extensions is also presented.