Evaluation of termination techniques for 4H-SiC PiN diodes and trench JFETs

An investigation concerning suitable termination techniques for 4H-SiC trench JFETs is presented. Field plates, p+ floating rings and junction termination extension techniques are used to terminate 1.2kV class PiN diodes. The fabricated PiN diodes evaluated here have a similar design to trench JFETs. Therefore, the conclusions for PiN diodes can be applied to JFET structures as well. Numerical simulations are also used to illustrate the effect of the terminations on the diodes' blocking mode behaviour.

Evidence of quantum lateral confinement in side-gated resonant tunnelling diodes formed by patterned substrate regrowth

MBE regrowth on patterned np-GaAs wafers has been used to fabricate GaAs/AlGaAs double barrier resonant tunnel diodes with a side-gate in the plane of the quantum well. The physical diameters vary from 1 to 20 μm. For a nominally 1 μm diameter diode the peak current is reduced by more than 95% at a side-gate voltage of -2 V at 1.5 K, which we estimate corresponds to an active tunnel region diameter of 75 nm ± 10 nm. At high gate biases additional structure appears in the conductance data. Differential I-V measurements show a linear dependence of the spacing of subsidiary peaks on gate bias indicating lateral quantum confinement. © 1996 American Institute of Physics.