Low penalty cascaded operation of a monolithically integrated Quantum Dot 1×8 port optical switch

A novel Quantum Dot monolithically integrated 1×8 switch is shown to provide robust routing of data at 10Gb/s modulation rates. Two cascaded switches providing, 1×64 functionality, operate with a power penalty of only 0.9dB. © VDE VERLAG GMBH.

A 660MHz ZVS DC-DC converter using gate-driver charge-recycling in 0.18μm CMOS with an integrated output filter

The design and manufacture of a prototype chip level power supply is described, with both simulated and experimental results. Of particular interest is the inclusion of a fully integrated on-chip LC filter. A high switching frequency of 660MHz and the design of a device drive circuit reduce losses by supply stacking, low-swing signaling and charge recycling. The paper demonstrates that a chip level converter operating at high frequency can be built and shows how this can be achieved, using zero voltage switching techniques similar to those commonly used in larger converters. Both simulations and experimental data from a fabricated circuit in 0.18μm CMOS are included. The circuit converts 2.2V to 0.75∼1.0V at ∼55mA. ©2008 IEEE.

16 chip, 18 Gchips/s walsh-code implementation of an ECDMA access network using two time-shifted FIR filters

We demonstrate for the first time an electronically processed Walsh Code with 16 chips at 18Gchip/s. An auto-cross correlation ratio of 18.1dB is achieved between two orthogonal codes after transmission over 10km of SMF. © 2009 OSA.