3 resultados para Hardware Acceleration


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El objetivo de este proyecto es desarrollar una plataforma hardware capaz de sintetizar sonidos a partir de fragmentos grabados, y de ser controlado mediante un dispositivo MIDI. Para ello se utilizará: - una placa de prototipado que incluye un dispositivo programable (FPGA) y un CODEC para la grabación/reproducción de audio digital. - un teclado MIDI.

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Singular Value Decomposition (SVD) is a key linear algebraic operation in many scientific and engineering applications. In particular, many computational intelligence systems rely on machine learning methods involving high dimensionality datasets that have to be fast processed for real-time adaptability. In this paper we describe a practical FPGA (Field Programmable Gate Array) implementation of a SVD processor for accelerating the solution of large LSE problems. The design approach has been comprehensive, from the algorithmic refinement to the numerical analysis to the customization for an efficient hardware realization. The processing scheme rests on an adaptive vector rotation evaluator for error regularization that enhances convergence speed with no penalty on the solution accuracy. The proposed architecture, which follows a data transfer scheme, is scalable and based on the interconnection of simple rotations units, which allows for a trade-off between occupied area and processing acceleration in the final implementation. This permits the SVD processor to be implemented both on low-cost and highend FPGAs, according to the final application requirements.

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[ES]Este trabajo describe una serie de mejoras aplicables a un kit comercial de robot humanoide Robonova, con el fin de que este reproduzca el comportamiento cinemático del ser humano con mayor autonomía. Entre ellas destacan la implementación de sensores infrarrojos, sensores de posición, cámaras de visión y conexiones en serie de servomotores. Todo ello controlado desde un ordenador de placa reducida Raspberry Pi.