Structural relaxation and chain dynamics in polymer melts : a computational investigation on the role of the intramolecular barriers

149 p. : il. col.

Algorithms for colour image processing based on neurological models

373 p. : il., gráf., fot., tablas

Contributions to unsupervised and supervised learning with applications in digital image processing

311 p. : il.

FTT-MA: A Flexible Time-Triggered Middleware Architecture for Time Sensitive, Resource-Aware AmI Systems

There is an increasing number of Ambient Intelligence (AmI) systems that are time-sensitive and resource-aware. From healthcare to building and even home/office automation, it is now common to find systems combining interactive and sensing multimedia traffic with relatively simple sensors and actuators (door locks, presence detectors, RFIDs, HVAC, information panels, etc.). Many of these are today known as Cyber-Physical Systems (CPS). Quite frequently, these systems must be capable of (1) prioritizing different traffic flows (process data, alarms, non-critical data, etc.), (2) synchronizing actions in several distributed devices and, to certain degree, (3) easing resource management (e.g., detecting faulty nodes, managing battery levels, handling overloads, etc.). This work presents FTT-MA, a high-level middleware architecture aimed at easing the design, deployment and operation of such AmI systems. FTT-MA ensures that both functional and non-functional aspects of the applications are met even during reconfiguration stages. The paper also proposes a methodology, together with a design tool, to create this kind of systems. Finally, a sample case study is presented that illustrates the use of the middleware and the methodology proposed in the paper.

A Computational Module Assembled from Different Protease Family Motifs Identifies PI PLC from Bacillus cereus as a Putative Prolyl Peptidase with a Serine Protease Scaffold

Proteolytic enzymes have evolved several mechanisms to cleave peptide bonds. These distinct types have been systematically categorized in the MEROPS database. While a BLAST search on these proteases identifies homologous proteins, sequence alignment methods often fail to identify relationships arising from convergent evolution, exon shuffling, and modular reuse of catalytic units. We have previously established a computational method to detect functions in proteins based on the spatial and electrostatic properties of the catalytic residues (CLASP). CLASP identified a promiscuous serine protease scaffold in alkaline phosphatases (AP) and a scaffold recognizing a beta-lactam (imipenem) in a cold-active Vibrio AP. Subsequently, we defined a methodology to quantify promiscuous activities in a wide range of proteins. Here, we assemble a module which encapsulates the multifarious motifs used by protease families listed in the MEROPS database. Since APs and proteases are an integral component of outer membrane vesicles (OMV), we sought to query other OMV proteins, like phospholipase C (PLC), using this search module. Our analysis indicated that phosphoinositide-specific PLC from Bacillus cereus is a serine protease. This was validated by protease assays, mass spectrometry and by inhibition of the native phospholipase activity of PI-PLC by the well-known serine protease inhibitor AEBSF (IC50 = 0.018 mM). Edman degradation analysis linked the specificity of the protease activity to a proline in the amino terminal, suggesting that the PI-PLC is a prolyl peptidase. Thus, we propose a computational method of extending protein families based on the spatial and electrostatic congruence of active site residues.

Advances towards behaviour-based indoor robotic exploration

215 p.

Adaptive Scalable SVD Unit for Fast Processing of Large LSE Problems

Singular Value Decomposition (SVD) is a key linear algebraic operation in many scientific and engineering applications. In particular, many computational intelligence systems rely on machine learning methods involving high dimensionality datasets that have to be fast processed for real-time adaptability. In this paper we describe a practical FPGA (Field Programmable Gate Array) implementation of a SVD processor for accelerating the solution of large LSE problems. The design approach has been comprehensive, from the algorithmic refinement to the numerical analysis to the customization for an efficient hardware realization. The processing scheme rests on an adaptive vector rotation evaluator for error regularization that enhances convergence speed with no penalty on the solution accuracy. The proposed architecture, which follows a data transfer scheme, is scalable and based on the interconnection of simple rotations units, which allows for a trade-off between occupied area and processing acceleration in the final implementation. This permits the SVD processor to be implemented both on low-cost and highend FPGAs, according to the final application requirements.

4th European Conference on Energy Efficiency and Sustainability in Architecture and Planning : Donostia-San Sebastián, 1-3 Julio 2013

XXXII Cursos de Verano de la UPV/EHU

5th European Conference on Energy Efficiency and Sustainability in Architecture and Planning : Donostia-San Sebastián, 7-9 Julio 2014

XXXIII Cursos de Verano de la UPV/EHU

6th European Conference on Energy Efficiency and Sustainability in Architecture and Planning

[ES]Esta obra recoge las comunicaciones seleccionadas para el 6º Congreso Europeo sobre Eficiencia Energética y Sostenibilidad en Arquitectura, organizado por el grupo de investigación Calidad de Vida en Arquitectura de la Universidad del País Vasco/Euskal Herriko Unibertsitatea. El congreso, que se celebra en el marco de los XXXIV Cursos de Verano de la UPV/EHU, aborda en esta cuarta edición el tema “Ciudades en riesgo: resiliencia y redundancia”. Alrededor de este tema general se desarrollan cinco ponencias magistrales, a cargo de Margaretha Breil (Centro Euro-Mediterráneo para el Cambio Climático), Cristina Garzillo Leemhuis (ICLEI), Ignasi Fontanals (OptiCits), Juan Carlos Barrios Montenegro (Global Action Plan) y Manuel Valdés López (Ajuntament de Barcelona). Además, 24 comunicaciones seleccionadas por el comité científico presentarán trabajos de investigaciones actuales en las sesiones orales y póster. Es objetivo paralelo del congreso es fortalecer las líneas de investigación en eficiencia energética y sostenibilidad de los grupos de investigación y formación de la UPV/ EHU comprometidos con esta propuesta, con objeto de colaborar en el reforzamiento de la I D i en su ámbito de conocimiento y apoyar la apuesta específica de los Gobiernos Central y Vasco, así como de otras instituciones nacionales e internacionales respecto a las actividades de I D i en las materias relacionadas con el cambio climático, la eficiencia energética y la sostenibilidad ambiental [ENG] This work contains the selected abstracts of the 6th European Conference on Energy Efficiency and Sustainability in Architecture and Planning, organized by the research group Quality of life in Architecture of the University of the Basque Country. The conference is part of the XXXIV Summer Courses of the UPV/EHU and deals, in its fourth edition, with the topic “Cities at risk: resilience and redundancy”. Around this general theme there are five invited speakers: Margaretha Breil (Euro-Mediterranean Centre for Climate Change), Cristina Garzillo Leemhuis (ICLEI), Ignasi Fontanals (OptiCits), Juan Carlos Barrios Montenegro (Global Action Plan) y Manuel Valdés López (Barcelona City Council). 24 abstracts additional have been selected by the scientific committee that offer actual research works in presentations and posters. The purpose of the conferences is to strengthen the investigation lines in energy efficiency and sustainability of the research and education groups of the University of the Basque Country (UPV/EHU) involved, with the purpose of collaborating in the reinforcement of the I D i in its field of knowledge, and support the specific projects of the Central and Basque Governments, as well as other national and international institutions related to the I Di activities in similar fields of climate change, energy efficiency and environmental sustainability.

Contributions to the efficient use of general purpose coprocessors: kernel density estimation as case study

142 p.

Computational study of the vortex path variation with the VG height

An extensive range of conventional, vane-type, passive vortex generators (VGs) are in use for successful applications of flow separation control. In most cases, the VG height is designed with the same thickness as the local boundary layer at the VG position. However, in some applications, these conventional VGs may produce excess residual drag. The so-called low-profile VGs can reduce the parasitic drag associated to this kind of passive control devices. As suggested by many authors, low-profile VGs can provide enough momentum transfer over a region several times their own height for effective flow-separation control with much lower drag. The main objective of this work is to study the variation of the path and the development of the primary vortex generated by a rectangular VG mounted on a flat plate with five different device heights h = delta, h(1) = 0.8 delta, h(2) = 0.6 delta, h(3) = 0.4 delta and h(4) = 0.2 delta, where delta is the local boundary layer thickness. For this purpose, computational simulations have been carried out at Reynolds number Re = 1350 based on the height of the conventional VG h = 0.25m with the angle of attack of the vane to the oncoming flow beta = 18.5 degrees. The results show that the VG scaling significantly affects the vortex trajectory and the peak vorticity generated by the primary vortex.

System architecture and deployment scenarios for SESAME: Small cEllS coordinAtion for Multi-tenancy and Edge services

The surge of the Internet traffic with exabytes of data flowing over operators mobile networks has created the need to rethink the paradigms behind the design of the mobile network architecture. The inadequacy of the 4G UMTS Long term Evolution (LTE) and even of its advanced version LTE-A is evident, considering that the traffic will be extremely heterogeneous in the near future and ranging from 4K resolution TV to machine-type communications. To keep up with these changes, academia, industries and EU institutions have now engaged in the quest for new 5G technology. In this paper we present the innovative system design, concepts and visions developed by the 5G PPP H2020 project SESAME (Small cEllS coordinAtion for Multi-tenancy and Edge services). The innovation of SESAME is manifold: i) combine the key 5G small cells with cloud technology, ii) promote and develop the concept of Small Cellsas- a-Service (SCaaS), iii) bring computing and storage power at the mobile network edge through the development of nonx86 ARM technology enabled micro-servers, and iv) address a large number of scenarios and use cases applying mobile edge computing. Topics: