Using Buildroot for building Embedded Linux Systems

This document describes the basic steps to developed and embedded Linux-based system using the BeagleBoard. The document has been specifically written to use a BeagleBoard development system based on the OMAP `processor.

Development of Embedded Linux Applications Using ZedBoard

The purpose of this document is to create a modest integration guide for embedding a Linux Operating System on ZedBoard development platform, based on Xilinx’s Zynq-7000 All Programmable System on Chip which contains a dual core ARM Cortex-A9 and a 7 Series FPGA Artix-7. The integration process has been structured in four chapters according to the logic generation of the different parts that compose the embedded system. With the intention of automating the generation process of a complete Linux distribution specific for ZedBoard platform, BuildRoot development platform it is used. Once the embedding process finished, it was decided to add to the system the required functionalities for adding support for IEEE1588 Standard for Precision Clock Synchronization Protocol for Networked Measurement and Control Systems, through a user space Linux program which implements the protocol. That PTP user space implementation program has been cross-compiled, executed on target and tested for evaluating the functionalities added. RESUMEN El propósito de este documento es crear una modesta guía de integración de un sistema operativo Linux para la plataforma de desarrollo ZedBoard, basada en un System on Chip del fabricante Xilinx llamado Zynq-7000. Este System on Chip está compuesto por un procesador de doble núcleo ARM Cortex-A9 y una FPGA de la Serie 7 equiparable a una Artix-7. El proceso de integración se ha estructurado en cuatro grandes capítulos que se rigen según el orden lógico de generación de las distintas partes por las que el sistema empotrado está compuesto. Con el ánimo de automatizar el proceso de creación de una distribución de Linux específica para la plataforma ZedBoard, se ha utilizado la plataforma de desarrollo BuildRoot. Una vez terminado el proceso de integración del sistema empotrado, se procedió a dar dotar al sistema de las funcionalidades necesarias para dar soporte al estándar de sincronización de relojes en redes de área local, PTP IEEE1588, a través de una implementación del mismo en un programa de lado de usuario el cual ha sido compilado, ejecutado y testeado para evaluar el correcto funcionamiento de las funcionalidades añadidas.

Using Buildroot for building Embedded Linux Systems with the Raspberry-PI

This document describes the basic steps to developed and embedded Linux-based system using the Raspberry PI board. The document has been specifically written to use a RaspBerry-PI development system based on the BCM2835 processor. All the software elements used have a GPL license.

Embedded Linux integration using Linuxlink tool and peripheral driver development for Zedboard

This project is divided into two main parts: The first part shows the integration of an Embedded Linux operating system on a development hardware platform named Zedboard. This platform contains a Zynq-7000 System on Chip (Soc) which is composed by two dual core ARM Cortex-A9 processors and a FPGA Artix-7. The Embedded Linux is built with Linuxlink, a Timesys tool. Meanwhile, the platform hardware configuration is done with Xilinx Vivado. The system is loaded with an SD card which requires to have every files needed for the booting process and for the operation. Some of these files are generated with Xilinx SDK software. The second part starts up from the system already built to integrate a peripheral in the Zynq-7000 FPGA. Also the drivers for controlling the peripheral from the operating system are developed. Finally, a user space program is created to test both of them. RESUMEN. Este proyecto consta de dos partes: La primera muestra la integración de un sistema operativo Linux embebido en una plataforma de desarrollo hardware llamada Zedboard. Esta plataforma utiliza un System on Chip (SoC) Zynq-7000 que está formado por dos procesadores ARM Cortex-A9 de doble núcleo y una FPGA Artix-7. El Linux embebido se construye utilizando la herramienta Linuxlink de Timesys, mientras que el hardware de la plataforma de desarrollo se configura con Vivado de Xilinx. El sistema se carga en una tarjeta SD que debe tener todos los archivos necesarios para completar el arranque y hacer funcionar el sistema. Algunos de esos archivos se generan con la herramienta SDK de Xilinx. En la segunda parte se utiliza el sistema construido para integrar un periférico en la FPGA del Zynq-7000, haciendo uso de Vivado, y se desarrollan los drivers necesarios para utilizarlo mediante el sistema operativo. Para probar esta última parte se desarrolla un programa de espacio de usuario.

Desarrollo de aplicaciones basadas en Linux Embedded en una arquitectura basada en Cyclone V SoC (System on Chip) de Altera

We attempt to integrate and start up the set of necessary tools to deploy the design cycle of embedded systems based on Embedded Linux on a "Cyclone V SoC" made by Altera. First, we will analyze the available tools for designing the hardware system of the SoCkit development kit, made by Arrow, which has a "Cyclone V SoC" system (based on a "ARM Cortex-A9 MP Core" architecture). When designing the SoCkit board hardware, we will create a new peripheral to integrate it into the hardware system, so it can be used as any other existent resource of the SoCkit board previously configured. Next, we will analyze the tools to generate an Embedded Linux distribution adapted to the SoCkit board. In order to generate the Linux distribution we will use, on the one hand, a software package from Yocto recommended by Altera; on the other hand, the programs and tools of Altera, Embedded Development Suite. We will integrate all the components needed to build the Embedded Linux distribution, creating a complete and functional system which can be used for developing software applications. Finally, we will study the programs for developing and debugging applications in C or C++ language that will be executed in this hardware platform, then we will program a Linux application as an example to illustrate the use of SoCkit board resources. RESUMEN Se pretende integrar y poner en funcionamiento el conjunto de herramientas necesarias para desplegar el ciclo de diseño de sistemas embebidos basados en "Embedded Linux" sobre una "Cyclone V SoC" de Altera. En primer lugar, se analizarán las diversas herramientas disponibles para diseñar el sistema hardware de la tarjeta de desarrollo SoCkit, fabricada por Arrow, que dispone de un sistema "Cyclone V SoC" (basado en una arquitectura "ARM Cortex A9 MP Core"). En el diseño hardware de la SoCkit se creará un periférico propio y se integrará en el sistema, pudiendo ser utilizado como cualquier otro recurso de la tarjeta ya existente y configurado. A continuación, también se analizarán las herramientas para generar una distribución de "Embedded Linux" adaptado a la placa SoCkit. Para generar la distribución de Linux se utilizará, por una parte, un paquete software de Yocto recomendado por Altera y, por otra parte, las propias herramientas y programas de Altera. Se integrarán todos los componentes necesarios para construir la distribución Linux, creando un sistema completo y funcional que se pueda utilizar para el desarrollo de aplicaciones software. Por último, se estudiarán las herramientas para el diseño y depuración de aplicaciones en lenguaje C ó C++ que se ejecutarán en esta plataforma hardware. Se pretende desarrollar una aplicación de ejemplo para ilustrar el uso de los recursos más utilizados de la SoCkit.

Integration of embedded data processing algorithms inside PAMELA devices

PAMELA (Phased Array Monitoring for Enhanced Life Assessment) SHMTM System is an integrated embedded ultrasonic guided waves based system consisting of several electronic devices and one system manager controller. The data collected by all PAMELA devices in the system must be transmitted to the controller, who will be responsible for carrying out the advanced signal processing to obtain SHM maps. PAMELA devices consist of hardware based on a Virtex 5 FPGA with a PowerPC 440 running an embedded Linux distribution. Therefore, PAMELA devices, in addition to the capability of performing tests and transmitting the collected data to the controller, have the capability of perform local data processing or pre-processing (reduction, normalization, pattern recognition, feature extraction, etc.). Local data processing decreases the data traffic over the network and allows CPU load of the external computer to be reduced. Even it is possible that PAMELA devices are running autonomously performing scheduled tests, and only communicates with the controller in case of detection of structural damages or when programmed. Each PAMELA device integrates a software management application (SMA) that allows to the developer downloading his own algorithm code and adding the new data processing algorithm to the device. The development of the SMA is done in a virtual machine with an Ubuntu Linux distribution including all necessary software tools to perform the entire cycle of development. Eclipse IDE (Integrated Development Environment) is used to develop the SMA project and to write the code of each data processing algorithm. This paper presents the developed software architecture and describes the necessary steps to add new data processing algorithms to SMA in order to increase the processing capabilities of PAMELA devices.An example of basic damage index estimation using delay and sum algorithm is provided.

Energy/power consumption model for an embedded processor board

This dissertation, whose research has been conducted at the Group of Electronic and Microelectronic Design (GDEM) within the framework of the project Power Consumption Control in Multimedia Terminals (PCCMUTE), focuses on the development of an energy estimation model for the battery-powered embedded processor board. The main objectives and contributions of the work are summarized as follows: A model is proposed to obtain the accurate energy estimation results based on the linear correlation between the performance monitoring counters (PMCs) and energy consumption. the uniqueness of the appropriate PMCs for each different system, the modeling methodology is improved to obtain stable accuracies with slight variations among multiple scenarios and to be repeatable in other systems. It includes two steps: the former, the PMC-filter, to identify the most proper set among the available PMCs of a system and the latter, the k-fold cross validation method, to avoid the bias during the model training stage. The methodology is implemented on a commercial embedded board running the 2.6.34 Linux kernel and the PAPI, a cross-platform interface to configure and access PMCs. The results show that the methodology is able to keep a good stability in different scenarios and provide robust estimation results with the average relative error being less than 5%. Este trabajo fin de máster, cuya investigación se ha desarrollado en el Grupo de Diseño Electrónico y Microelectrónico (GDEM) en el marco del proyecto PccMuTe, se centra en el desarrollo de un modelo de estimación de energía para un sistema empotrado alimentado por batería. Los objetivos principales y las contribuciones de esta tesis se resumen como sigue: Se propone un modelo para obtener estimaciones precisas del consumo de energía de un sistema empotrado. El modelo se basa en la correlación lineal entre los valores de los contadores de prestaciones y el consumo de energía. Considerando la particularidad de los contadores de prestaciones en cada sistema, la metodología de modelado se ha mejorado para obtener precisiones estables, con ligeras variaciones entre escenarios múltiples y para replicar los resultados en diferentes sistemas. La metodología incluye dos etapas: la primera, filtrado-PMC, que consiste en identificar el conjunto más apropiado de contadores de prestaciones de entre los disponibles en un sistema y la segunda, el método de validación cruzada de K iteraciones, cuyo fin es evitar los sesgos durante la fase de entrenamiento. La metodología se implementa en un sistema empotrado que ejecuta el kernel 2.6.34 de Linux y PAPI, un interfaz multiplataforma para configurar y acceder a los contadores. Los resultados muestran que esta metodología consigue una buena estabilidad en diferentes escenarios y proporciona unos resultados robustos de estimación con un error medio relativo inferior al 5%.

Desing and Validation of a Light Inference System to Support Embedded Context Reasoning

Embedded context management in resource-constrained devices (e.g. mobile phones, autonomous sensors or smart objects) imposes special requirements in terms of lightness for data modelling and reasoning. In this paper, we explore the state-of-the-art on data representation and reasoning tools for embedded mobile reasoning and propose a light inference system (LIS) aiming at simplifying embedded inference processes offering a set of functionalities to avoid redundancy in context management operations. The system is part of a service-oriented mobile software framework, conceived to facilitate the creation of context-aware applications—it decouples sensor data acquisition and context processing from the application logic. LIS, composed of several modules, encapsulates existing lightweight tools for ontology data management and rule-based reasoning, and it is ready to run on Java-enabled handheld devices. Data management and reasoning processes are designed to handle a general ontology that enables communication among framework components. Both the applications running on top of the framework and the framework components themselves can configure the rule and query sets in order to retrieve the information they need from LIS. In order to test LIS features in a real application scenario, an ‘Activity Monitor’ has been designed and implemented: a personal health-persuasive application that provides feedback on the user’s lifestyle, combining data from physical and virtual sensors. In this case of use, LIS is used to timely evaluate the user’s activity level, to decide on the convenience of triggering notifications and to determine the best interface or channel to deliver these context-aware alerts.d

Corrosion behaviour of new duplex stainless steel reinforcements embedded in chloride contaminated concrete

The use of reinforcing stainless steels (SS) in concrete have proved to be one of the most effective methods to guarantee the passivity of reinforced concrete structures exposed to chloride contaminated environment. The present research studies the corrosion behaviour of a new duplex SS reinforcements with low nickel content (LND) (more economicaly compatible) is compared with the conventional austenitic AISI 304 SS and duplex AISI 2304 SS. Corrosion behaviour of ribbed SS reinforcements was studied in mortars with chloride content (0, 0.4, 2 and 4% Cl ⎯ ) using linear polarization resistance and potentiostatic pulses technique, Ecorr and Rp values were monitored over the exposure time. The obtained icorr data for the new duplex stainless steel LND no afforded passivity breakdown after one year exposure

Numerical analysis of mixe-mode fracture of brickwork masonry with embedded discontinuity elements

One of the common pathologies of brickwork masonry structural elements and walls is the cracking associated with the differential settlements and/or excessive deflections of the slabs along the life of the structure. The scarce capacity of the masonry in order to accompany the structural elements that surround it, such as floors, beams or foundations, in their movements makes the brickwork masonry to be an element that frequently presents this kind of problem. This problem is a fracture problem, where the wall is cracked under mixed mode fracture: tensile and shear stresses combination, under static loading. Consequently, it is necessary to advance in the simulation and prediction of brickwork masonry mechanical behaviour under tensile and shear loading. The quasi-brittle behaviour of the brickwork masonry can be studied using the cohesive crack model whose application to other quasibrittle materials like concrete has traditionally provided very satisfactory results.

Development of corrosion of steel bars embedded in mortar made with slag from secondary metallurgy

The aim of this work is to study the evolution of the corrosion rate of reinforcements embedded in mortar specimens that have been partly or fully replaced by the sand ladle furnace white slag. Prisms are manufactured mortar 6cm x 8cm x 2cm in which are embedded reinforcing steel bars of 6mm diameter B500SD. At the time of mixing were added varying amounts of chloride ion content by weight of cement (0%, 0.4%, 0.8%, 1.2%, 2%). The specimens were made totally or partially replacing the white slag, getting four different mixes depending on the degree of substitution. After curing the specimens for 28 days in moist chambers proceeded to dry up naturally. Here are gradually dampened by its conservation in a moist chamber, periodically measuring the corrosion rate of the bars using the technique of polarization curve. The results, in terms of corrosion current and corrosion potential, were compared with those obtained on standard samples, without replacement by slag aggregate. The analysis of results allows us to know, depending on the type of mortar used, the chloride threshold with the depassivation produced steel and the corrosion rates achieved in steels in the active state in terms of mortar moisture, obtained from qualitatively using gravimetric techniques. The results achieved to date support the conclusion that no significant differences in the behavior against corrosion induced by chloride ions, between the steel bars embedded in standard samples and the steel bars embedded in samples including with aggregates from slag. Both the chloride threshold resulting in the depassivation steel as the corrosion rate reached through the bars in an active state are very similar in both types of mortars when they have the same moisture content.

Bio-inspired FPGA Architecture for Self-Calibration of an Image Compression Core based on Wavelet Transforms in Embedded Systems

A generic bio-inspired adaptive architecture for image compression suitable to be implemented in embedded systems is presented. The architecture allows the system to be tuned during its calibration phase. An evolutionary algorithm is responsible of making the system evolve towards the required performance. A prototype has been implemented in a Xilinx Virtex-5 FPGA featuring an adaptive wavelet transform core directed at improving image compression for specific types of images. An Evolution Strategy has been chosen as the search algorithm and its typical genetic operators adapted to allow for a hardware friendly implementation. HW/SW partitioning issues are also considered after a high level description of the algorithm is profiled which validates the proposed resource allocation in the device fabric. To check the robustness of the system and its adaptation capabilities, different types of images have been selected as validation patterns. A direct application of such a system is its deployment in an unknown environment during design time, letting the calibration phase adjust the system parameters so that it performs efcient image compression. Also, this prototype implementation may serve as an accelerator for the automatic design of evolved transform coefficients which are later on synthesized and implemented in a non-adaptive system in the final implementation device, whether it is a HW or SW based computing device. The architecture has been built in a modular way so that it can be easily extended to adapt other types of image processing cores. Details on this pluggable component point of view are also given in the paper.

Cost and energy efficient reconfigurable embedded platform using Spartan-6 FPGAs

Modern FPGAs with run-time reconfiguration allow the implementation of complex systems offering both the flexibility of software-based solutions combined with the performance of hardware. This combination of characteristics, together with the development of new specific methodologies, make feasible to reach new points of the system design space, and make embedded systems built on these platforms acquire more and more importance. However, the practical exploitation of this technique in fields that traditionally have relied on resource restricted embedded systems, is mainly limited by strict power consumption requirements, the cost and the high dependence of DPR techniques with the specific features of the device technology underneath. In this work, we tackle the previously reported problems, designing a reconfigurable platform based on the low-cost and low-power consuming Spartan-6 FPGA family. The full process to develop the platform will be detailed in the paper from scratch. In addition, the implementation of the reconfiguration mechanism, including two profiles, is reported. The first profile is a low-area and low-speed reconfiguration engine based mainly on software functions running on the embedded processor, while the other one is a hardware version of the same engine, implemented in the FPGA logic. This reconfiguration hardware block has been originally designed to the Virtex-5 family, and its porting process will be also described in this work, facing the interoperability problem among different families.

A visual object counter based on a multimodal data association for embedded systems with limited computational power

A low complex but highly-efficient object counter algorithm is presented that can be embedded in hardware with a low computational power. This is achieved by a novel soft-data association strategy that can handle multimodal distributions.

Aplicación de representación gráfica de datos y/o señales en entorno GNU/LINUX

El contenido de este PFC supone el desarrollo de una aplicación gráfica en el entorno GNU/LINUX. La aplicación debe representar en la pantalla gráficos procedentes de una fuente externa (un fichero, una tarjeta de adquisición de datos, otra aplicación, etc.) Debe permitir las siguientes funcionalidades: Representar la señal uniendo puntos o marcándolos como símbolos. Debe gestionar de forma adecuada el zoom. Debe permitir exportar la gráfica a formatos SVG y PDF. Debe permitir mostrar varias señales superpuestas para poder compararlas. Opcionalmente debe permitir arrastrar y soltar (“drag and drop”). ABSTRACT The content of the thesis is the development of a graphical application in GNU / Linux environment. The application must render graphics on the screen from an external source (a file, a data acquisition card, other applications, etc..) It must allow the following functionality: Joining dots represent the signal or marking them as symbols. Must properly manage the zoom. Allow export the graph to SVG and PDF formats. Allow display multiple signals superimposed for comparison. Optionally should allow drag and drop.