20 resultados para attack injection
em Universidad Politécnica de Madrid
Resumo:
The laminar low Mach number flow of a gas in a tube is analyzed for very small and very large values of the inlet-to-wall temperature ratio. When this ratio tends to zero, pressure forces confine the cold gas to a thin core around the axis of the tube. This core is neatly bounded by an ablation front that consumes it at a finite distance from the tube inlet. When the temperature ratio tends to infinity, the temperature of the gas increases smoothly from the wall to the axis of the tube and the shear stress and heat flux are positive at the wall despite the fact that the viscosity and thermal conductivity of the gas scaled with their inlet values tend to zero at the wall.
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Since the Three Mile Island accident, an important focus of pressurized water reactor (PWR) transient analyses has been a small-break loss-of-coolant accident (SBLOCA). In 2002, the discovery of thinning of the vessel head wall at the Davis Besse nuclear power plant reactor indicated the possibility of an SBLOCA in the upper head of the reactor vessel as a result of circumferential cracking of a control rod drive mechanism penetration nozzle - which has cast even greater importance on the study of SBLOCAs. Several experimental tests have been performed at the Large Scale Test Facility to simulate the behavior of a PWR during an upper-head SBLOCA. The last of these tests, Organisation for Economic Co-operation and Development Nuclear Energy Agency Rig of Safety Assessment (OECD/NEA ROSA) Test 6.1, was performed in 2005. This test was simulated with the TRACE 5.0 code, and good agreement with the experimental results was obtained. Additionally, a broad analysis of an upper-head SBLOCA with high-pressure safety injection failed in a Westinghouse PWR was performed taking into account different accident management actions and conditions in order to check their suitability. This issue has been analyzed also in the framework of the OECD/NEA ROSA project and the Code Applications and Maintenance Program (CAMP). The main conclusion is that the current emergency operating procedures for Westinghouse reactor design are adequate for these kinds of sequences, and they do not need to be modified.
Resumo:
Recent studies have dealt with the possibility of increasing light absorption by using the so-called electric field enhancement taking place within the grooves of metallic gratings. In order to evaluate the potential improvements derived from the absorption increase, we employ a simplified model to analyze the low-injection behaviour of a solar cell with a metallic grating back-reflector.
Resumo:
Nowadays, the electronic industry demands small and complex parts as a consequence of the miniaturization of electronic devices. Powder injection moulding (PIM) is an emerging technique for the manufacturing of magnetic ceramics. In this paper, we analyze the sintering process, between 900 °C and 1300 °C, of Ni–Zn ferrites prepared by PIM. In particular, the densification behaviour, microstructure and mechanical properties of samples with toroidal and bar geometry were analyzed at different temperatures. Additionally, the magnetic behaviour (complex permeability and magnetic losses factor) of these compacts was compared with that of samples prepared by conventional powder compaction. Finally, the mechanical behaviour (elastic modulus, flexure strength and fracture toughness) was analyzed as a function of the powder loading of feedstock. The final microstructure of prepared samples was correlated with the macroscopic behaviour. A good agreement was established between the densities and population of defects found in the materials depending on the sintering conditions. In general, the final mechanical and magnetic properties of PIM samples were enhanced relative those obtained by uniaxial compaction.
Resumo:
A rapid, economic and sensitive chemiluminescent method involving flow-injection analysis was developed for the determination of dipyrone in pharmaceutical preparations. The method is based on the chemiluminescent reaction between quinolinic hydrazide and hydrogen peroxide in a strongly alkaline medium, in which vanadium(IV) acts as a catalyst. Principal chemical and physical variables involved in the flow-injection system were optimized using a modified simplex method. The variations in the quantum yield observed when dipyrone was present in the reaction medium were used to determine the concentration of this compound. The proposed method requires no preconcentration steps and reliably quantifies dipyrone over the linear range 1–50 µg/mL. In addition, a sample throughput of 85 samples/h is possible. Copyright © 2011 John Wiley & Sons, Ltd.
Resumo:
Experimental research has been performed to relate specific cement characteristics to deterioration due to sulfate and sea water attack after five year exposure, and to study different test method suitability for sulfate and marine resistance. Sulfate resistance testing have been performed on mortar specimens made with fifteen cement types of statistically diverse chemical composition according to European standard EN 197-1, most of them with sulfate resistant properties according to Spanish regulations. Chemical and mechanical characteristics were studied to determine the variation in properties of selected cements. SO3 content, type and amount of additions, C3A, and C4AF content were used to examine relationships between these characteristics and the results of sulfate resistance. Mortar specimens testing using Na2SO4 as the aggressive medium according to ASTM 1012 (with w/c ratio adapted to prENV 196-X:1995) was performed using each type of cement; identical specimens were also stored in sea water, and in lime saturated water (blank condition), up to five year age. Additionally these cements were tested conforming ASTM 452 and Koch and Steinegger test. Recommended acceptance limits for sulfate resistance of cements concerning to each used test method were evaluated in order to explore their suitability. Relationships between cement characteristics, degradation, expansive products obtained by X-ray diffraction techniques and maximum expansion after applied storage treatments, were correlated at final age, to redefine cement characteristics for sulfate resistant and marine resistant Portland cement
Resumo:
CO2 capture and storage (CCS) projects are presently developed to reduce the emission of anthropogenic CO2 into the atmosphere. CCS technologies are expected to account for the 20% of the CO2 reduction by 2050. One of the main concerns of CCS is whether CO2 may remain confined within the geological formation into which it is injected since post-injection CO2 migration in the time scale of years, decades and centuries is not well understood. Theoretically, CO2 can be retained at depth i) as a supercritical fluid (physical trapping), ii) as a fluid slowly migrating in an aquifer due to long flow path (hydrodynamic trapping), iii) dissolved into ground waters (solubility trapping) and iv) precipitated secondary carbonates. Carbon dioxide will be injected in the near future (2012) at Hontomín (Burgos, Spain) in the frame of the Compostilla EEPR project, led by the Fundación Ciudad de la Energía (CIUDEN). In order to detect leakage in the operational stage, a pre-injection geochemical baseline is presently being developed. In this work a geochemical monitoring design is presented to provide information about the feasibility of CO2 storage at depth.
Resumo:
In this paper the very first geochemical and isotopic data related to surface and spring waters and dissolved gases in the area of Hontomín–Huermeces (Burgos, Spain) are presented and discussed. Hontomín–Huermeces has been selected as a pilot site for the injection of pure (>99%) CO2. Injection and monitoring wells are planned to be drilled close to 6 oil wells completed in the 1980s for which detailed stratigraphical logs are available, indicating the presence of a confined saline aquifer at the depth of about 1500 m into which less than 100,000 tons of iquid CO2 will be injected, possibly starting in 2013. The chemical and features of the spring waters suggest that they are related to a shallow hydrogeological system as the concentration of the Total Dissolved Solids approaches 800 mg/L with a Ca2+(Mg2+)-HCO3− composition, similar to that of the surface waters. This is also supported by the oxygen and hydrogen isotopic ratios that have values lying between those of the Global and the Mediterranean Meteoric Water Lines. Some spring waters close to the oil wells are haracterized by relatively high concentrations of NO3− (up to 123 mg/L), unequivocally suggesting an anthropogenic source that adds to the main water–rock interaction processes. The latter can be referred to Ca-Mg-carbonate and, at a minor extent, Al-silicate dissolution, being the outcropping sedimentary rocks characterized by Palaeozoic to Quaternary rocks. Anomalous concentrations of Cl−, SO42−, As, B and Ba were measured in two springs discharging a few hundred meters from the oil wells and in the Rio Ubierna. These contents are significantly higher than those of the whole set of the studied waters and are possibly indicative of mixing processes, although at very low extent, between deep and shallow aquifers. No evidence of deep-seated gases interacting with the Hontomín–Huermeces waters was recognized in the chemistry of the disolved gases. This is likely due to the fact that they are mainly characterized by an atmospheric source as highlighted by the high contents of N2, O2 and Ar and by N2/Ar ratios that approach that of ASW (Air Saturated Water) and possibly masking any contribution related to a deep source. Nevertheless, significant concentrations (up to 63% by vol.) of isotopically negative CO2 (<−17.7‰ V-PDB) were found in some water samples, likely related to a biogenic source. The geochemical and isotopic data of this work are of particular importance when a monitoring program will be established to verify whether CO2 leakages, induced by the injection of this greenhouse gas, may be affecting the quality of the waters in the shallow hydrological circuits at Hontomín–Huermeces. In this respect, carbonate chemistry, the isotopic carbon of dissolved CO2 and TDIC (Total Dissolved Inorganic Carbon) and selected trace elements can be considered as useful parameters to trace the migration of the injected CO2 into near-surface environments.
Resumo:
From the end of 2013 and during the following two years, 20 kt of CO2sc are planned to be injected in a saline reservoir (1500 m depth) at the Hontomín site (NE Spain). The target aquifers are Lower Jurassic limestone formations which are sealed by Lower Cretaceous clay units at the Hontomín site (NE Spain). The injection of CO2 is part of the activities committed in the Technology Development phase of the EC-funded OXYCFB300 project (European Energy Program for Recovery – EEPR, http://www.compostillaproject.eu), which include CO2 injection strategies, risk assessment, and testing and validating monitoring methodologies and techniques. Among the monitoring works, the project is intended to prove that present-day technology is able to monitor the evolution of injected CO2 in the reservoir and to detect potential leakage. One of the techniques is the measurement of CO2 flux at the soil–atmosphere interface, which includes campaigns before, during and after the injection operations. In this work soil CO2 flux measurements in the vicinity of oil borehole, drilled in the eighties and named H-1 to H-4, and injection and monitoring wells were performed using an accumulation chamber equipped with an IR sensor. Seven surveys were carried out from November 2009 to summer 2011. More than 4000 measurements were used to determine the baseline flux of CO2 and its seasonal variations. The measured values were low (from 5 to 13 g m−2 day−1) and few outliers were identified, mainly located close to the H-2 oil well. Nevertheless, these values cannot be associated to a deep source of CO2, being more likely related to biological processes, i.e. soil respiration. No anomalies were recognized close to the deep fault system (Ubierna Fault) detected by geophysical investigations. There, the CO2 flux is indeed as low as other measurement stations. CO2 fluxes appear to be controlled by the biological activity since the lowest values were recorded during autumn-winter seasons and they tend to increase in warm periods. Two reference CO2 flux values (UCL50 of 5 g m−2 d−1 for non-ploughed areas in autumn–winter seasons and 3.5 and 12 g m−2 d−1 for in ploughed and non-ploughed areas, respectively, in spring–summer time, and UCL99 of 26 g m−2 d−1 for autumn–winter in not-ploughed areas and 34 and 42 g m−2 d−1 for spring–summer in ploughed and not-ploughed areas, respectively) were calculated. Fluxes higher than these reference values could be indicative of possible leakage during the operational and post-closure stages of the storage project.
Resumo:
In this study, the very first geochemical and isotopic data related to surface and spring waters and dissolved gases in the area of Hontomín-Huermeces (Burgos, Spain) are presented and discussed. Hontomín-Huermeces was selected as a pilot site for the injection of pure (>99 %) CO2. Injection and monitoring wells are planned to be drilled close to 6 oil wells completed in the 1980’s. Stratigraphical logs indicate the presence of a confined saline aquifer at the depth of about 1,500 m into which less than 100,000 tons of liquid CO2 will be injected, possibly starting in 2013. The chemical and isotopic features of the spring waters suggest the occurrence of a shallow aquifer having a Ca2+(Mg2+)-HCO3- composition, relatively low salinity (Total Dissolved Solids _800 mg/L) and a meteoric isotopic signature. Some spring waters close to the oil wells are characterized by relatively high concentrations of NO3- (up to 123 mg/L), unequivocally indicating anthropogenic contamination that adds to the main water-rock interaction processes. The latter can be referred to Ca-Mg-carbonate and, at a minor extent, Al-silicate dissolution, being the outcropping sedimentary rocks characterized by Palaeozoic to Quaternary rocks. Anomalous concentrations of Cl-, SO42-, As, B and Ba were measured in two springs discharging a few hundreds meters from the oil wells and in the Rio Ubierna, possibly indicative of mixing processes, although at very low extent, between deep and shallow aquifers. Gases dissolved in spring waters show relatively high concentrations of atmospheric species, such as N2, O2 and Ar, and isotopically negative CO2 (<-17.7 h V-PDB), likely related to a biogenic source, possibly masking any contribution related to a deep source. The geochemical and isotopic data of this study are of particular importance when a monitoring program will be established to verify whether CO2 leakages, induced by the injection of this greenhouse gas, may affect the quality of the waters of the shallow Hontomín-Huermeces hydrological circuit. In this respect, carbonate chemistry, the isotopic carbon of dissolved CO2 and TDIC (Total Dissolved Inorganic Carbon) and selected trace elements can be considered as useful parameters to trace the migration of the injected CO2 into near-surface environments.
Resumo:
La configuración de un cilindro acoplado a una semi-esfera, conocida como ’hemispherecylinder’, se considera como un modelo simplificado para numerosas aplicaciones industriales tales como fuselaje de aviones o submarinos. Por tanto, el estudio y entendimiento de los fenómenos fluidos que ocurren alrededor de dicha geometría presenta gran interés. En esta tesis se muestra la investigación del origen y evolución de los, ya conocidos, patrones de flujo (burbuja de separación, vórtices ’horn’ y vórtices ’leeward’) que se dan en esta geometría bajo condiciones de flujo separado. Para ello se han llevado a cabo simulaciones numéricas (DNS) y ensayos experimentales usando la técnica de Particle Image Velocimetry (PIV), para una variedad de números de Reynolds (Re) y ángulos de ataque (AoA). Se ha aplicado sobre los resultados numéricos la teoría de puntos críticos obteniendo, por primera vez para esta geometría, un diagrama de bifurcaciones que clasifica los diferentes regímenes topológicos en función del número de Reynolds y del ángulo de ataque. Se ha llevado a cabo una caracterización completa sobre el origen y la evolución de los patrones estructurales característicos del cuerpo estudiado. Puntos críticos de superficie y líneas de corriente tridimensionales han ayudado a describir el origen y la evolución de las principales estructuras presentes en el flujo hasta alcanzar un estado de estabilidad desde el punto de vista topológico. Este estado se asocia con el patrón de los vórtices ’horn’, definido por una topología característica que se encuentra en un rango de números de Reynolds muy amplio y en regímenes compresibles e incompresibles. Por otro lado, con el objeto de determinar las estructuras presentes en el flujo y sus frecuencias asociadas, se han usado distintas técnicas de análisis: Proper Orthogonal Decomposition (POD), Dynamic Mode Decomposition (DMD) y análisis de Fourier. Dichas técnicas se han aplicado sobre los datos experimentales y numéricos, demostrándose la buena concordancia entre ambos resultados. Finalmente, se ha encontrado en ambos casos, una frecuencia dominante asociada con una inestabilidad de los vórtices ’leeward’. ABSTRACT The hemisphere-cylinder may be considered as a simplified model for several geometries found in industrial applications such as aircrafts’ fuselages or submarines. Understanding the complex flow phenomena that surrounds this particular geometry is therefore of major industrial interest. This thesis presents an investigation of the origin and evolution of the complex flow pattern; i.e. separation bubbles, horn vortices and leeward vortices, around the hemisphere-cylinder under separated flow conditions. To this aim, threedimensional Direct Numerical Simulations (DNS) and experimental tests, using Particle Image Velocimetry (PIV) techniques, have been performed for a variety of Reynolds numbers (Re) and angles of attack (AoA). Critical point theory has been applied to the numerical simulations to provide, for the first time for this geometry, a bifurcation diagram that classifies the different flow topology regimes as a function of the Reynolds number and the angle of attack. A complete characterization about the origin and evolution of the complex structural patterns of this geometry has been put in evidence. Surface critical points and surface and volume streamlines were able to describe the main flow structures and their strong dependence with the flow conditions up to reach the structurally stable state. This state was associated with the pattern of the horn vortices, found on ranges from low to high Reynolds numbers and from incompressible to compressible regimes. In addition, different structural analysis techniques have been employed: Proper Orthogonal Decomposition (POD), Dynamic Mode Decomposition (DMD) and Fourier analysis. These techniques have been applied to the experimental and numerical data to extract flow structure information (i.e. modes and frequencies). Experimental and numerical modes are shown to be in good agreement. A dominant frequency associated with an instability of the leeward vortices has been identified in both, experimental and numerical results.
Resumo:
BIOMECANBICA DE LA ESGRIMA
Resumo:
Cognitive wireless sensor network (CWSN) is a new paradigm, integrating cognitive features in traditional wireless sensor networks (WSNs) to mitigate important problems such as spectrum occupancy. Security in cognitive wireless sensor networks is an important problem since these kinds of networks manage critical applications and data. The specific constraints of WSN make the problem even more critical, and effective solutions have not yet been implemented. Primary user emulation (PUE) attack is the most studied specific attack deriving from new cognitive features. This work discusses a new approach, based on anomaly behavior detection and collaboration, to detect the primary user emulation attack in CWSN scenarios. Two non-parametric algorithms, suitable for low-resource networks like CWSNs, have been used in this work: the cumulative sum and data clustering algorithms. The comparison is based on some characteristics such as detection delay, learning time, scalability, resources, and scenario dependency. The algorithms have been tested using a cognitive simulator that provides important results in this area. Both algorithms have shown to be valid in order to detect PUE attacks, reaching a detection rate of 99% and less than 1% of false positives using collaboration.
Resumo:
Esta tesis doctoral se centra principalmente en técnicas de ataque y contramedidas relacionadas con ataques de canal lateral (SCA por sus siglas en inglés), que han sido propuestas dentro del campo de investigación académica desde hace 17 años. Las investigaciones relacionadas han experimentado un notable crecimiento en las últimas décadas, mientras que los diseños enfocados en la protección sólida y eficaz contra dichos ataques aún se mantienen como un tema de investigación abierto, en el que se necesitan iniciativas más confiables para la protección de la información persona de empresa y de datos nacionales. El primer uso documentado de codificación secreta se remonta a alrededor de 1700 B.C., cuando los jeroglíficos del antiguo Egipto eran descritos en las inscripciones. La seguridad de la información siempre ha supuesto un factor clave en la transmisión de datos relacionados con inteligencia diplomática o militar. Debido a la evolución rápida de las técnicas modernas de comunicación, soluciones de cifrado se incorporaron por primera vez para garantizar la seguridad, integridad y confidencialidad de los contextos de transmisión a través de cables sin seguridad o medios inalámbricos. Debido a las restricciones de potencia de cálculo antes de la era del ordenador, la técnica de cifrado simple era un método más que suficiente para ocultar la información. Sin embargo, algunas vulnerabilidades algorítmicas pueden ser explotadas para restaurar la regla de codificación sin mucho esfuerzo. Esto ha motivado nuevas investigaciones en el área de la criptografía, con el fin de proteger el sistema de información ante sofisticados algoritmos. Con la invención de los ordenadores se ha acelerado en gran medida la implementación de criptografía segura, que ofrece resistencia eficiente encaminada a obtener mayores capacidades de computación altamente reforzadas. Igualmente, sofisticados cripto-análisis han impulsado las tecnologías de computación. Hoy en día, el mundo de la información ha estado involucrado con el campo de la criptografía, enfocada a proteger cualquier campo a través de diversas soluciones de cifrado. Estos enfoques se han fortalecido debido a la unificación optimizada de teorías matemáticas modernas y prácticas eficaces de hardware, siendo posible su implementación en varias plataformas (microprocesador, ASIC, FPGA, etc.). Las necesidades y requisitos de seguridad en la industria son las principales métricas de conducción en el diseño electrónico, con el objetivo de promover la fabricación de productos de gran alcance sin sacrificar la seguridad de los clientes. Sin embargo, una vulnerabilidad en la implementación práctica encontrada por el Prof. Paul Kocher, et al en 1996 implica que un circuito digital es inherentemente vulnerable a un ataque no convencional, lo cual fue nombrado posteriormente como ataque de canal lateral, debido a su fuente de análisis. Sin embargo, algunas críticas sobre los algoritmos criptográficos teóricamente seguros surgieron casi inmediatamente después de este descubrimiento. En este sentido, los circuitos digitales consisten típicamente en un gran número de celdas lógicas fundamentales (como MOS - Metal Oxide Semiconductor), construido sobre un sustrato de silicio durante la fabricación. La lógica de los circuitos se realiza en función de las innumerables conmutaciones de estas células. Este mecanismo provoca inevitablemente cierta emanación física especial que puede ser medida y correlacionada con el comportamiento interno del circuito. SCA se puede utilizar para revelar datos confidenciales (por ejemplo, la criptografía de claves), analizar la arquitectura lógica, el tiempo e incluso inyectar fallos malintencionados a los circuitos que se implementan en sistemas embebidos, como FPGAs, ASICs, o tarjetas inteligentes. Mediante el uso de la comparación de correlación entre la cantidad de fuga estimada y las fugas medidas de forma real, información confidencial puede ser reconstruida en mucho menos tiempo y computación. Para ser precisos, SCA básicamente cubre una amplia gama de tipos de ataques, como los análisis de consumo de energía y radiación ElectroMagnética (EM). Ambos se basan en análisis estadístico y, por lo tanto, requieren numerosas muestras. Los algoritmos de cifrado no están intrínsecamente preparados para ser resistentes ante SCA. Es por ello que se hace necesario durante la implementación de circuitos integrar medidas que permitan camuflar las fugas a través de "canales laterales". Las medidas contra SCA están evolucionando junto con el desarrollo de nuevas técnicas de ataque, así como la continua mejora de los dispositivos electrónicos. Las características físicas requieren contramedidas sobre la capa física, que generalmente se pueden clasificar en soluciones intrínsecas y extrínsecas. Contramedidas extrínsecas se ejecutan para confundir la fuente de ataque mediante la integración de ruido o mala alineación de la actividad interna. Comparativamente, las contramedidas intrínsecas están integradas en el propio algoritmo, para modificar la aplicación con el fin de minimizar las fugas medibles, o incluso hacer que dichas fugas no puedan ser medibles. Ocultación y Enmascaramiento son dos técnicas típicas incluidas en esta categoría. Concretamente, el enmascaramiento se aplica a nivel algorítmico, para alterar los datos intermedios sensibles con una máscara de manera reversible. A diferencia del enmascaramiento lineal, las operaciones no lineales que ampliamente existen en criptografías modernas son difíciles de enmascarar. Dicho método de ocultación, que ha sido verificado como una solución efectiva, comprende principalmente la codificación en doble carril, que está ideado especialmente para aplanar o eliminar la fuga dependiente de dato en potencia o en EM. En esta tesis doctoral, además de la descripción de las metodologías de ataque, se han dedicado grandes esfuerzos sobre la estructura del prototipo de la lógica propuesta, con el fin de realizar investigaciones enfocadas a la seguridad sobre contramedidas de arquitectura a nivel lógico. Una característica de SCA reside en el formato de las fuentes de fugas. Un típico ataque de canal lateral se refiere al análisis basado en la potencia, donde la capacidad fundamental del transistor MOS y otras capacidades parásitas son las fuentes esenciales de fugas. Por lo tanto, una lógica robusta resistente a SCA debe eliminar o mitigar las fugas de estas micro-unidades, como las puertas lógicas básicas, los puertos I/O y las rutas. Las herramientas EDA proporcionadas por los vendedores manipulan la lógica desde un nivel más alto, en lugar de realizarlo desde el nivel de puerta, donde las fugas de canal lateral se manifiestan. Por lo tanto, las implementaciones clásicas apenas satisfacen estas necesidades e inevitablemente atrofian el prototipo. Por todo ello, la implementación de un esquema de diseño personalizado y flexible ha de ser tomado en cuenta. En esta tesis se presenta el diseño y la implementación de una lógica innovadora para contrarrestar SCA, en la que se abordan 3 aspectos fundamentales: I. Se basa en ocultar la estrategia sobre el circuito en doble carril a nivel de puerta para obtener dinámicamente el equilibrio de las fugas en las capas inferiores; II. Esta lógica explota las características de la arquitectura de las FPGAs, para reducir al mínimo el gasto de recursos en la implementación; III. Se apoya en un conjunto de herramientas asistentes personalizadas, incorporadas al flujo genérico de diseño sobre FPGAs, con el fin de manipular los circuitos de forma automática. El kit de herramientas de diseño automático es compatible con la lógica de doble carril propuesta, para facilitar la aplicación práctica sobre la familia de FPGA del fabricante Xilinx. En este sentido, la metodología y las herramientas son flexibles para ser extendido a una amplia gama de aplicaciones en las que se desean obtener restricciones mucho más rígidas y sofisticadas a nivel de puerta o rutado. En esta tesis se realiza un gran esfuerzo para facilitar el proceso de implementación y reparación de lógica de doble carril genérica. La viabilidad de las soluciones propuestas es validada mediante la selección de algoritmos criptográficos ampliamente utilizados, y su evaluación exhaustiva en comparación con soluciones anteriores. Todas las propuestas están respaldadas eficazmente a través de ataques experimentales con el fin de validar las ventajas de seguridad del sistema. El presente trabajo de investigación tiene la intención de cerrar la brecha entre las barreras de implementación y la aplicación efectiva de lógica de doble carril. En esencia, a lo largo de esta tesis se describirá un conjunto de herramientas de implementación para FPGAs que se han desarrollado para trabajar junto con el flujo de diseño genérico de las mismas, con el fin de lograr crear de forma innovadora la lógica de doble carril. Un nuevo enfoque en el ámbito de la seguridad en el cifrado se propone para obtener personalización, automatización y flexibilidad en el prototipo de circuito de bajo nivel con granularidad fina. Las principales contribuciones del presente trabajo de investigación se resumen brevemente a continuación: Lógica de Precharge Absorbed-DPL logic: El uso de la conversión de netlist para reservar LUTs libres para ejecutar la señal de precharge y Ex en una lógica DPL. Posicionamiento entrelazado Row-crossed con pares idénticos de rutado en redes de doble carril, lo que ayuda a aumentar la resistencia frente a la medición EM selectiva y mitigar los impactos de las variaciones de proceso. Ejecución personalizada y herramientas de conversión automática para la generación de redes idénticas para la lógica de doble carril propuesta. (a) Para detectar y reparar conflictos en las conexiones; (b) Detectar y reparar las rutas asimétricas. (c) Para ser utilizado en otras lógicas donde se requiere un control estricto de las interconexiones en aplicaciones basadas en Xilinx. Plataforma CPA de pruebas personalizadas para el análisis de EM y potencia, incluyendo la construcción de dicha plataforma, el método de medición y análisis de los ataques. Análisis de tiempos para cuantificar los niveles de seguridad. División de Seguridad en la conversión parcial de un sistema de cifrado complejo para reducir los costes de la protección. Prueba de concepto de un sistema de calefacción auto-adaptativo para mitigar los impactos eléctricos debido a la variación del proceso de silicio de manera dinámica. La presente tesis doctoral se encuentra organizada tal y como se detalla a continuación: En el capítulo 1 se abordan los fundamentos de los ataques de canal lateral, que abarca desde conceptos básicos de teoría de modelos de análisis, además de la implementación de la plataforma y la ejecución de los ataques. En el capítulo 2 se incluyen las estrategias de resistencia SCA contra los ataques de potencia diferencial y de EM. Además de ello, en este capítulo se propone una lógica en doble carril compacta y segura como contribución de gran relevancia, así como también se presentará la transformación lógica basada en un diseño a nivel de puerta. Por otra parte, en el Capítulo 3 se abordan los desafíos relacionados con la implementación de lógica en doble carril genérica. Así mismo, se describirá un flujo de diseño personalizado para resolver los problemas de aplicación junto con una herramienta de desarrollo automático de aplicaciones propuesta, para mitigar las barreras de diseño y facilitar los procesos. En el capítulo 4 se describe de forma detallada la elaboración e implementación de las herramientas propuestas. Por otra parte, la verificación y validaciones de seguridad de la lógica propuesta, así como un sofisticado experimento de verificación de la seguridad del rutado, se describen en el capítulo 5. Por último, un resumen de las conclusiones de la tesis y las perspectivas como líneas futuras se incluyen en el capítulo 6. Con el fin de profundizar en el contenido de la tesis doctoral, cada capítulo se describe de forma más detallada a continuación: En el capítulo 1 se introduce plataforma de implementación hardware además las teorías básicas de ataque de canal lateral, y contiene principalmente: (a) La arquitectura genérica y las características de la FPGA a utilizar, en particular la Xilinx Virtex-5; (b) El algoritmo de cifrado seleccionado (un módulo comercial Advanced Encryption Standard (AES)); (c) Los elementos esenciales de los métodos de canal lateral, que permiten revelar las fugas de disipación correlacionadas con los comportamientos internos; y el método para recuperar esta relación entre las fluctuaciones físicas en los rastros de canal lateral y los datos internos procesados; (d) Las configuraciones de las plataformas de pruebas de potencia / EM abarcadas dentro de la presente tesis. El contenido de esta tesis se amplia y profundiza a partir del capítulo 2, en el cual se abordan varios aspectos claves. En primer lugar, el principio de protección de la compensación dinámica de la lógica genérica de precarga de doble carril (Dual-rail Precharge Logic-DPL) se explica mediante la descripción de los elementos compensados a nivel de puerta. En segundo lugar, la lógica PA-DPL es propuesta como aportación original, detallando el protocolo de la lógica y un caso de aplicación. En tercer lugar, dos flujos de diseño personalizados se muestran para realizar la conversión de doble carril. Junto con ello, se aclaran las definiciones técnicas relacionadas con la manipulación por encima de la netlist a nivel de LUT. Finalmente, una breve discusión sobre el proceso global se aborda en la parte final del capítulo. El Capítulo 3 estudia los principales retos durante la implementación de DPLs en FPGAs. El nivel de seguridad de las soluciones de resistencia a SCA encontradas en el estado del arte se ha degenerado debido a las barreras de implantación a través de herramientas EDA convencionales. En el escenario de la arquitectura FPGA estudiada, se discuten los problemas de los formatos de doble carril, impactos parásitos, sesgo tecnológico y la viabilidad de implementación. De acuerdo con estas elaboraciones, se plantean dos problemas: Cómo implementar la lógica propuesta sin penalizar los niveles de seguridad, y cómo manipular un gran número de celdas y automatizar el proceso. El PA-DPL propuesto en el capítulo 2 se valida con una serie de iniciativas, desde características estructurales como doble carril entrelazado o redes de rutado clonadas, hasta los métodos de aplicación tales como las herramientas de personalización y automatización de EDA. Por otra parte, un sistema de calefacción auto-adaptativo es representado y aplicado a una lógica de doble núcleo, con el fin de ajustar alternativamente la temperatura local para equilibrar los impactos negativos de la variación del proceso durante la operación en tiempo real. El capítulo 4 se centra en los detalles de la implementación del kit de herramientas. Desarrollado sobre una API third-party, el kit de herramientas personalizado es capaz de manipular los elementos de la lógica de circuito post P&R ncd (una versión binaria ilegible del xdl) convertido al formato XDL Xilinx. El mecanismo y razón de ser del conjunto de instrumentos propuestos son cuidadosamente descritos, que cubre la detección de enrutamiento y los enfoques para la reparación. El conjunto de herramientas desarrollado tiene como objetivo lograr redes de enrutamiento estrictamente idénticos para la lógica de doble carril, tanto para posicionamiento separado como para el entrelazado. Este capítulo particularmente especifica las bases técnicas para apoyar las implementaciones en los dispositivos de Xilinx y su flexibilidad para ser utilizado sobre otras aplicaciones. El capítulo 5 se enfoca en la aplicación de los casos de estudio para la validación de los grados de seguridad de la lógica propuesta. Se discuten los problemas técnicos detallados durante la ejecución y algunas nuevas técnicas de implementación. (a) Se discute el impacto en el proceso de posicionamiento de la lógica utilizando el kit de herramientas propuesto. Diferentes esquemas de implementación, tomando en cuenta la optimización global en seguridad y coste, se verifican con los experimentos con el fin de encontrar los planes de posicionamiento y reparación optimizados; (b) las validaciones de seguridad se realizan con los métodos de correlación y análisis de tiempo; (c) Una táctica asintótica se aplica a un núcleo AES sobre BCDL estructurado para validar de forma sofisticada el impacto de enrutamiento sobre métricas de seguridad; (d) Los resultados preliminares utilizando el sistema de calefacción auto-adaptativa sobre la variación del proceso son mostrados; (e) Se introduce una aplicación práctica de las herramientas para un diseño de cifrado completa. Capítulo 6 incluye el resumen general del trabajo presentado dentro de esta tesis doctoral. Por último, una breve perspectiva del trabajo futuro se expone, lo que puede ampliar el potencial de utilización de las contribuciones de esta tesis a un alcance más allá de los dominios de la criptografía en FPGAs. ABSTRACT This PhD thesis mainly concentrates on countermeasure techniques related to the Side Channel Attack (SCA), which has been put forward to academic exploitations since 17 years ago. The related research has seen a remarkable growth in the past decades, while the design of solid and efficient protection still curiously remain as an open research topic where more reliable initiatives are required for personal information privacy, enterprise and national data protections. The earliest documented usage of secret code can be traced back to around 1700 B.C., when the hieroglyphs in ancient Egypt are scribed in inscriptions. Information security always gained serious attention from diplomatic or military intelligence transmission. Due to the rapid evolvement of modern communication technique, crypto solution was first incorporated by electronic signal to ensure the confidentiality, integrity, availability, authenticity and non-repudiation of the transmitted contexts over unsecure cable or wireless channels. Restricted to the computation power before computer era, simple encryption tricks were practically sufficient to conceal information. However, algorithmic vulnerabilities can be excavated to restore the encoding rules with affordable efforts. This fact motivated the development of modern cryptography, aiming at guarding information system by complex and advanced algorithms. The appearance of computers has greatly pushed forward the invention of robust cryptographies, which efficiently offers resistance relying on highly strengthened computing capabilities. Likewise, advanced cryptanalysis has greatly driven the computing technologies in turn. Nowadays, the information world has been involved into a crypto world, protecting any fields by pervasive crypto solutions. These approaches are strong because of the optimized mergence between modern mathematical theories and effective hardware practices, being capable of implement crypto theories into various platforms (microprocessor, ASIC, FPGA, etc). Security needs from industries are actually the major driving metrics in electronic design, aiming at promoting the construction of systems with high performance without sacrificing security. Yet a vulnerability in practical implementation found by Prof. Paul Kocher, et al in 1996 implies that modern digital circuits are inherently vulnerable to an unconventional attack approach, which was named as side-channel attack since then from its analysis source. Critical suspicions to theoretically sound modern crypto algorithms surfaced almost immediately after this discovery. To be specifically, digital circuits typically consist of a great number of essential logic elements (as MOS - Metal Oxide Semiconductor), built upon a silicon substrate during the fabrication. Circuit logic is realized relying on the countless switch actions of these cells. This mechanism inevitably results in featured physical emanation that can be properly measured and correlated with internal circuit behaviors. SCAs can be used to reveal the confidential data (e.g. crypto-key), analyze the logic architecture, timing and even inject malicious faults to the circuits that are implemented in hardware system, like FPGA, ASIC, smart Card. Using various comparison solutions between the predicted leakage quantity and the measured leakage, secrets can be reconstructed at much less expense of time and computation. To be precisely, SCA basically encloses a wide range of attack types, typically as the analyses of power consumption or electromagnetic (EM) radiation. Both of them rely on statistical analyses, and hence require a number of samples. The crypto algorithms are not intrinsically fortified with SCA-resistance. Because of the severity, much attention has to be taken into the implementation so as to assemble countermeasures to camouflage the leakages via "side channels". Countermeasures against SCA are evolving along with the development of attack techniques. The physical characteristics requires countermeasures over physical layer, which can be generally classified into intrinsic and extrinsic vectors. Extrinsic countermeasures are executed to confuse the attacker by integrating noise, misalignment to the intra activities. Comparatively, intrinsic countermeasures are built into the algorithm itself, to modify the implementation for minimizing the measurable leakage, or making them not sensitive any more. Hiding and Masking are two typical techniques in this category. Concretely, masking applies to the algorithmic level, to alter the sensitive intermediate values with a mask in reversible ways. Unlike the linear masking, non-linear operations that widely exist in modern cryptographies are difficult to be masked. Approved to be an effective counter solution, hiding method mainly mentions dual-rail logic, which is specially devised for flattening or removing the data-dependent leakage in power or EM signatures. In this thesis, apart from the context describing the attack methodologies, efforts have also been dedicated to logic prototype, to mount extensive security investigations to countermeasures on logic-level. A characteristic of SCA resides on the format of leak sources. Typical side-channel attack concerns the power based analysis, where the fundamental capacitance from MOS transistors and other parasitic capacitances are the essential leak sources. Hence, a robust SCA-resistant logic must eliminate or mitigate the leakages from these micro units, such as basic logic gates, I/O ports and routings. The vendor provided EDA tools manipulate the logic from a higher behavioral-level, rather than the lower gate-level where side-channel leakage is generated. So, the classical implementations barely satisfy these needs and inevitably stunt the prototype. In this case, a customized and flexible design scheme is appealing to be devised. This thesis profiles an innovative logic style to counter SCA, which mainly addresses three major aspects: I. The proposed logic is based on the hiding strategy over gate-level dual-rail style to dynamically overbalance side-channel leakage from lower circuit layer; II. This logic exploits architectural features of modern FPGAs, to minimize the implementation expenses; III. It is supported by a set of assistant custom tools, incorporated by the generic FPGA design flow, to have circuit manipulations in an automatic manner. The automatic design toolkit supports the proposed dual-rail logic, facilitating the practical implementation on Xilinx FPGA families. While the methodologies and the tools are flexible to be expanded to a wide range of applications where rigid and sophisticated gate- or routing- constraints are desired. In this thesis a great effort is done to streamline the implementation workflow of generic dual-rail logic. The feasibility of the proposed solutions is validated by selected and widely used crypto algorithm, for thorough and fair evaluation w.r.t. prior solutions. All the proposals are effectively verified by security experiments. The presented research work attempts to solve the implementation troubles. The essence that will be formalized along this thesis is that a customized execution toolkit for modern FPGA systems is developed to work together with the generic FPGA design flow for creating innovative dual-rail logic. A method in crypto security area is constructed to obtain customization, automation and flexibility in low-level circuit prototype with fine-granularity in intractable routings. Main contributions of the presented work are summarized next: Precharge Absorbed-DPL logic: Using the netlist conversion to reserve free LUT inputs to execute the Precharge and Ex signal in a dual-rail logic style. A row-crossed interleaved placement method with identical routing pairs in dual-rail networks, which helps to increase the resistance against selective EM measurement and mitigate the impacts from process variations. Customized execution and automatic transformation tools for producing identical networks for the proposed dual-rail logic. (a) To detect and repair the conflict nets; (b) To detect and repair the asymmetric nets. (c) To be used in other logics where strict network control is required in Xilinx scenario. Customized correlation analysis testbed for EM and power attacks, including the platform construction, measurement method and attack analysis. A timing analysis based method for quantifying the security grades. A methodology of security partitions of complex crypto systems for reducing the protection cost. A proof-of-concept self-adaptive heating system to mitigate electrical impacts over process variations in dynamic dual-rail compensation manner. The thesis chapters are organized as follows: Chapter 1 discusses the side-channel attack fundamentals, which covers from theoretic basics to analysis models, and further to platform setup and attack execution. Chapter 2 centers to SCA-resistant strategies against generic power and EM attacks. In this chapter, a major contribution, a compact and secure dual-rail logic style, will be originally proposed. The logic transformation based on bottom-layer design will be presented. Chapter 3 is scheduled to elaborate the implementation challenges of generic dual-rail styles. A customized design flow to solve the implementation problems will be described along with a self-developed automatic implementation toolkit, for mitigating the design barriers and facilitating the processes. Chapter 4 will originally elaborate the tool specifics and construction details. The implementation case studies and security validations for the proposed logic style, as well as a sophisticated routing verification experiment, will be described in Chapter 5. Finally, a summary of thesis conclusions and perspectives for future work are included in Chapter 5. To better exhibit the thesis contents, each chapter is further described next: Chapter 1 provides the introduction of hardware implementation testbed and side-channel attack fundamentals, and mainly contains: (a) The FPGA generic architecture and device features, particularly of Virtex-5 FPGA; (b) The selected crypto algorithm - a commercially and extensively used Advanced Encryption Standard (AES) module - is detailed; (c) The essentials of Side-Channel methods are profiled. It reveals the correlated dissipation leakage to the internal behaviors, and the method to recover this relationship between the physical fluctuations in side-channel traces and the intra processed data; (d) The setups of the power/EM testing platforms enclosed inside the thesis work are given. The content of this thesis is expanded and deepened from chapter 2, which is divided into several aspects. First, the protection principle of dynamic compensation of the generic dual-rail precharge logic is explained by describing the compensated gate-level elements. Second, the novel DPL is originally proposed by detailing the logic protocol and an implementation case study. Third, a couple of custom workflows are shown next for realizing the rail conversion. Meanwhile, the technical definitions that are about to be manipulated above LUT-level netlist are clarified. A brief discussion about the batched process is given in the final part. Chapter 3 studies the implementation challenges of DPLs in FPGAs. The security level of state-of-the-art SCA-resistant solutions are decreased due to the implementation barriers using conventional EDA tools. In the studied FPGA scenario, problems are discussed from dual-rail format, parasitic impact, technological bias and implementation feasibility. According to these elaborations, two problems arise: How to implement the proposed logic without crippling the security level; and How to manipulate a large number of cells and automate the transformation. The proposed PA-DPL in chapter 2 is legalized with a series of initiatives, from structures to implementation methods. Furthermore, a self-adaptive heating system is depicted and implemented to a dual-core logic, assumed to alternatively adjust local temperature for balancing the negative impacts from silicon technological biases on real-time. Chapter 4 centers to the toolkit system. Built upon a third-party Application Program Interface (API) library, the customized toolkit is able to manipulate the logic elements from post P&R circuit (an unreadable binary version of the xdl one) converted to Xilinx xdl format. The mechanism and rationale of the proposed toolkit are carefully convoyed, covering the routing detection and repairing approaches. The developed toolkit aims to achieve very strictly identical routing networks for dual-rail logic both for separate and interleaved placement. This chapter particularly specifies the technical essentials to support the implementations in Xilinx devices and the flexibility to be expanded to other applications. Chapter 5 focuses on the implementation of the case studies for validating the security grades of the proposed logic style from the proposed toolkit. Comprehensive implementation techniques are discussed. (a) The placement impacts using the proposed toolkit are discussed. Different execution schemes, considering the global optimization in security and cost, are verified with experiments so as to find the optimized placement and repair schemes; (b) Security validations are realized with correlation, timing methods; (c) A systematic method is applied to a BCDL structured module to validate the routing impact over security metric; (d) The preliminary results using the self-adaptive heating system over process variation is given; (e) A practical implementation of the proposed toolkit to a large design is introduced. Chapter 6 includes the general summary of the complete work presented inside this thesis. Finally, a brief perspective for the future work is drawn which might expand the potential utilization of the thesis contributions to a wider range of implementation domains beyond cryptography on FPGAs.
Resumo:
We experimentally investigate high-frequency microwave signal generation using a 1550 nm single-mode VCSEL subject to two-frequency optical injection. We first consider a situation in which the injected signals come from two similar VCSELs. The polarization of the injected light is parallel to that of the injected VCSEL. We obtain that the VCSEL can be locked to one of the injected signals, but the observed microwave signal is originated by beating at the photodetector. In a second situation we consider injected signals that come from two external cavity tunable lasers with a significant increase of the injected power with respect to the VCSEL-by-VCSEL injection case. The polarization of the injected light is orthogonal to that of the free-running slave VCSEL. We show that in this case it is possible to generate a microwave signal inside the VCSEL cavity. © (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.