37 resultados para Nonlinear vibration isolation system
em Universidad Politécnica de Madrid
Resumo:
The existing seismic isolation systems are based on well-known and accepted physical principles, but they are still having some functional drawbacks. As an attempt of improvement, the Roll-N-Cage (RNC) isolator has been recently proposed. It is designed to achieve a balance in controlling isolator displacement demands and structural accelerations. It provides in a single unit all the necessary functions of vertical rigid support, horizontal flexibility with enhanced stability, resistance to low service loads and minor vibration, and hysteretic energy dissipation characteristics. It is characterized by two unique features that are a self-braking (buffer) and a self-recentering mechanism. This paper presents an advanced representation of the main and unique features of the RNC isolator using an available finite element code called SAP2000. The validity of the obtained SAP2000 model is then checked using experimental, numerical and analytical results. Then, the paper investigates the merits and demerits of activating the built-in buffer mechanism on both structural pounding mitigation and isolation efficiency. The paper addresses the problem of passive alleviation of possible inner pounding within the RNC isolator, which may arise due to the activation of its self-braking mechanism under sever excitations such as near-fault earthquakes. The results show that the obtained finite element code-based model can closely match and accurately predict the overall behavior of the RNC isolator with effectively small errors. Moreover, the inherent buffer mechanism of the RNC isolator could mitigate or even eliminate direct structure-tostructure pounding under severe excitation considering limited septation gaps between adjacent structures. In addition, the increase of inherent hysteretic damping of the RNC isolator can efficiently limit its peak displacement together with the severity of the possibly developed inner pounding and, therefore, alleviate or even eliminate the possibly arising negative effects of the buffer mechanism on the overall RNC-isolated structural responses.
Resumo:
The purpose of this Project is, first and foremost, to disclose the topic of nonlinear vibrations and oscillations in mechanical systems and, namely, nonlinear normal modes NNMs to a greater audience of researchers and technicians. To do so, first of all, the dynamical behavior and properties of nonlinear mechanical systems is outlined from the analysis of a pair of exemplary models with the harmonic balanced method. The conclusions drawn are contrasted with the Linear Vibration Theory. Then, it is argued how the nonlinear normal modes could, in spite of their limitations, predict the frequency response of a mechanical system. After discussing those introductory concepts, I present a Matlab package called 'NNMcont' developed by a group of researchers from the University of Liege. This package allows the analysis of nonlinear normal modes of vibration in a range of mechanical systems as extensions of the linear modes. This package relies on numerical methods and a 'continuation algorithm' for the computation of the nonlinear normal modes of a conservative mechanical system. In order to prove its functionality, a two degrees of freedom mechanical system with elastic nonlinearities is analized. This model comprises a mass suspended on a foundation by means of a spring-viscous damper mechanism -analogous to a very simplified model of most suspended structures and machines- that has attached a mass damper as a passive vibration control system. The results of the computation are displayed on frequency energy plots showing the NNMs branches along with modal curves and time-series plots for each normal mode. Finally, a critical analysis of the results obtained is carried out with an eye on devising what they can tell the researcher about the dynamical properties of the system.
Resumo:
Este estudio aborda la recopilación de nuevas tendencias del diseño sismorresistente, enfocándose en la técnica del aislamiento de base, por ser la más efectiva, difundida y utilizada; y el análisis de las ventajas que puede tener una edificación que aplica dicha técnica, desde el punto de vista estructural y económico. Se elige la tipología más frecuente o común de edificios de hormigón armado propensos a ser aislados, que en este caso es un hospital, cuyo modelo empotrado se somete a varias normas sismorresistentes comparando principalmente fuerzas de cortante basal, y considerando la interacción suelo-estructura; para asistir a este cálculo se desarrolla un programa de elementos viga de 6 gdl por nodo en código Matlab. El modelo aislado incluye el análisis de tres combinaciones de tipos de aisladores HDR, LPR y FPS, alternando modelos lineales simplificados de 1 y 3 gdl por piso, evaluando diferencias de respuestas de la estructura, y procediendo a la elección de la combinación que de resultados más convenientes; para la modelación no lineal de cada sistema de aislamiento se utiliza el método explícito de diferencias centrales. Finalmente, se realiza un análisis comparativo de daños esperados en el caso de la ocurrencia del sismo de diseño, utilizando el método rápido y tomando como referencia el desplazamiento espectral del último piso; llegando a dar conclusiones y recomendaciones para el uso de sistemas de aislamiento. This study addresses the collection of new seismic design trends, focusing on base isolation technique, as the most effective and widely used, and the analysis of the advantages in buildings that apply this technique, from the structurally and economically point of view. Choosing the most common types of concrete buildings likely to be isolated, which in this case is a hospital, the fix model is subjected to various seismic codes mainly comparing base shear forces, and considering the soil-structure interaction; for this calculation attend a program of bars 6 dof per node is made in Matlab code. The isolated model includes analysis of three types of isolators combinations HDR, LPR and FPS, alternating simplified linear model of 1 and 3 dof per floor, evaluating differences in the response of the structure, and proceeding to the choice of the combination of results more convenient; for modeling nonlinear each insulation system, the explicit central difference method is used. Finally, a comparative analysis of expected damage in the case of the design earthquake, using a fast combined method and by reference to the spectral displacement of the top floor; reaching conclusions and give recommendations for the use of insulation systems.
Resumo:
A low-cost vibration monitoring system has been developed and installed on an urban steel- plated stress-ribbon footbridge. The system continuously measures: the acceleration (using 18 triaxial MEMS accelerometers distributed along the structure), the ambient temperature and the wind velocity and direction. Automated output-only modal parameter estimation based on the Stochastic Subspace Identification (SSI) is carried out in order to extract the modal parameters, i.e., the natural frequencies, damping ratios and modal shapes. Thus, this paper analyzes the time evolution of the modal parameters over a whole-year data monitoring. Firstly, for similar environmental/operational factors, the uncertainties associated to the time window size used are studied and quantified. Secondly, a methodology to track the vibration modes has been established since several of them with closely-spaced natural frequencies are identified. Thirdly, the modal parameters have been correlated against external factors. It has been shown that this stress-ribbon structure is highly sensitive to temperature variation (frequency changes of more than 20%) with strongly seasonal and daily trends
Resumo:
A good and early fault detection and isolation system along with efficient alarm management and fine sensor validation systems are very important in today¿s complex process plants, specially in terms of safety enhancement and costs reduction. This paper presents a methodology for fault characterization. This is a self-learning approach developed in two phases. An initial, learning phase, where the simulation of process units, without and with different faults, will let the system (in an automated way) to detect the key variables that characterize the faults. This will be used in a second (on line) phase, where these key variables will be monitored in order to diagnose possible faults. Using this scheme the faults will be diagnosed and isolated in an early stage where the fault still has not turned into a failure.
Resumo:
In order to reduce cost and make up for the rising price of silicon, silicon wafers are sliced thinner and wider,eading to weaker wafers and increased breakage rates during fabrication process. In this work we have analysed different cracks origins and their effect on wafer’s mechanical strength. To enhance wafer’s strength some etching methods have been tested. Also, we have analysed wafers from different points of an entire standard production process. Mechanical strength of the wafers has been obtained via the four line bending test and detection of cracks has been tested with Resonance Ultrasonic Vibration (RUV) system, developed by the University of South Florida.
Resumo:
The aim in the current work is the development of a method to characterize force sensors under sinusoidal excitations using a primary standard as the source of traceability. During this work the influence factors have been studied and a method to minimise their contributions, as well as the corrections to be performed under dynamic conditions have been established. These results will allow the realization of an adequate characterization of force sensors under sinusoidal excitations, which will be essential for its further proper use under dynamic conditions. The traceability of the sensor characterization is based in the direct definition of force as mass multiplied by acceleration. To do so, the sensor is loaded with different calibrated loads and is maint ained under different sinusoidal accelerations by means of a vibration shaker system that is able to generate accelerations up to 100 m/s2 with frequencies from 5 Hz up to 2400 Hz. The acceleration is measured by means of a laser vibrometer with traceabili ty to the units of time and length. A multiple channel data acquisition system is also required to simultaneously acquire the electrical output signals of the involved instrument in real time.
Resumo:
Cuando la separación física entre el sistema local y remoto es relativamente corta, el retardo no es perceptible; sin embargo, cuando el manipulador local y el manipulador remoto se encuentran a una distancia lejana uno del otro, el retardo de tiempo ya no es insignificante e influye negativamente en la realización de la tarea. El retardo de tiempo en un sistema de control introduce un atraso de fase que a su vez degrada el rendimiento del sistema y puede causar inestabilidad. Los sistemas de teleoperación pueden sacar provecho de la posibilidad de estar presente en dos lugares simultáneamente, sin embargo, el uso de Internet y otras redes de conmutación de paquetes, tales como Internet2, impone retardos de tiempo variables, haciendo que los esquemas de control ya establecidos elaboren soluciones para hacer frente a inestabilidades causadas por estos retardos de tiempo variables. En este trabajo de tesis se presenta el modelado y análisis de un sistema de teloperación bilateral no lineal de n grados de libertad controlado por convergencia de estado. La comunicación entre el sitio local y remoto se realiza mediante un canal de comunicación con retardo de tiempo. El análisis presentado en este trabajo considera que el retardo puede ser constante o variable. Los principales objetivos de este trabajo son; 1) Desarrollar una arquitectura de control no lineal garantizando la estabilidad del sistema teleoperado, 2) Evaluar la estabilidad del sistema considerando el retardo en la comunicación, y 3) Implementación de los algoritmos desarrollados para probar el desempeño de los mismos en un sistema experimental de 3 grados de libertad. A través de la teoría de Estabilidad de Lyapunov y el funcional Lyapunov-Krasovskii, se demuestra que el sistema de lazo cerrado es asintóticamente estable. Estas conclusiones de estabilidad se han obtenido mediante la integración de la función de Lyapunov y aplicando el Lema de Barbalat. Se demuestra también que se logra sincronizar las posiciones del manipulador local y remoto cuando el operador humano no mueve el manipulador local y el manipulador remoto se mueve libremente. El esquema de control propuesto se ha validado mediante simulación y en forma experimental empleando un sistema de teleoperación real desarrollado en esta tesis doctoral y que consta de un un manipulador serie planar de tres grados de libertad, un manipulador local, PHANTOM Omni, el cual es un dispositivo haptico fabricado que consta de 3 grados de libertad (en fuerza) y que proporciona realimentación de fuerza en los ejes x,y,z. El control en tiempo real se ha diseñado usando el Sistema Operativo en Tiempo Real QuaRC de QUARC en el lado local y el Simulink Real-Time Windows TargetTM en el lado remoto. Para finalizar el resumen se destaca el impacto de esta tesis en el mundo científico a través de los resultados publicados: 2 artículos en revistas con índice de impacto , 1 artículo en una revista indexada en Sistemas, Cibernética e Informática, 7 artículos en congresos y ha obtenido un premio en la 9a. Conferencia Iberoamericana en Sistemas, Cibernética e Informática, 2010. ABSTRACT When the physical separation between the local and remote system is relatively short, the delay is not noticeable; however, when the local manipulator and the remote manipulator are at a far distance from each other, the time delay is no longer negligible and negatively influences the performance of the task. The time delay in a control system introduces a phase delay which in turn degrades the system performance and cause instability. Teleoperation systems can benefit from the ability to be in two places simultaneously, however, the use of Internet and other packet switched networks, such as Internet2, imposes varying time delays, making established control schemes to develop solutions to address these instabilities caused by different time delays. In this thesis work we present a modeling and analysis of a nonlinear bilateral teloperation system of n degrees of freedom controlled by state convergence strategy. Communication between the local and remote site is via a communication channel with time delay. The analysis presented in this work considers that the time-delay can be constant or variable. The main objectives of this work are; 1) Develop a nonlinear control schemes to ensure the stability of the teleoperated system, 2) Evaluate the system stability considering the delay in communication, and 3) Implementation of algorithms developed to test the performance of the teleoperation system in an experimental system of 3 degrees of freedom. Through the Theory of Stability of Lyapunov and the functional Lyapunov-Krasovskii, one demonstrates that the closed loop system is asymptotically stable.. The conclusions about stability were obtained by integration of the Lyapunov function and applying Barbalat Lemma. It further shows that the positions of the local and remote manipulator are synchronize when the human operator stops applying a constant force and the remote manipulator does not interact with the environment. The proposed control scheme has been validated by means of simulation and in experimental form using a developed system of real teleoperation in this doctoral thesis, which consists of a series planar manipulator of three degrees of freedom, a local manipulator, PHANTOM Omni, which is an haptic device that consists of 3 degrees of freedom (in force) and that provide feeback force in x-axis, and, z. The control in real time has been designed using the Operating system in Real time QuaRC of Quanser in the local side and the Simulink Real-Time Windows Target in the remote side. In order to finalize the summary, the highlights impact of this thesis in the scientific world are shows through the published results: 2 articles in Journals with impact factor, one article in a indexed Journal on Systemics, Cybernetics and Informatics, 7 articles in Conferences and has won an award in 9a. Conferencia Iberoamericana en Sistemas, Cibernética e Informática, 2010.
Resumo:
El desarrollo da las nuevas tecnologías permite a los ingenieros llevar al límite el funcionamiento de los circuitos integrados (Integrated Circuits, IC). Las nuevas generaciones de procesadores, DSPs o FPGAs son capaces de procesar la información a una alta velocidad, con un alto consumo de energía, o esperar en modo de baja potencia con el mínimo consumo posible. Esta gran variación en el consumo de potencia y el corto tiempo necesario para cambiar de un nivel al otro, afecta a las especificaciones del Módulo de Regulador de Tensión (Voltage Regulated Module, VRM) que alimenta al IC. Además, las características adicionales obligatorias, tales como adaptación del nivel de tensión (Adaptive Voltage Positioning, AVP) y escalado dinámico de la tensión (Dynamic Voltage Scaling, DVS), imponen requisitos opuestas en el diseño de la etapa de potencia del VRM. Para poder soportar las altas variaciones de los escalones de carga, el condensador de filtro de salida del VRM se ha de sobredimensionar, penalizando la densidad de energía y el rendimiento durante la operación de DVS. Por tanto, las actuales tendencias de investigación se centran en mejorar la respuesta dinámica del VRM, mientras se reduce el tamaño del condensador de salida. La reducción del condensador de salida lleva a menor coste y una prolongación de la vida del sistema ya que se podría evitar el uso de condensadores voluminosos, normalmente implementados con condensadores OSCON. Una ventaja adicional es que reduciendo el condensador de salida, el DVS se puede realizar más rápido y con menor estrés de la etapa de potencia, ya que la cantidad de carga necesaria para cambiar la tensión de salida es menor. El comportamiento dinámico del sistema con un control lineal (Control Modo Tensión, VMC, o Control Corriente de Pico, Peak Current Mode Control, PCMC,…) está limitado por la frecuencia de conmutación del convertidor y por el tamaño del filtro de salida. La reducción del condensador de salida se puede lograr incrementando la frecuencia de conmutación, así como incrementando el ancho de banda del sistema, y/o aplicando controles avanzados no-lineales. Usando esos controles, las variables del estado se saturan para conseguir el nuevo régimen permanente en un tiempo mínimo, así como el filtro de salida, más específicamente la pendiente de la corriente de la bobina, define la respuesta de la tensión de salida. Por tanto, reduciendo la inductancia de la bobina de salida, la corriente de bobina llega más rápido al nuevo régimen permanente, por lo que una menor cantidad de carga es tomada del condensador de salida durante el tránsito. El inconveniente de esa propuesta es que el rendimiento del sistema es penalizado debido al incremento de pérdidas de conmutación y las corrientes RMS. Para conseguir tanto la reducción del condensador de salida como el alto rendimiento del sistema, mientras se satisfacen las estrictas especificaciones dinámicas, un convertidor multifase es adoptado como estándar para aplicaciones VRM. Para asegurar el reparto de las corrientes entre fases, el convertidor multifase se suele implementar con control de modo de corriente. Para superar la limitación impuesta por el filtro de salida, la segunda posibilidad para reducir el condensador de salida es aplicar alguna modificación topológica (Topologic modifications) de la etapa básica de potencia para incrementar la pendiente de la corriente de bobina y así reducir la duración de tránsito. Como el transitorio se ha reducido, una menor cantidad de carga es tomada del condensador de salida bajo el mismo escalón de la corriente de salida, con lo cual, el condensador de salida se puede reducir para lograr la misma desviación de la tensión de salida. La tercera posibilidad para reducir el condensador de salida del convertidor es introducir un camino auxiliar de energía (additional energy path, AEP) para compensar el desequilibrio de la carga del condensador de salida reduciendo consecuentemente la duración del transitorio y la desviación de la tensión de salida. De esta manera, durante el régimen permanente, el sistema tiene un alto rendimiento debido a que el convertidor principal con bajo ancho de banda es diseñado para trabajar con una frecuencia de conmutación moderada para conseguir requisitos estáticos. Por otro lado, el comportamiento dinámico durante los transitorios es determinado por el AEP con un alto ancho de banda. El AEP puede ser implementado como un camino resistivo, como regulador lineal (Linear regulator, LR) o como un convertidor conmutado. Las dos primeras implementaciones proveen un mayor ancho de banda, acosta del incremento de pérdidas durante el transitorio. Por otro lado, la implementación del convertidor computado presenta menor ancho de banda, limitado por la frecuencia de conmutación, aunque produce menores pérdidas comparado con las dos anteriores implementaciones. Dependiendo de la aplicación, la implementación y la estrategia de control del sistema, hay una variedad de soluciones propuestas en el Estado del Arte (State-of-the-Art, SoA), teniendo diferentes propiedades donde una solución ofrece más ventajas que las otras, pero también unas desventajas. En general, un sistema con AEP ideal debería tener las siguientes propiedades: 1. El impacto del AEP a las pérdidas del sistema debería ser mínimo. A lo largo de la operación, el AEP genera pérdidas adicionales, con lo cual, en el caso ideal, el AEP debería trabajar por un pequeño intervalo de tiempo, solo durante los tránsitos; la otra opción es tener el AEP constantemente activo pero, por la compensación del rizado de la corriente de bobina, se generan pérdidas innecesarias. 2. El AEP debería ser activado inmediatamente para minimizar la desviación de la tensión de salida. Para conseguir una activación casi instantánea, el sistema puede ser informado por la carga antes del escalón o el sistema puede observar la corriente del condensador de salida, debido a que es la primera variable del estado que actúa a la perturbación de la corriente de salida. De esa manera, el AEP es activado con casi cero error de la tensión de salida, logrando una menor desviación de la tensión de salida. 3. El AEP debería ser desactivado una vez que el nuevo régimen permanente es detectado para evitar los transitorios adicionales de establecimiento. La mayoría de las soluciones de SoA estiman la duración del transitorio, que puede provocar un transitorio adicional si la estimación no se ha hecho correctamente (por ejemplo, si la corriente de bobina del convertidor principal tiene un nivel superior o inferior al necesitado, el regulador lento del convertidor principal tiene que compensar esa diferencia una vez que el AEP es desactivado). Otras soluciones de SoA observan las variables de estado, asegurando que el sistema llegue al nuevo régimen permanente, o pueden ser informadas por la carga. 4. Durante el transitorio, como mínimo un subsistema, o bien el convertidor principal o el AEP, debería operar en el lazo cerrado. Implementando un sistema en el lazo cerrado, preferiblemente el subsistema AEP por su ancho de banda elevado, se incrementa la robustez del sistema a los parásitos. Además, el AEP puede operar con cualquier tipo de corriente de carga. Las soluciones que funcionan en el lazo abierto suelen preformar el control de balance de carga con mínimo tiempo, así reducen la duración del transitorio y tienen un impacto menor a las pérdidas del sistema. Por otro lado, esas soluciones demuestran una alta sensibilidad a las tolerancias y parásitos de los componentes. 5. El AEP debería inyectar la corriente a la salida en una manera controlada, así se reduce el riesgo de unas corrientes elevadas y potencialmente peligrosas y se incrementa la robustez del sistema bajo las perturbaciones de la tensión de entrada. Ese problema suele ser relacionado con los sistemas donde el AEP es implementado como un convertidor auxiliar. El convertidor auxiliar es diseñado para una potencia baja, con lo cual, los dispositivos elegidos son de baja corriente/potencia. Si la corriente no es controlada, bajo un pico de tensión de entrada provocada por otro parte del sistema (por ejemplo, otro convertidor conectado al mismo bus), se puede llegar a un pico en la corriente auxiliar que puede causar la perturbación de tensión de salida e incluso el fallo de los dispositivos del convertidor auxiliar. Sin embargo, cuando la corriente es controlada, usando control del pico de corriente o control con histéresis, la corriente auxiliar tiene el control con prealimentación (feed-forward) de tensión de entrada y la corriente es definida y limitada. Por otro lado, si la solución utiliza el control de balance de carga, el sistema puede actuar de forma deficiente si la tensión de entrada tiene un valor diferente del nominal, provocando que el AEP inyecta/toma más/menos carga que necesitada. 6. Escalabilidad del sistema a convertidores multifase. Como ya ha sido comentado anteriormente, para las aplicaciones VRM por la corriente de carga elevada, el convertidor principal suele ser implementado como multifase para distribuir las perdidas entre las fases y bajar el estrés térmico de los dispositivos. Para asegurar el reparto de las corrientes, normalmente un control de modo corriente es usado. Las soluciones de SoA que usan VMC son limitadas a la implementación con solo una fase. Esta tesis propone un nuevo método de control del flujo de energía por el AEP y el convertidor principal. El concepto propuesto se basa en la inyección controlada de la corriente auxiliar al nodo de salida donde la amplitud de la corriente es n-1 veces mayor que la corriente del condensador de salida con las direcciones apropiadas. De esta manera, el AEP genera un condensador virtual cuya capacidad es n veces mayor que el condensador físico y reduce la impedancia de salida. Como el concepto propuesto reduce la impedancia de salida usando el AEP, el concepto es llamado Output Impedance Correction Circuit (OICC) concept. El concepto se desarrolla para un convertidor tipo reductor síncrono multifase con control modo de corriente CMC (incluyendo e implementación con una fase) y puede operar con la tensión de salida constante o con AVP. Además, el concepto es extendido a un convertidor de una fase con control modo de tensión VMC. Durante la operación, el control de tensión de salida de convertidor principal y control de corriente del subsistema OICC están siempre cerrados, incrementando la robustez a las tolerancias de componentes y a los parásitos del cirquito y permitiendo que el sistema se pueda enfrentar a cualquier tipo de la corriente de carga. Según el método de control propuesto, el sistema se puede encontrar en dos estados: durante el régimen permanente, el sistema se encuentra en el estado Idle y el subsistema OICC esta desactivado. Por otro lado, durante el transitorio, el sistema se encuentra en estado Activo y el subsistema OICC está activado para reducir la impedancia de salida. El cambio entre los estados se hace de forma autónoma: el sistema entra en el estado Activo observando la corriente de condensador de salida y vuelve al estado Idle cunado el nuevo régimen permanente es detectado, observando las variables del estado. La validación del concepto OICC es hecha aplicándolo a un convertidor tipo reductor síncrono con dos fases y de 30W cuyo condensador de salida tiene capacidad de 140μF, mientras el factor de multiplicación n es 15, generando en el estado Activo el condensador virtual de 2.1mF. El subsistema OICC es implementado como un convertidor tipo reductor síncrono con PCMC. Comparando el funcionamiento del convertidor con y sin el OICC, los resultados demuestran que se ha logrado una reducción de la desviación de tensión de salida con factor 12, tanto con funcionamiento básico como con funcionamiento AVP. Además, los resultados son comparados con un prototipo de referencia que tiene la misma etapa de potencia y un condensador de salida físico de 2.1mF. Los resultados demuestran que los dos sistemas tienen el mismo comportamiento dinámico. Más aun, se ha cuantificado el impacto en las pérdidas del sistema operando bajo una corriente de carga pulsante y bajo DVS. Se demuestra que el sistema con OICC mejora el rendimiento del sistema, considerando las pérdidas cuando el sistema trabaja con la carga pulsante y con DVS. Por lo último, el condensador de salida de sistema con OICC es mucho más pequeño que el condensador de salida del convertidor de referencia, con lo cual, por usar el concepto OICC, la densidad de energía se incrementa. En resumen, las contribuciones principales de la tesis son: • El concepto propuesto de Output Impedance Correction Circuit (OICC), • El control a nivel de sistema basado en el método usado para cambiar los estados de operación, • La implementación del subsistema OICC en lazo cerrado conjunto con la implementación del convertidor principal, • La cuantificación de las perdidas dinámicas bajo la carga pulsante y bajo la operación DVS, y • La robustez del sistema bajo la variación del condensador de salida y bajo los escalones de carga consecutiva. ABSTRACT Development of new technologies allows engineers to push the performance of the integrated circuits to its limits. New generations of processors, DSPs or FPGAs are able to process information with high speed and high consumption or to wait in low power mode with minimum possible consumption. This huge variation in power consumption and the short time needed to change from one level to another, affect the specifications of the Voltage Regulated Module (VRM) that supplies the IC. Furthermore, additional mandatory features, such as Adaptive Voltage Positioning (AVP) and Dynamic Voltage Scaling (DVS), impose opposite trends on the design of the VRM power stage. In order to cope with high load-step amplitudes, the output capacitor of the VRM power stage output filter is drastically oversized, penalizing power density and the efficiency during the DVS operation. Therefore, the ongoing research trend is directed to improve the dynamic response of the VRM while reducing the size of the output capacitor. The output capacitor reduction leads to a smaller cost and longer life-time of the system since the big bulk capacitors, usually implemented with OSCON capacitors, may not be needed to achieve the desired dynamic behavior. An additional advantage is that, by reducing the output capacitance, dynamic voltage scaling (DVS) can be performed faster and with smaller stress on the power stage, since the needed amount of charge to change the output voltage is smaller. The dynamic behavior of the system with a linear control (Voltage mode control, VMC, Peak Current Mode Control, PCMC,…) is limited by the converter switching frequency and filter size. The reduction of the output capacitor can be achieved by increasing the switching frequency of the converter, thus increasing the bandwidth of the system, and/or by applying advanced non-linear controls. Applying nonlinear control, the system variables get saturated in order to reach the new steady-state in a minimum time, thus the output filter, more specifically the output inductor current slew-rate, determines the output voltage response. Therefore, by reducing the output inductor value, the inductor current reaches faster the new steady state, so a smaller amount of charge is taken from the output capacitor during the transient. The drawback of this approach is that the system efficiency is penalized due to increased switching losses and RMS currents. In order to achieve both the output capacitor reduction and high system efficiency, while satisfying strict dynamic specifications, a Multiphase converter system is adopted as a standard for VRM applications. In order to ensure the current sharing among the phases, the multiphase converter is usually implemented with current mode control. In order to overcome the limitation imposed by the output filter, the second possibility to reduce the output capacitor is to apply Topologic modifications of the basic power stage topology in order to increase the slew-rate of the inductor current and, therefore, reduce the transient duration. Since the transient is reduced, smaller amount of charge is taken from the output capacitor under the same load current, thus, the output capacitor can be reduced to achieve the same output voltage deviation. The third possibility to reduce the output capacitor of the converter is to introduce an additional energy path (AEP) to compensate the charge unbalance of the output capacitor, consequently reducing the transient time and output voltage deviation. Doing so, during the steady-state operation the system has high efficiency because the main low-bandwidth converter is designed to operate at moderate switching frequency, to meet the static requirements, whereas the dynamic behavior during the transients is determined by the high-bandwidth auxiliary energy path. The auxiliary energy path can be implemented as a resistive path, as a Linear regulator, LR, or as a switching converter. The first two implementations provide higher bandwidth, at the expense of increasing losses during the transient. On the other hand, the switching converter implementation presents lower bandwidth, limited by the auxiliary converter switching frequency, though it produces smaller losses compared to the two previous implementations. Depending on the application, the implementation and the control strategy of the system, there is a variety of proposed solutions in the State-of-the-Art (SoA), having different features where one solution offers some advantages over the others, but also some disadvantages. In general, an ideal additional energy path system should have the following features: 1. The impact on the system losses should be minimal. During its operation, the AEP generates additional losses, thus ideally, the AEP should operate for a short period of time, only when the transient is occurring; the other option is to have the AEP constantly on, but due to the inductor current ripple compensation at the output, unnecessary losses are generated. 2. The AEP should be activated nearly instantaneously to prevent bigger output voltage deviation. To achieve near instantaneous activation, the converter system can be informed by the load prior to the load-step or the system can observe the output capacitor current, which is the first system state variable that reacts on the load current perturbation. In this manner, the AEP is turned on with near zero output voltage error, providing smaller output voltage deviation. 3. The AEP should be deactivated once the new steady state is reached to avoid additional settling transients. Most of the SoA solutions estimate duration of the transient which may cause additional transient if the estimation is not performed correctly (e.g. if the main converter inductor current has higher or lower value than needed, the slow regulator of the main converter needs to compensate the difference after the AEP is deactivated). Other SoA solutions are observing state variables, ensuring that the system reaches the new steady state or they are informed by the load. 4. During the transient, at least one subsystem, either the main converter or the AEP, should be in closed-loop. Implementing a closed loop system, preferably the AEP subsystem, due its higher bandwidth, increases the robustness under system tolerances and circuit parasitic. In addition, the AEP can operate with any type of load. The solutions that operate in open loop usually perform minimum time charge balance control, thus reducing the transient length and minimizing the impact on the losses, however they are very sensitive to tolerances and parasitics. 5. The AEP should inject current at the output in a controlled manner, thus reducing the risk of high and potentially damaging currents and increasing robustness on the input voltage deviation. This issue is mainly related to the systems where AEP is implemented as auxiliary converter. The auxiliary converter is designed for small power and, as such, the MOSFETs are rated for small power/currents. If the current is not controlled, due to the some unpredicted spike in input voltage caused by some other part of the system (e.g. different converter), it may lead to a current spike in auxiliary current which will cause the perturbation of the output voltage and even failure of the switching components of auxiliary converter. In the case when the current is controlled, using peak CMC or Hysteretic Window CMC, the auxiliary converter has inherent feed-forwarding of the input voltage in current control and the current is defined and limited. Furthermore, if the solution employs charge balance control, the system may perform poorly if the input voltage has different value than the nominal, causing that AEP injects/extracts more/less charge than needed. 6. Scalability of the system to multiphase converters. As commented previously, in VRM applications, due to the high load currents, the main converters are implemented as multiphase to redistribute losses among the modules, lowering temperature stress of the components. To ensure the current sharing, usually a Current Mode Control (CMC) is employed. The SoA solutions that are implemented with VMC are limited to a single stage implementation. This thesis proposes a novel control method of the energy flow through the AEP and the main converter system. The proposed concept relays on a controlled injection of the auxiliary current at the output node where the instantaneous current value is n-1 times bigger than the output capacitor current with appropriate directions. Doing so, the AEP creates an equivalent n times bigger virtual capacitor at the output, thus reducing the output impedance. Due to the fact that the proposed concept reduces the output impedance using the AEP, it has been named the Output Impedance Correction Circuit (OICC) concept. The concept is developed for a multiphase CMC synchronous buck converter (including a single phase implementation), operating with a constant output voltage and with AVP feature. Further, it is extended to a single phase VMC synchronous buck converter. During the operation, the main converter voltage loop and the OICC subsystem capacitor current loop is constantly closed, increasing the robustness under system tolerances and circuit parasitic and allowing the system to operate with any load-current shape or pattern. According to the proposed control method, the system operates in two states: during the steady-state the system is in the Idle state and the OICC subsystem is deactivated, while during the load-step transient the system is in the Active state and the OICC subsystem is activated in order to reduce the output impedance. The state changes are performed autonomously: the system enters in the Active state by observing the output capacitor current and it returns back to the Idle state when the steady-state operation is detected by observing the state variables. The validation of the OICC concept has been done by applying it to a 30W two phase synchronous buck converter with 140μF output capacitor and with the multiplication factor n equal to 15, generating during the Active state equivalent output capacitor of 2.1mF. The OICC subsystem is implemented as single phase PCMC synchronous buck converter. Comparing the converter operation with and without the OICC the results demonstrate that the 12 times reduction of the output voltage deviation is achieved, for both basic operation and for the AVP operation. Furthermore, the results have been compared to a reference prototype which has the same power stage and a fiscal output capacitor of 2.1mF. The results show that the two systems have the same dynamic behavior. Moreover, an impact on the system losses under the pulsating load and DVS operation has been quantified and it has been demonstrated that the OICC system has improved the system efficiency, considering the losses when the system operates with the pulsating load and the DVS operation. Lastly, the output capacitor of the OICC system is much smaller than the reference design output capacitor, therefore, by applying the OICC concept the power density can be increased. In summary, the main contributions of the thesis are: • The proposed Output Impedance Correction Circuit (OICC) concept, • The system level control based on the used approach to change the states of operation, • The OICC subsystem closed-loop implementation, together with the main converter implementation, • The dynamic losses under the pulsating load and the DVS operation quantification, and • The system robustness on the capacitor impedance variation and consecutive load-steps.
Resumo:
This paper presents a new fault detection and isolation scheme for dealing with simultaneous additive and parametric faults. The new design integrates a system for additive fault detection based on Castillo and Zufiria, 2009 and a new parametric fault detection and isolation scheme inspired in Munz and Zufiria, 2008 . It is shown that the so far existing schemes do not behave correctly when both additive and parametric faults occur simultaneously; to solve the problem a new integrated scheme is proposed. Computer simulation results are presented to confirm the theoretical studies.
Resumo:
The computation of the non-linear vibration dynamics of an aerodynamically unstable bladed-disk is a formidable numerical task, even for the simplified case of aerodynamic forces assumed to be linear. The nonlinear friction forces effectively couple dif- ferent travelling waves modes and, in order to properly elucidate the dynamics of the system, large time simulations are typically required to reach a final, saturated state. Despite of all the above complications, the output of the system (in the friction microslip regime) is basically a superposition of the linear aeroelastic un- stable travelling waves, which exhibit a slow time modulation that is much longer than the elastic oscillation period. This slow time modulation is due to both, the small aerodynamic effects and the small nonlinear friction forces, and it is crucial to deter- mine the final amplitude of the flutter vibration. In this presenta- tion we apply asymptotic techniques to obtain a new simplified model that captures the slow time dynamics of the amplitudes of the travelling waves. The resulting asymptotic model is very re- duced and extremely cheap to simulate, and it has the advantage that it gives precise information about the characteristics of the nonlinear friction models that actually play a role in the satura- tion of the vibration amplitude.
Resumo:
The computation of the non-linear vibration dynamics of an aerodynamically unstable bladed-disk is a formidable numerical task, even for the simplified case of aerodynamic forces assumed to be linear. The nonlinear friction forces effectively couple dif- ferent travelling waves modes and, in order to properly elucidate the dynamics of the system, large time simulations are typically required to reach a final, saturated state. Despite of all the above complications, the output of the system (in the friction microslip regime) is basically a superposition of the linear aeroelastic un- stable travelling waves, which exhibit a slow time modulation that is much longer than the elastic oscillation period. This slow time modulation is due to both, the small aerodynamic effects and the small nonlinear friction forces, and it is crucial to deter- mine the final amplitude of the flutter vibration. In this presenta- tion we apply asymptotic techniques to obtain a new simplified model that captures the slow time dynamics of the amplitudes of the travelling waves. The resulting asymptotic model is very re- duced and extremely cheap to simulate, and it has the advantage that it gives precise information about the characteristics of the nonlinear friction models that actually play a role in the satura- tion of the vibration amplitude.
Resumo:
In this paper fault detection and isolation (FDI) schemes are applied in the context of the surveillance of emerging faults in an electrical circuit. The FDI problem is studied on a noisy nonlinear circuit, where both abrupt and incipient faults in the voltage source are considered. A rigorous analysis of fault detectability precedes the application of the fault detection (FD) scheme; then, the fault isolation (FI) phase is accomplished with two alternative FI approaches, proposed as new extensions of that FD approach. Numerical simulations illustrate the applicability of the mentioned schemes.
Resumo:
In this work, we study the bilateral control of a nonlinear teleoperator system with constant delay, proposes a control strategy by state convergence, which directly connect the local and remote manipulator through feedback signals of position and speed. The control signal allows the remote manipulator follow the local manipulator through the state convergence even if it has a delay in the communication channel. The bilateral control of the teleoperator system considers the case when the human operator applies a constant force on the local manipulator and when the interaction of the remote manipulator with the environment is considered passive. The stability analysis is performed using functional of Lyapunov-Krasovskii, it showed that using a control algorithm by state convergence for the case with constant delay, the nonlinear local and remote teleoperation system is asymptotically stable, also speeds converge to zero and position tracking is achieved.
Resumo:
In this work, we proposes a control strategy that allows the remote manipulator follow the local manipulator through the state convergence even if it has a delay in the communication channel. The bilateral control of the teleoperator system considers the case were the human operator applies a constant force on the local manipulator and when the interaction of the remote manipulator with the environment is considered passive. The stability analysis was performed using Lyapunov- Krasovskii functional, it showed for the case with constant delay, that using a proposed control algorithm by state convergence resulted in asymptotically stable, local and remote the nonlinear teleoperation system.