Ripple cancellation technique applied to a synchronous buck converter to achieve very high bandwidth and very high efficiency envelope amplifier

This work presents a single stage converter for a high bandwidth and a high efficiency envelope amplifier. The current ripple cancellation technique is applied to a synchronous buck converter to cancel the output current ripple and to decrease the switching frequency without a reduction in the large signal bandwidth. The converter is modeled and the new design with ripple cancellation circuit is detailed. The advantages of the proposed design are presented and validated experimentally. The transfer function of the output filter of the buck converter with ripple cancellation circuit has been modeled and compared to measurements, showing a good correspondence. Experimental validation is provided at 4MHz of switching frequency for DC and variable output voltage for a sinusoidal and a 64QAM signal. Additional experimental validation of the efficiency improvement is provided, compared to the equivalent design (same bandwidth and output voltage ripple) of the conventional buck converter.

High Efficiency Envelope Amplifier based on a Ripple Cancellation Buck Converter. Design, Optimization and Integration in an EER RFPA

Durante los últimos años la tendencia en el sector de las telecomunicaciones ha sido un aumento y diversificación en la transmisión de voz, video y fundamentalmente de datos. Para conseguir alcanzar las tasas de transmisión requeridas, los nuevos estándares de comunicaciones requieren un mayor ancho de banda y tienen un mayor factor de pico, lo cual influye en el bajo rendimiento del amplificador de radiofrecuencia (RFPA). Otro factor que ha influido en el bajo rendimiento es el diseño del amplificador de radiofrecuencia. Tradicionalmente se han utilizado amplificadores lineales por su buen funcionamiento. Sin embargo, debido al elevado factor de pico de las señales transmitidas, el rendimiento de este tipo de amplificadores es bajo. El bajo rendimiento del sistema conlleva desventajas adicionales como el aumento del coste y del tamaño del sistema de refrigeración, como en el caso de una estación base, o como la reducción del tiempo de uso y un mayor calentamiento del equipo para sistemas portátiles alimentados con baterías. Debido a estos factores, se han desarrollado durante las últimas décadas varias soluciones para aumentar el rendimiento del RFPA como la técnica de Outphasing, combinadores de potencia o la técnica de Doherty. Estas soluciones mejoran las prestaciones del RFPA y en algún caso han sido ampliamente utilizados comercialmente como la técnica de Doherty, que alcanza rendimientos hasta del 50% para el sistema completo para anchos de banda de hasta 20MHz. Pese a las mejoras obtenidas con estas soluciones, los mayores rendimientos del sistema se obtienen para soluciones basadas en la modulación de la tensión de alimentación del amplificador de potencia como “Envelope Tracking” o “EER”. La técnica de seguimiento de envolvente o “Envelope Tracking” está basada en la modulación de la tensión de alimentación de un amplificador lineal de potencia para obtener una mejora en el rendimiento en el sistema comparado a una solución con una tensión de alimentación constante. Para la implementación de esta técnica se necesita una etapa adicional, el amplificador de envolvente, que añade complejidad al amplificador de radiofrecuencia. En un amplificador diseñado con esta técnica, se aumentan las pérdidas debido a la etapa adicional que supone el amplificador de envolvente pero a su vez disminuyen las pérdidas en el amplificador de potencia. Si el diseño se optimiza adecuadamente, puede conseguirse un aumento global en el rendimiento del sistema superior al conseguido con las técnicas mencionadas anteriormente. Esta técnica presenta ventajas en el diseño del amplificador de envolvente, ya que el ancho de banda requerido puede ser menor que el ancho de banda de la señal de envolvente si se optimiza adecuadamente el diseño. Adicionalmente, debido a que la sincronización entre la señal de envolvente y de fase no tiene que ser perfecta, el proceso de integración conlleva ciertas ventajas respecto a otras técnicas como EER. La técnica de eliminación y restauración de envolvente, llamada EER o técnica de Kahn está basada en modulación simultánea de la envolvente y la fase de la señal usando un amplificador de potencia conmutado, no lineal y que permite obtener un elevado rendimiento. Esta solución fue propuesta en el año 1952, pero no ha sido implementada con éxito durante muchos años debido a los exigentes requerimientos en cuanto a la sincronización entre fase y envolvente, a las técnicas de control y de corrección de los errores y no linealidades de cada una de las etapas así como de los equipos para poder implementar estas técnicas, que tienen unos requerimientos exigentes en capacidad de cálculo y procesamiento. Dentro del diseño de un RFPA, el amplificador de envolvente tiene una gran importancia debido a su influencia en el rendimiento y ancho de banda del sistema completo. Adicionalmente, la linealidad y la calidad de la señal de transmitida deben ser elevados para poder cumplir con los diferentes estándares de telecomunicaciones. Esta tesis se centra en el amplificador de envolvente y el objetivo principal es el desarrollo de soluciones que permitan el aumento del rendimiento total del sistema a la vez que satisfagan los requerimientos de ancho de banda, calidad de la señal transmitida y de linealidad. Debido al elevado rendimiento que potencialmente puede alcanzarse con la técnica de EER, esta técnica ha sido objeto de análisis y en el estado del arte pueden encontrarse numerosas referencias que analizan el diseño y proponen diversas implementaciones. En una clasificación de alto nivel, podemos agrupar las soluciones propuestas del amplificador de envolvente según estén compuestas de una o múltiples etapas. Las soluciones para el amplificador de envolvente en una configuración multietapa se basan en la combinación de un convertidor conmutado, de elevado rendimiento con un regulador lineal, de alto ancho de banda, en una combinación serie o paralelo. Estas soluciones, debido a la combinación de las características de ambas etapas, proporcionan un buen compromiso entre rendimiento y buen funcionamiento del amplificador de RF. Por otro lado, la complejidad del sistema aumenta debido al mayor número de componentes y de señales de control necesarias y el aumento de rendimiento que se consigue con estas soluciones es limitado. Una configuración en una etapa tiene las ventajas de una mayor simplicidad, pero debido al elevado ancho de banda necesario, la frecuencia de conmutación debe aumentarse en gran medida. Esto implicará un bajo rendimiento y un peor funcionamiento del amplificador de envolvente. En el estado del arte pueden encontrarse diversas soluciones para un amplificador de envolvente en una etapa, como aumentar la frecuencia de conmutación y realizar la implementación en un circuito integrado, que tendrá mejor funcionamiento a altas frecuencias o utilizar técnicas topológicas y/o filtros de orden elevado, que permiten una reducción de la frecuencia de conmutación. En esta tesis se propone de manera original el uso de la técnica de cancelación de rizado, aplicado al convertidor reductor síncrono, para reducir la frecuencia de conmutación comparado con diseño equivalente del convertidor reductor convencional. Adicionalmente se han desarrollado dos variantes topológicas basadas en esta solución para aumentar la robustez y las prestaciones de la misma. Otro punto de interés en el diseño de un RFPA es la dificultad de poder estimar la influencia de los parámetros de diseño del amplificador de envolvente en el amplificador final integrado. En esta tesis se ha abordado este problema y se ha desarrollado una herramienta de diseño que permite obtener las principales figuras de mérito del amplificador integrado para la técnica de EER a partir del diseño del amplificador de envolvente. Mediante el uso de esta herramienta pueden validarse el efecto del ancho de banda, el rizado de tensión de salida o las no linealidades del diseño del amplificador de envolvente para varias modulaciones digitales. Las principales contribuciones originales de esta tesis son las siguientes: La aplicación de la técnica de cancelación de rizado a un convertidor reductor síncrono para un amplificador de envolvente de alto rendimiento para un RFPA linealizado mediante la técnica de EER. Una reducción del 66% en la frecuencia de conmutación, comparado con el reductor convencional equivalente. Esta reducción se ha validado experimentalmente obteniéndose una mejora en el rendimiento de entre el 12.4% y el 16% para las especificaciones de este trabajo. La topología y el diseño del convertidor reductor con dos redes de cancelación de rizado en cascada para mejorar el funcionamiento y robustez de la solución con una red de cancelación. La combinación de un convertidor redactor multifase con la técnica de cancelación de rizado para obtener una topología que proporciona una reducción del cociente entre frecuencia de conmutación y ancho de banda de la señal. El proceso de optimización del control del amplificador de envolvente en lazo cerrado para mejorar el funcionamiento respecto a la solución en lazo abierto del convertidor reductor con red de cancelación de rizado. Una herramienta de simulación para optimizar el proceso de diseño del amplificador de envolvente mediante la estimación de las figuras de mérito del RFPA, implementado mediante EER, basada en el diseño del amplificador de envolvente. La integración y caracterización del amplificador de envolvente basado en un convertidor reductor con red de cancelación de rizado en el transmisor de radiofrecuencia completo consiguiendo un elevado rendimiento, entre 57% y 70.6% para potencias de salida de 14.4W y 40.7W respectivamente. Esta tesis se divide en seis capítulos. El primer capítulo aborda la introducción enfocada en la aplicación, los amplificadores de potencia de radiofrecuencia, así como los principales problemas, retos y soluciones existentes. En el capítulo dos se desarrolla el estado del arte de amplificadores de potencia de RF, describiéndose las principales técnicas de diseño, las causas de no linealidad y las técnicas de optimización. El capítulo tres está centrado en las soluciones propuestas para el amplificador de envolvente. El modo de control se ha abordado en este capítulo y se ha presentado una optimización del diseño en lazo cerrado para el convertidor reductor convencional y para el convertidor reductor con red de cancelación de rizado. El capítulo cuatro se centra en el proceso de diseño del amplificador de envolvente. Se ha desarrollado una herramienta de diseño para evaluar la influencia del amplificador de envolvente en las figuras de mérito del RFPA. En el capítulo cinco se presenta el proceso de integración realizado y las pruebas realizadas para las diversas modulaciones, así como la completa caracterización y análisis del amplificador de RF. El capítulo seis describe las principales conclusiones de la tesis y las líneas futuras. ABSTRACT The trend in the telecommunications sector during the last years follow a high increase in the transmission rate of voice, video and mainly in data. To achieve the required levels of data rates, the new modulation standards demand higher bandwidths and have a higher peak to average power ratio (PAPR). These specifications have a direct impact in the low efficiency of the RFPA. An additional factor for the low efficiency of the RFPA is in the power amplifier design. Traditionally, linear classes have been used for the implementation of the power amplifier as they comply with the technical requirements. However, they have a low efficiency, especially in the operating range of signals with a high PAPR. The low efficiency of the transmitter has additional disadvantages as an increase in the cost and size as the cooling system needs to be increased for a base station and a temperature increase and a lower use time for portable devices. Several solutions have been proposed in the state of the art to improve the efficiency of the transmitter as Outphasing, power combiners or Doherty technique. However, the highest potential of efficiency improvement can be obtained using a modulated power supply for the power amplifier, as in the Envelope Tracking and EER techniques. The Envelope Tracking technique is based on the modulation of the power supply of a linear power amplifier to improve the overall efficiency compared to a fixed voltage supply. In the implementation of this technique an additional stage is needed, the envelope amplifier, that will increase the complexity of the RFPA. However, the efficiency of the linear power amplifier will increase and, if designed properly, the RFPA efficiency will be improved. The advantages of this technique are that the envelope amplifier design does not require such a high bandwidth as the envelope signal and that in the integration process a perfect synchronization between envelope and phase is not required. The Envelope Elimination and Restoration (EER) technique, known also as Kahn’s technique, is based on the simultaneous modulation of envelope and phase using a high efficiency switched power amplifier. This solution has the highest potential in terms of the efficiency improvement but also has the most challenging specifications. This solution, proposed in 1952, has not been successfully implemented until the last two decades due to the high demanding requirements for each of the stages as well as for the highly demanding processing and computation capabilities needed. At the system level, a very precise synchronization is required between the envelope and phase paths to avoid a linearity decrease of the system. Several techniques are used to compensate the non-linear effects in amplitude and phase and to improve the rejection of the out of band noise as predistortion, feedback and feed-forward. In order to obtain a high bandwidth and efficient RFPA using either ET or EER, the envelope amplifier stage will have a critical importance. The requirements for this stage are very demanding in terms of bandwidth, linearity and quality of the transmitted signal. Additionally the efficiency should be as high as possible, as the envelope amplifier has a direct impact in the efficiency of the overall system. This thesis is focused on the envelope amplifier stage and the main objective will be the development of high efficiency envelope amplifier solutions that comply with the requirements of the RFPA application. The design and optimization of an envelope amplifier for a RFPA application is a highly referenced research topic, and many solutions that address the envelope amplifier and the RFPA design and optimization can be found in the state of the art. From a high level classification, multiple and single stage envelope amplifiers can be identified. Envelope amplifiers for EER based on multiple stage architecture combine a linear assisted stage and a switched-mode stage, either in a series or parallel configuration, to achieve a very high performance RFPA. However, the complexity of the system increases and the efficiency improvement is limited. A single-stage envelope amplifier has the advantage of a lower complexity but in order to achieve the required bandwidth the switching frequency has to be highly increased, and therefore the performance and the efficiency are degraded. Several techniques are used to overcome this limitation, as the design of integrated circuits that are capable of switching at very high rates or the use of topological solutions, high order filters or a combination of both to reduce the switching frequency requirements. In this thesis it is originally proposed the use of the ripple cancellation technique, applied to a synchronous buck converter, to reduce the switching frequency requirements compared to a conventional buck converter for an envelope amplifier application. Three original proposals for the envelope amplifier stage, based on the ripple cancellation technique, are presented and one of the solutions has been experimentally validated and integrated in the complete amplifier, showing a high total efficiency increase compared to other solutions of the state of the art. Additionally, the proposed envelope amplifier has been integrated in the complete RFPA achieving a high total efficiency. The design process optimization has also been analyzed in this thesis. Due to the different figures of merit between the envelope amplifier and the complete RFPA it is very difficult to obtain an optimized design for the envelope amplifier. To reduce the design uncertainties, a design tool has been developed to provide an estimation of the RFPA figures of merit based on the design of the envelope amplifier. The main contributions of this thesis are: The application of the ripple cancellation technique to a synchronous buck converter for an envelope amplifier application to achieve a high efficiency and high bandwidth EER RFPA. A 66% reduction of the switching frequency, validated experimentally, compared to the equivalent conventional buck converter. This reduction has been reflected in an improvement in the efficiency between 12.4% and 16%, validated for the specifications of this work. The synchronous buck converter with two cascaded ripple cancellation networks (RCNs) topology and design to improve the robustness and the performance of the envelope amplifier. The combination of a phase-shifted multi-phase buck converter with the ripple cancellation technique to improve the envelope amplifier switching frequency to signal bandwidth ratio. The optimization of the control loop of an envelope amplifier to improve the performance of the open loop design for the conventional and ripple cancellation buck converter. A simulation tool to optimize the envelope amplifier design process. Using the envelope amplifier design as the input data, the main figures of merit of the complete RFPA for an EER application are obtained for several digital modulations. The successful integration of the envelope amplifier based on a RCN buck converter in the complete RFPA obtaining a high efficiency integrated amplifier. The efficiency obtained is between 57% and 70.6% for an output power of 14.4W and 40.7W respectively. The main figures of merit for the different modulations have been characterized and analyzed. This thesis is organized in six chapters. In Chapter 1 is provided an introduction of the RFPA application, where the main problems, challenges and solutions are described. In Chapter 2 the technical background for radiofrequency power amplifiers (RF) is presented. The main techniques to implement an RFPA are described and analyzed. The state of the art techniques to improve performance of the RFPA are identified as well as the main sources of no-linearities for the RFPA. Chapter 3 is focused on the envelope amplifier stage. The three different solutions proposed originally in this thesis for the envelope amplifier are presented and analyzed. The control stage design is analyzed and an optimization is proposed both for the conventional and the RCN buck converter. Chapter 4 is focused in the design and optimization process of the envelope amplifier and a design tool to evaluate the envelope amplifier design impact in the RFPA is presented. Chapter 5 shows the integration process of the complete amplifier. Chapter 6 addresses the main conclusions of the thesis and the future work.

Cancellation zone in supersonic lifting wing theory

BASING their work on a linear theory, Evvard1 and Krasilshchikova2'3 independently developed an expression that yields the perturbation generated by a thiri lifting wing of arbitrary planform flying at supersonic speed on a point placed on the wing plane inside its planform,1 or both on and above the wing plane.2 This point must be influenced by two leading edges, one supersonic and the other partially subsonic. Although these authors followed different approaches, their methods concur in showing the existence of a perfectly defined cancellation zone. In this Note, the Evvard approach is generalized to the case solved by Krasilshchikova. Circumventing the latter's lengthy and somewhat complex approach, Evvard's simple method seems to be useful at least for educational purposes.

Development of Efficient Techniques for the Analysis and Design of Antennas in Dual-Reflectarray Configuration

This thesis contributes to the analysis and design of printed reflectarray antennas. The main part of the work is focused on the analysis of dual offset antennas comprising two reflectarray surfaces, one of them acts as sub-reflector and the second one acts as mainreflector. These configurations introduce additional complexity in several aspects respect to conventional dual offset reflectors, however they present a lot of degrees of freedom that can be used to improve the electrical performance of the antenna. The thesis is organized in four parts: the development of an analysis technique for dualreflectarray antennas, a preliminary validation of such methodology using equivalent reflector systems as reference antennas, a more rigorous validation of the software tool by manufacturing and testing a dual-reflectarray antenna demonstrator and the practical design of dual-reflectarray systems for some applications that show the potential of these kind of configurations to scan the beam and to generate contoured beams. In the first part, a general tool has been implemented to analyze high gain antennas which are constructed of two flat reflectarray structures. The classic reflectarray analysis based on MoM under local periodicity assumption is used for both sub and main reflectarrays, taking into account the incident angle on each reflectarray element. The incident field on the main reflectarray is computed taking into account the field radiated by all the elements on the sub-reflectarray.. Two approaches have been developed, one which employs a simple approximation to reduce the computer run time, and the other which does not, but offers in many cases, improved accuracy. The approximation is based on computing the reflected field on each element on the main reflectarray only once for all the fields radiated by the sub-reflectarray elements, assuming that the response will be the same because the only difference is a small variation on the angle of incidence. This approximation is very accurate when the reflectarray elements on the main reflectarray show a relatively small sensitivity to the angle of incidence. An extension of the analysis technique has been implemented to study dual-reflectarray antennas comprising a main reflectarray printed on a parabolic surface, or in general in a curved surface. In many applications of dual-reflectarray configurations, the reflectarray elements are in the near field of the feed-horn. To consider the near field radiated by the horn, the incident field on each reflectarray element is computed using a spherical mode expansion. In this region, the angles of incidence are moderately wide, and they are considered in the analysis of the reflectarray to better calculate the actual incident field on the sub-reflectarray elements. This technique increases the accuracy for the prediction of co- and cross-polar patterns and antenna gain respect to the case of using ideal feed models. In the second part, as a preliminary validation, the proposed analysis method has been used to design a dual-reflectarray antenna that emulates previous dual-reflector antennas in Ku and W-bands including a reflectarray as subreflector. The results for the dualreflectarray antenna compare very well with those of the parabolic reflector and reflectarray subreflector; radiation patterns, antenna gain and efficiency are practically the same when the main parabolic reflector is substituted by a flat reflectarray. The results show that the gain is only reduced by a few tenths of a dB as a result of the ohmic losses in the reflectarray. The phase adjustment on two surfaces provided by the dual-reflectarray configuration can be used to improve the antenna performance in some applications requiring multiple beams, beam scanning or shaped beams. Third, a very challenging dual-reflectarray antenna demonstrator has been designed, manufactured and tested for a more rigorous validation of the analysis technique presented. The proposed antenna configuration has the feed, the sub-reflectarray and the main-reflectarray in the near field one to each other, so that the conventional far field approximations are not suitable for the analysis of such antenna. This geometry is used as benchmarking for the proposed analysis tool in very stringent conditions. Some aspects of the proposed analysis technique that allow improving the accuracy of the analysis are also discussed. These improvements include a novel method to reduce the inherent cross polarization which is introduced mainly from grounded patch arrays. It has been checked that cross polarization in offset reflectarrays can be significantly reduced by properly adjusting the patch dimensions in the reflectarray in order to produce an overall cancellation of the cross-polarization. The dimensions of the patches are adjusted in order not only to provide the required phase-distribution to shape the beam, but also to exploit the crosses by zero of the cross-polarization components. The last part of the thesis deals with direct applications of the technique described. The technique presented is directly applicable to the design of contoured beam antennas for DBS applications, where the requirements of cross-polarisation are very stringent. The beam shaping is achieved by synthesithing the phase distribution on the main reflectarray while the sub-reflectarray emulates an equivalent hyperbolic subreflector. Dual-reflectarray antennas present also the ability to scan the beam over small angles about boresight. Two possible architectures for a Ku-band antenna are also described based on a dual planar reflectarray configuration that provides electronic beam scanning in a limited angular range. In the first architecture, the beam scanning is achieved by introducing a phase-control in the elements of the sub-reflectarray and the mainreflectarray is passive. A second alternative is also studied, in which the beam scanning is produced using 1-bit control on the main reflectarray, while a passive subreflectarray is designed to provide a large focal distance within a compact configuration. The system aims to develop a solution for bi-directional satellite links for emergency communications. In both proposed architectures, the objective is to provide a compact optics and simplicity to be folded and deployed.

Design methodology in multiphase buck converter based on minimum time control for high efficiency RF amplifiers

This paper proposes an interleaved multiphase buck converter with minimum time control strategy for envelope amplifiers in high efficiency RF power amplifiers. The solution of the envelope amplifier is to combine the proposed converter with a linear regulator in series. High system efficiency can be obtained through modulating the supply voltage of the envelope amplifier with the fast output voltage variation of the converter working with several particular duty cycles that achieve total ripple cancellation. The transient model for minimum time control is explained, and the calculation of transient times that are pre-calculated and inserted into a look-up table is presented. The filter design trade-off that limits capability of envelope modulation is also discussed. The experimental results verify the fast voltage transient obtained with a 4-phase buck prototype.

Design of envelope amplifier based on interleaved multiphase buck converter with minimum time control for RF application

In this paper, an interleaved multiphase buck converter with minimum time control strategy for envelope amplifiers in high efficiency RF power amplifiers is proposed. The solution for the envelope amplifier is to combine the proposed converter with a linear regulator in series. High efficiency of envelope amplifier can be obtained through modulating the supply voltage of the linear regulator. Instead of tracking the envelope, the buck converter has discrete output voltage that corresponding to particular duty cycles which achieve total ripple cancellation. The transient model for minimum time control is explained, and the calculation of transient times that are pre-calculated and inserted into a lookup table is presented. The filter design trade-off that limits capability of envelope modulation is also discussed. The experimental results verify the fast voltage transient obtained with a 4-phase buck prototype.

Excitación y control de IGBTs de un inversor trifásico sinusoidal

El origen del proyecto se encuentra en la mejora de un inversor trifásico sinusoidal comercial sobre la base del estudio de las técnicas de excitación óptimas para los IGBTs que lo componen en su etapa de potencia. En las primeras fases de planteamiento del proyecto se propone una idea mucho más ambiciosa, la realización de un nuevo convertidor de emergencia, destinado al sector ferroviario, para dar servicio de climatización. Este convertidor está formado por la asociación en cascada de un bloque DC/DC elevador y un bloque inversor DC/AC trifásico controlado mediante PWM con modulación sinusoidal. Se pretendía así dar solución a las siguientes problemáticas detectadas en los convertidores comercializados hasta el momento: un bloque elevador excesivamente sobredimensionado, subsistemas de control independientes para los dos bloques que configuran el convertidor, adicionalmente, la tarjeta driver se rediseña con cada cambio de especificaciones por parte de un nuevo cliente y finalmente, las comunicaciones tanto de diagnosis como de mantenimiento necesitaban una importante actualización. Inicialmente, se ha realizado un estudio teórico de los bloques elevador e inversor para poder realizar el diseño y dimensionamiento de sus componentes tanto semiconductores como electromagnéticos. Una vez completada la parte de potencia, se estudia el control que se realiza mediante medidas directas y simulación tanto de la estrategia de control del elevador como del inversor. Así se obtiene una información completa de la funcionalidad de las tarjetas existentes. Se desea realizar el diseño de una única tarjeta controladora y una única tarjeta de drivers para ambos bloques. Por problemas ajenos, en el transcurso de este proyecto se cancela su realización comercial, con lo que se decide al menos crear la placa de control y poder gobernar un convertidor ya existente, sustituyendo la tarjeta de control del bloque elevador. Para poder fabricar la placa de control se divide en dos tarjetas que irán conectadas en modo sándwich. En una tarjeta está el microcontrolador y en otra está todo el interface necesario para operar con el sistema: entradas y salidas digitales, entradas y salidas analógicas, comunicación CAN, y un pequeño DC/DC comercial que proporciona alimentación al prototipo. Se realiza un pequeño programa funcional para poder manejar el convertidor, el cual con una tensión de 110V DC, proporciona a la salida una tensión de 380V AC. Como ya se ha expuesto, debido a la cancelación del proyecto industrial no se profundiza más en su mejora y se decide proponerlo para su evaluación en su fase actual. ABSTRACT. The beginning of the project is found in the improvement of a commercial sine wave three phase inverter which is based in a study about optimal excitation techniques to IGBTs which compose in the power stage. In the early phases of project it is proposed a much more ambitious idea, the fact of a new emergency converter, proposed for the rail sector to work in an air condition unit. This converter is formed by an association of a block cascaded DC/DC booster and a block DC/AC inverter three-phase controlled by a sine wave modulation PWM. The purposed was to give a solution to following problems detected in commercial converters nowadays: an excessively oversized block boost, independent control subsystems for two blocks that configure the converter. In addition, driver board is redesigned with each specifications change demand it a new customer, and finally, the communications, diagnostic and maintenance that needed a important upgrade. Initially, it has been performed a theoretical study of boost and the inverter blocks to be able to perform the component’s design and the size (semiconductor and electromagnetic fields). Once finished power study, it is analysed the control performed using direct measures and simulation of boost control strategy and inverter. With this it is obtained complete information about existing cards functionality. The project is looking for the design of just one controller card and one drivers´ card for both blocks. By unrelated problems, during the course of this project a commercial realization. So at least its decided to create control board to be able to existing converter, replacing boost block’s control board. To be able to manufacture control board it is divided in two cards connected in sandwiching mode. In a card is microcontroller and in another is all needed interface to operate with the system: digital inputs and outputs, analogical inputs and outputs, CAN communication, and a small DC / DC business that provide power supply to the prototype. It is performed a small functional program to handle the converter, which with an input voltage 110V DC provides an output voltage 380V AC. As already has been exposed, due to industrial project cancellation it is decided no to continue with all improvements and directly to evaluate it in the current phase.

Propellantless de orbiting of space debris by bare electrodynamic tethers

A 3-year Project started on November 1 2010, financed by the European Commision within the FP-7 Space Program, and aimed at developing an efficient de-orbit system that could be carried on board by future spacecraft launched into LEO, will be presented. The operational system will deploy a thin uninsulated tape-tether to collect electrons as a giant Langmuir probe, using no propellant/no power supply, and generating power on board. This project will involve free-fall tests, and laboratory hypervelocity-impact and tether-current tests, and design/Manufacturing of subsystems: interface elements, electric control and driving module, electron-ejecting plasma contactor, tether-deployment mechanism/end-mass, and tape samples. Preliminary results to be presented involve: i) devising criteria for sizing the three disparate tape dimensions, affecting mass, resistance, current-collection, magnetic self-field, and survivability against debris itself; ii) assessing the dynamical relevance of tether parameters in implementing control laws to limit oscillations in /off the orbital plane, where passive stability may be marginal; iii) deriving a law for bare-tape current from numerical simulations and chamber tests, taking into account ambient magnetic field, ion ram motion, and adiabatic electron trapping; iv) determining requirements on a year-dormant hollow cathode under long times/broad emission-range operation, and trading-off against use of electron thermal emission; v) determining requirements on magnetic components and power semiconductors for a control module that faces high voltage/power operation under mass/volume limitations; vi) assessing strategies to passively deploy a wide conductive tape that needs no retrieval, while avoiding jamming and ending at minimum libration; vii) evaluating the tape structure as regards conductive and dielectric materials, both lengthwise and in its cross-section, in particular to prevent arcing in triple-point junctions.

Minimum time control for multiphase buck converter: analysis and application

The combination of minimum time control and multiphase converter is a favorable option for dc-dc converters in applications where output voltage variation is required, such as RF amplifiers and dynamic voltage scaling in microprocessors, due to their advantage of fast dynamic response. In this paper, an improved minimum time control approach for multiphase buck converter that is based on charge balance technique, aiming at fast output voltage transition is presented. Compared with the traditional method, the proposed control takes into account the phase delay and current ripple in each phase. Therefore, by investigating the behavior of multiphase converter during voltage transition, it resolves the problem of current unbalance after the transient, which can lead to long settling time of the output voltage. The restriction of this control is that the output voltage that the converter can provide is related to the number of the phases, because only the duty cycles at which the multiphase converter has total ripple cancellation are used in this approach. The model of the proposed control is introduced, and the design constraints of the buck converters filter for this control are discussed. In order to prove the concept, a four-phase buck converter is implemented and the experimental results that validate the proposed control method are presented. The application of this control to RF envelope tracking is also presented in this paper.

Wide bandwidth envelope trackers with reduced switching frequency for RF power amplifier

El requerimiento de proveer alta frecuencia de datos en los modernos sistema de comunicación inalámbricos resulta en complejas señales moduladas de radio-frequencia (RF) con un gran ancho de banda y alto ratio pico-promedio (PAPR). Para garantizar la linealidad del comportamiento, los amplificadores lineales de potencia comunes funcionan típicamente entre 4 y 10 dB de back-o_ desde la máxima potencia de salida, ocasionando una baja eficiencia del sistema. La eliminación y restauración de la evolvente (EER) y el seguimiento de la evolvente (ET) son dos prometedoras técnicas para resolver el problema de la eficiencia. Tanto en EER como en ET, es complicado diseñar un amplificador de potencia que sea eficiente para señales de RF de alto ancho de banda y alto PAPR. Una propuesta común para los amplificadores de potencia es incluir un convertidor de potencia de muy alta eficiencia operando a frecuencias más altas que el ancho de banda de la señal RF. En este caso, la potencia perdida del convertidor ocasionado por la alta frecuencia desaconseja su práctica cuando el ancho de banda es muy alto. La solución a este problema es el enfoque de esta disertación que presenta dos arquitecturas de amplificador evolvente: convertidor híbrido-serie con una técnica de evolvente lenta y un convertidor multinivel basado en un convertidor reductor multifase con control de tiempo mínimo. En la primera arquitectura, una topología híbrida está compuesta de una convertidor reductor conmutado y un regulador lineal en serie que trabajan juntos para ajustar la tensión de salida para seguir a la evolvente con precisión. Un algoritmo de generación de una evolvente lenta crea una forma de onda con una pendiente limitada que es menor que la pendiente máxima de la evolvente original. La salida del convertidor reductor sigue esa forma de onda en vez de la evolvente original usando una menor frecuencia de conmutación, porque la forma de onda no sólo tiene una pendiente reducida sino también un menor ancho de banda. De esta forma, el regulador lineal se usa para filtrar la forma de onda tiene una pérdida de potencia adicional. Dependiendo de cuánto se puede reducir la pendiente de la evolvente para producir la forma de onda, existe un trade-off entre la pérdida de potencia del convertidor reductor relacionada con la frecuencia de conmutación y el regulador lineal. El punto óptimo referido a la menor pérdida de potencia total del amplificador de evolvente es capaz de identificarse con la ayuda de modelo preciso de pérdidas que es una combinación de modelos comportamentales y analíticos de pérdidas. Además, se analiza el efecto en la respuesta del filtro de salida del convertidor reductor. Un filtro de dampeo paralelo extra es necesario para eliminar la oscilación resonante del filtro de salida porque el convertidor reductor opera en lazo abierto. La segunda arquitectura es un amplificador de evolvente de seguimiento de tensión multinivel. Al contrario que los convertidores que usan multi-fuentes, un convertidor reductor multifase se emplea para generar la tensión multinivel. En régimen permanente, el convertidor reductor opera en puntos del ciclo de trabajo con cancelación completa del rizado. El número de niveles de tensión es igual al número de fases de acuerdo a las características del entrelazamiento del convertidor reductor. En la transición, un control de tiempo mínimo (MTC) para convertidores multifase es novedosamente propuesto y desarrollado para cambiar la tensión de salida del convertidor reductor entre diferentes niveles. A diferencia de controles convencionales de tiempo mínimo para convertidores multifase con inductancia equivalente, el propuesto MTC considera el rizado de corriente por cada fase basado en un desfase fijo que resulta en diferentes esquemas de control entre las fases. La ventaja de este control es que todas las corrientes vuelven a su fase en régimen permanente después de la transición para que la siguiente transición pueda empezar muy pronto, lo que es muy favorable para la aplicación de seguimiento de tensión multinivel. Además, el control es independiente de la carga y no es afectado por corrientes de fase desbalanceadas. Al igual que en la primera arquitectura, hay una etapa lineal con la misma función, conectada en serie con el convertidor reductor multifase. Dado que tanto el régimen permanente como el estado de transición del convertidor no están fuertemente relacionados con la frecuencia de conmutación, la frecuencia de conmutación puede ser reducida para el alto ancho de banda de la evolvente, la cual es la principal consideración de esta arquitectura. La optimización de la segunda arquitectura para más alto anchos de banda de la evolvente es presentada incluyendo el diseño del filtro de salida, la frecuencia de conmutación y el número de fases. El área de diseño del filtro está restringido por la transición rápida y el mínimo pulso del hardware. La rápida transición necesita un filtro pequeño pero la limitación del pulso mínimo del hardware lleva el diseño en el sentido contrario. La frecuencia de conmutación del convertidor afecta principalmente a la limitación del mínimo pulso y a las pérdidas de potencia. Con una menor frecuencia de conmutación, el ancho de pulso en la transición es más pequeño. El número de fases relativo a la aplicación específica puede ser optimizado en términos de la eficiencia global. Otro aspecto de la optimización es mejorar la estrategia de control. La transición permite seguir algunas partes de la evolvente que son más rápidas de lo que el hardware puede soportar al precio de complejidad. El nuevo método de sincronización de la transición incrementa la frecuencia de la transición, permitiendo que la tensión multinivel esté más cerca de la evolvente. Ambas estrategias permiten que el convertidor pueda seguir una evolvente con un ancho de banda más alto que la limitación de la etapa de potencia. El modelo de pérdidas del amplificador de evolvente se ha detallado y validado mediante medidas. El mecanismo de pérdidas de potencia del convertidor reductor tiene que incluir las transiciones en tiempo real, lo cual es diferente del clásico modelos de pérdidas de un convertidor reductor síncrono. Este modelo estima la eficiencia del sistema y juega un papel muy importante en el proceso de optimización. Finalmente, la segunda arquitectura del amplificador de evolvente se integra con el amplificador de clase F. La medida del sistema EER prueba el ahorro de energía con el amplificador de evolvente propuesto sin perjudicar la linealidad del sistema. ABSTRACT The requirement of delivering high data rates in modern wireless communication systems results in complex modulated RF signals with wide bandwidth and high peak-to-average ratio (PAPR). In order to guarantee the linearity performance, the conventional linear power amplifiers typically work at 4 to 10 dB back-off from the maximum output power, leading to low system efficiency. The envelope elimination and restoration (EER) and envelope tracking (ET) are two promising techniques to overcome the efficiency problem. In both EER and ET, it is challenging to design efficient envelope amplifier for wide bandwidth and high PAPR RF signals. An usual approach for envelope amplifier includes a high-efficiency switching power converter operating at a frequency higher than the RF signal's bandwidth. In this case, the power loss of converter caused by high switching operation becomes unbearable for system efficiency when signal bandwidth is very wide. The solution of this problem is the focus of this dissertation that presents two architectures of envelope amplifier: a hybrid series converter with slow-envelope technique and a multilevel converter based on a multiphase buck converter with the minimum time control. In the first architecture, a hybrid topology is composed of a switched buck converter and a linear regulator in series that work together to adjust the output voltage to track the envelope with accuracy. A slow envelope generation algorithm yields a waveform with limited slew rate that is lower than the maximum slew rate of the original envelope. The buck converter's output follows this waveform instead of the original envelope using lower switching frequency, because the waveform has not only reduced slew rate but also reduced bandwidth. In this way, the linear regulator used to filter the waveform has additional power loss. Depending on how much reduction of the slew rate of envelope in order to obtain that waveform, there is a trade-off between the power loss of buck converter related to the switching frequency and the power loss of linear regulator. The optimal point referring to the lowest total power loss of this envelope amplifier is identified with the help of a precise power loss model that is a combination of behavioral and analytic loss model. In addition, the output filter's effect on the response is analyzed. An extra parallel damping filter is needed to eliminate the resonant oscillation of output filter L and C, because the buck converter operates in open loop. The second architecture is a multilevel voltage tracking envelope amplifier. Unlike the converters using multi-sources, a multiphase buck converter is employed to generate the multilevel voltage. In the steady state, the buck converter operates at complete ripple cancellation points of duty cycle. The number of the voltage levels is equal to the number of phases according the characteristics of interleaved buck converter. In the transition, a minimum time control (MTC) for multiphase converter is originally proposed and developed for changing the output voltage of buck converter between different levels. As opposed to conventional minimum time control for multiphase converter with equivalent inductance, the proposed MTC considers the current ripple of each phase based on the fixed phase shift resulting in different control schemes among the phases. The advantage of this control is that all the phase current return to the steady state after the transition so that the next transition can be triggered very soon, which is very favorable for the application of multilevel voltage tracking. Besides, the control is independent on the load condition and not affected by the unbalance of phase current. Like the first architecture, there is also a linear stage with the same function, connected in series with the multiphase buck converter. Since both steady state and transition state of the converter are not strongly related to the switching frequency, it can be reduced for wide bandwidth envelope which is the main consideration of this architecture. The optimization of the second architecture for wider bandwidth envelope is presented including the output filter design, switching frequency and the number of phases. The filter design area is restrained by fast transition and the minimum pulse of hardware. The fast transition needs small filter but the minimum pulse of hardware limitation pushes the filter in opposite way. The converter switching frequency mainly affects the minimum pulse limitation and the power loss. With lower switching frequency, the pulse width in the transition is smaller. The number of phases related to specific application can be optimized in terms of overall efficiency. Another aspect of optimization is improving control strategy. Transition shift allows tracking some parts of envelope that are faster than the hardware can support at the price of complexity. The new transition synchronization method increases the frequency of transition, allowing the multilevel voltage to be closer to the envelope. Both control strategies push the converter to track wider bandwidth envelope than the limitation of power stage. The power loss model of envelope amplifier is detailed and validated by measurements. The power loss mechanism of buck converter has to include the transitions in real time operation, which is different from classical power loss model of synchronous buck converter. This model estimates the system efficiency and play a very important role in optimization process. Finally, the second envelope amplifier architecture is integrated with a Class F amplifier. EER system measurement proves the power saving with the proposed envelope amplifier without disrupting the linearity performance.

La identificaciónde de los daños estructurales, herramienta de la nueva atribución de responsabilidades : análisis crítico de la transición del art. 1591 cc al art. 17 LOE

RESUMEN Su objetivo esencial: Regular el proceso de la edificación, está basado en 3 grandes pilares: 1.- Completar la configuración legal de los agentes que intervienen en el mismo, fijando sus obligaciones para así establecer las responsabilidades. 2.- Fomentar la calidad de los edificios. 3.- Fijar las garantías a los usuarios frente a los posibles daños. Estos tres fundamentos están intensamente relacionados, ya que, las obligaciones y responsabilidades de los agentes son la base de la constitución de las garantías a los usuarios, definidas mediante los requisitos básicos que deben satisfacer los edificios. Partiendo del análisis cualitativo y cuantitativo del grado de cumplimiento del objetivo de la nueva Ley, elaborado a través del estudio de sus tres pilares fundamentales, proponemos medidas tendentes a la plena entrada en vigor de la misma. Para ello se deberá desarrollar el Real Decreto previsto en la Disposición Adicional 2ª, una vez conseguido el grado de madurez de los sectores de la edificación y del seguro. En todo este proceso de estudio hemos podido apreciar que la objetiva identificación de los daños y en especial los que afectan la estabilidad del edificio, constituye una herramienta fundamental para la correcta atribución de responsabilidades a los agentes, basada en la aplicación de los tres grados de responsabilidad “ex lege” por daños materiales y sus plazos de prescripción surgidos del nuevo régimen impuesto por el art. 17 LOE Para avalar esta propuesta hemos analizado: 1.- El entorno económico, general y pormenorizado al sector de la edificación, en Europa y España durante el período comprendido entre los años 1990 y 2013, años previos y posteriores a la entrada en vigor de la Ley, dada la influencia de los ciclos de actividad producidos en la regulación del sector, las responsabilidades atribuidas a los agentes, el fomento de la calidad y las garantías ofrecidas a los adquirentes. 2.- Las diversas legislaciones sobre responsabilidades y garantías de los agentes de la edificación en los países de nuestro entorno económico. 3.- La gestación de la LOE, incidiendo en la evolución de los últimos borradores y su tramitación parlamentaria. 4.- El desarrollo doctrinal de la Transición desde el régimen de responsabilidades, fijado por el art. 1591 de Código Civil, y su Jurisprudencia, hacia el nuevo régimen de responsabilidades establecido por el art. 17 LOE. En esta tarea además de apreciar la asimilación, por parte de los Jueces y Magistrados, de los principios doctrinales de la LOE, hemos observado la labor de los peritos, de cuya experta identificación de las causas de los daños depende la justa y eficaz atribución de responsabilidades. 5 -. El grado de eficacia de la LOE a la vista de la estadística siniestral, de la que ya hay datos consolidados, tras la cancelación de casi 15.000 expedientes de reclamación a Arquitectos. 6 -. También hemos estudiado el grado de cumplimiento con el usuario y propietario de las garantías previstas en el art. 19 de la Ley y en la D.A. 1ª, los efectos reales alcanzados y las tareas pendientes por delante. Analizando la atribución de responsabilidades a los agentes de la edificación, dentro del primer pilar fundamental de la LOE, hemos estudiado las actuaciones de los peritos expertos y su incidencia en este objetivo, previa selección de casos de gran interés y dificultad. Fruto de ello se han formulado propuestas tendentes a la especialización de este colectivo, evitando conductas “irregulares” que tanto daño provocan a los agentes reclamados como a los propietarios afectados. Este daño es evidente pudiendo ocasionar condenas injustas, enriquecimientos ilícitos o bien falsas expectativas de satisfacción de daños mal dictaminados y costosas e ineficaces reparaciones. De cara a la consecución del pilar de la calidad de la edificación, mediante los requisitos básicos planteados por la LOE y desarrollados por el Código Técnico de la Edificación (Real Decreto 314/2006, de 17 de marzo), hemos procesado datos de expedientes de reclamaciones por daños que afectan a edificios ejecutados bajo el nuevo régimen LOE. Con esta base se han analizado las causas generadoras de las diversas lesiones y su frecuencia para que de este análisis puedan establecerse pautas de actuación para su prevención. Finalmente, tras demostrar que las garantías obligatorias impuestas por la LOE sólo abarcan un pequeño porcentaje de los posibles daños a la edificación, insistimos en la necesidad de la plena eficacia de la Ley mediante la aprobación de todas las garantías previstas y para todo tipo de edificaciones. En suma, se ha diseñado la tesis como una matriz abierta en la que podremos continuar incorporando datos de la evolución de la doctrina, la jurisprudencia y la estadística de los daños en la edificación. ABSTRACT The approval of Law 38/1999 on November 5, 1999, (Official Gazette BOE 266/1999 of 11.6.1999, p. 38925), was the culmination of a long period of over 20 years of gestation for which deep agreements were needed between all stakeholders affected. Although several parliamentary groups denounced its incomplete approval, regarding mandatory guarantees to the purchaser, its enactment caused general satisfaction among most of the the building agents. This assessment remains after fourteen years since its partial enactment. Its essential purpose, “to regulate the building process”, is based on 3 pillars: 1.- To complete the legal configuration of the agents involved in it, setting their obligations in order to establish their responsibilities. 2.- To promote the buildings quality. 3.- To specify users´guarantees against possible buildings damage. These three issues are strongly related, since the obligations and responsibilities of the actors are the basis of the users’guarantees constitution, defined by the basic performance required by buildings. Based on the qualitative and quantitative analysis of the fulfillment of the new law’s objectives, made by monitoring the three pillars, we propose measures to the full enactment of this Directive, by the development of the Royal Decree, provided in its Second Additional Provision, once maturity in the sectors of the building and insurance is achieved. Throughout this process of study we have seen that the skill identification of damage, particularly those affecting the stability of the building, is an essential tool for the proper allocation of responsibilities of the new regime installed by the art. 17 LOE, based on the application of the three degrees of responsibility "ex lege" for property damage and limitation periods. To support this proposal, we have analyzed: 1.- The evolution of the building sector in Europe and Spain during the years before and after the enactment of the Law, due to the influence of cycles of activity produced in industry regulation, the responsibilities attributed to agents, promotion of the quality and the assurances given to acquirers. 2.- The scope of various laws on liability and building agents warranties in the countries of our economic environment. 3.- The long period of LOE generation, focusing on the developments in recent drafts and parliamentary procedure. 4.- The doctrinal development in the Transition from the regime of responsibilities, set by art. 1591 of the Civil Code, and its Jurisprudence, to the new liability regime established by art. 17 LOE. In this task, while we have noted assimilation by the Judges and Magistrates of the doctrinal principles of the LOE, we have also analyzed the work of experts, whose skilled identification of the damage causes helps the fair and efficient allocation of responsibilities. 5 - The effectiveness of the LOE based on knowledge of the siniestral statistics, which are already consolidated data, after the cancellation of nearly 15,000 claims to Architects. 6.- We have also studied the degree of compliance with the user and owner guarantees, established in art. 19 and the D.A. 1th of the LOE, exposing the real effects achieved and the pending tasks ahead. Analyzing the allocation of the building agents´ responsibilities, within the first cornerstone of the LOE, we have studied the expert witnesses actions and their impact on this duty, selecting cases of great interest and difficulty in this aim. The result of this enterprise has been to propose the specialization of this group, avoiding "irregular" behaviors that create as much damage as the agents claimed to affected owners. This damage is evident and can cause wrong convictions, illicit enrichment, false expectations and inefficient and costly damage repairs. In order to achieve the pillar of building quality through the basic requirements set by the LOE and developed by the Technical Building Code (Royal Decree 314/ 2006 of 17 March), we have analyzed records of damage claims involving buildings executed under the new regime LOE. On this basis we have analyzed the root causes of various damages and their frequency, from these data it will be easy to propose lines of action for prevention. Finally, after demonstrating that mandatory warranties imposed by LOE cover only a small percentage of the potential building damage, we emphasize the need for the full effectiveness of the Law by the obligation all the guarantees provided in the art. 19 LOE, and for all types of buildings. In conclusion, this thesis is designed as an open matrix in which we will continue including data on the evolution of the doctrine, jurisprudence and the statistics of the damage to the building.

Singularities in DROMO formulation. Analysis of deep flybys

The singularities in Dromo are characterized in this paper, both from an analytical and a numerical perspective. When the angular momentum vanishes, Dromo may encounter a singularity in the evolution equations. The cancellation of the angular momentum occurs in very speci?c situations and may be caused by the action of strong perturbations. The gravitational attraction of a perturbing planet may lead to rapid changes in the angular momentum of the particle. In practice, this situation may be encountered during deep planetocentric ?ybys. The performance of Dromo is evaluated in di?erent scenarios. First, Dromo is validated for integrating the orbit of Near Earth Asteroids. Resulting errors are of the order of the diameter of the asteroid. Second, a set of theoretical ?ybys are designed for analyzing the performance of the formulation in the vicinity of the singularity. New sets of Dromo variables are proposed in order to minimize the dependency of Dromo on the angular momentum. A slower time scale is introduced, leading to a more stable description of the ?yby phase. Improvements in the overall performance of the algorithm are observed when integrating orbits close to the singularity.

Packing of atermal polymers in the bulk and under confinement

Polymers constitute a distinct class of anisotropic particles with unique dynamical, rheological and mechanical properties.

Managing daily surgery schedules in a teaching hospital: a mixed-integer optimization approach

Background: This study examined the daily surgical scheduling problem in a teaching hospital. This problem relates to the use of multiple operating rooms and different types of surgeons in a typical surgical day with deterministic operation durations (preincision, incision, and postincision times). Teaching hospitals play a key role in the health-care system; however, existing models assume that the duration of surgery is independent of the surgeon's skills. This problem has not been properly addressed in other studies. We analyze the case of a Spanish public hospital, in which continuous pressures and budgeting reductions entail the more efficient use of resources. Methods: To obtain an optimal solution for this problem, we developed a mixed-integer programming model and user-friendly interface that facilitate the scheduling of planned operations for the following surgical day. We also implemented a simulation model to assist the evaluation of different dispatching policies for surgeries and surgeons. The typical aspects we took into account were the type of surgeon, potential overtime, idling time of surgeons, and the use of operating rooms. Results: It is necessary to consider the expertise of a given surgeon when formulating a schedule: such skill can decrease the probability of delays that could affect subsequent surgeries or cause cancellation of the final surgery. We obtained optimal solutions for a set of given instances, which we obtained through surgical information related to acceptable times collected from a Spanish public hospital. Conclusions: We developed a computer-aided framework with a user-friendly interface for use by a surgical manager that presents a 3-D simulation of the problem. Additionally, we obtained an efficient formulation for this complex problem. However, the spread of this kind of operation research in Spanish public health hospitals will take a long time since there is a lack of knowledge of the beneficial techniques and possibilities that operational research can offer for the health-care system.

Cancelación activa del ruido utilizando el KIT TMS320C5515 EZDSP

El control, o cancelación activa de ruido, consiste en la atenuación del ruido presente en un entorno acústico mediante la emisión de una señal igual y en oposición de fase al ruido que se desea atenuar. La suma de ambas señales en el medio acústico produce una cancelación mutua, de forma que el nivel de ruido resultante es mucho menor al inicial. El funcionamiento de estos sistemas se basa en los principios de comportamiento de los fenómenos ondulatorios descubiertos por Augustin-Jean Fresnel, Christiaan Huygens y Thomas Young entre otros. Desde la década de 1930, se han desarrollado prototipos de sistemas de control activo de ruido, aunque estas primeras ideas eran irrealizables en la práctica o requerían de ajustes manuales cada poco tiempo que hacían inviable su uso. En la década de 1970, el investigador estadounidense Bernard Widrow desarrolla la teoría de procesado adaptativo de señales y el algoritmo de mínimos cuadrados LMS. De este modo, es posible implementar filtros digitales cuya respuesta se adapte de forma dinámica a las condiciones variables del entorno. Con la aparición de los procesadores digitales de señal en la década de 1980 y su evolución posterior, se abre la puerta para el desarrollo de sistemas de cancelación activa de ruido basados en procesado de señal digital adaptativo. Hoy en día, existen sistemas de control activo de ruido implementados en automóviles, aviones, auriculares o racks de equipamiento profesional. El control activo de ruido se basa en el algoritmo fxlms, una versión modificada del algoritmo LMS de filtrado adaptativo que permite compensar la respuesta acústica del entorno. De este modo, se puede filtrar una señal de referencia de ruido de forma dinámica para emitir la señal adecuada que produzca la cancelación. Como el espacio de cancelación acústica está limitado a unas dimensiones de la décima parte de la longitud de onda, sólo es viable la reducción de ruido en baja frecuencia. Generalmente se acepta que el límite está en torno a 500 Hz. En frecuencias medias y altas deben emplearse métodos pasivos de acondicionamiento y aislamiento, que ofrecen muy buenos resultados. Este proyecto tiene como objetivo el desarrollo de un sistema de cancelación activa de ruidos de carácter periódico, empleando para ello electrónica de consumo y un kit de desarrollo DSP basado en un procesador de muy bajo coste. Se han desarrollado una serie de módulos de código para el DSP escritos en lenguaje C, que realizan el procesado de señal adecuado a la referencia de ruido. Esta señal procesada, una vez emitida, produce la cancelación acústica. Empleando el código implementado, se han realizado pruebas que generan la señal de ruido que se desea eliminar dentro del propio DSP. Esta señal se emite mediante un altavoz que simula la fuente de ruido a cancelar, y mediante otro altavoz se emite una versión filtrada de la misma empleando el algoritmo fxlms. Se han realizado pruebas con distintas versiones del algoritmo, y se han obtenido atenuaciones de entre 20 y 35 dB medidas en márgenes de frecuencia estrechos alrededor de la frecuencia del generador, y de entre 8 y 15 dB medidas en banda ancha. ABSTRACT. Active noise control consists on attenuating the noise in an acoustic environment by emitting a signal equal but phase opposed to the undesired noise. The sum of both signals results in mutual cancellation, so that the residual noise is much lower than the original. The operation of these systems is based on the behavior principles of wave phenomena discovered by Augustin-Jean Fresnel, Christiaan Huygens and Thomas Young. Since the 1930’s, active noise control system prototypes have been developed, though these first ideas were practically unrealizable or required manual adjustments very often, therefore they were unusable. In the 1970’s, American researcher Bernard Widrow develops the adaptive signal processing theory and the Least Mean Squares algorithm (LMS). Thereby, implementing digital filters whose response adapts dynamically to the variable environment conditions, becomes possible. With the emergence of digital signal processors in the 1980’s and their later evolution, active noise cancellation systems based on adaptive signal processing are attained. Nowadays active noise control systems have been successfully implemented on automobiles, planes, headphones or racks for professional equipment. Active noise control is based on the fxlms algorithm, which is actually a modified version of the LMS adaptive filtering algorithm that allows compensation for the acoustic response of the environment. Therefore it is possible to dynamically filter a noise reference signal to obtain the appropriate cancelling signal. As the noise cancellation space is limited to approximately one tenth of the wavelength, noise attenuation is only viable for low frequencies. It is commonly accepted the limit of 500 Hz. For mid and high frequencies, conditioning and isolating passive techniques must be used, as they produce very good results. The objective of this project is to develop a noise cancellation system for periodic noise, by using consumer electronics and a DSP development kit based on a very-low-cost processor. Several C coded modules have been developed for the DSP, implementing the appropriate signal processing to the noise reference. This processed signal, once emitted, results in noise cancellation. The developed code has been tested by generating the undesired noise signal in the DSP. This signal is emitted through a speaker simulating the noise source to be removed, and another speaker emits an fxlms filtered version of the same signal. Several versions of the algorithm have been tested, obtaining attenuation levels around 20 – 35 dB measured in a tight bandwidth around the generator frequency, or around 8 – 15 dB measured in broadband.