Alta velocidad ferroviaria en California(USA): quinta parte (V) LAV San Francisco–Sacramento (Bay Crossing Alternative) = High speed railway in California (USA): fith part (V) HSRL San Francisco–Sacramento (Bay Crossing Alternative)

Implantación de la Red de Alta velocidad Ferroviaria en California. Tramo San Francisco-Sacramento. Este artículo de la serie “Alta velocidad Ferroviaria en California (CHSRS), se ocupa de la línea San Francisco– Sacramento “Bay Crossing Alternative”, que cierra la red de alta velocidad ferroviaria del Estado de California, permitiendo en la terminal HSR de Sacramento, conectar con la línea Fresno–Sacramento, en coincidencia de trazados para en el futuro prolongar la red californiana de alta velocidad ferroviaria hasta su entronque con la del Estado de Nevada, vía Tahoe Lake–Reno. La línea San Francisco–Sacramento “Bay Crossing Alternative”, consta de tres trayectos: El primero de ellos “San Francisco urbano” va desde la terminal HSR “San Francisco Airport”, donde termina la alternativa “Golden Gate” de la línea Fresno–San Francisco, hasta el viaducto de acceso al Paso de la Bahía, que constituye el segundo trayecto “San Francisco–Richmond”, trayecto estrella de la red, de 15,48 Km de longitud sobre la Bahía de San Francisco, con desarrollo a través de 11,28 Km en puente colgante múltiple, con vanos de 800 m de luz y 67 m de altura libre bajo el tablero que permite la navegación en la Bahía. El tercer trayecto “Richmond–Sacramento” cruza la Bahía de San Pablo con un puente colgante de 1,6 Km de longitud y tipología similar a los múltiples de la Bahía de San Francisco, pasa por Vallejo (la por plazo breve de tiempo, antigua capital del Estado de California) y por la universitaria Davis, antes de finalmente llegar a la HSR Terminal Station de Sacramento Roseville. This article of the series “California High Speed Railway System”(CHSRS) treats on Line San Francisco–Sacramento “Bay Crossing Alternative” (BCA). This line closes the system of California high speed state railway, and connects with the line Fresno–Sacramento “Stockton Arch Alternative”, joining its alignments in the HSR Terminal of Sacramento Roseville. From this station it will be possible, in the future, to extend the Californian railway system till the Nevada railway system, vía Tahoe Lake and Reno. The BCA consists of three sections: The first one passing through San Francisco city, goes from HSR San Francisco Airport Terminal Station (where the line Fresno–San Francisco “Golden Gate Alternative” ends), up to the Viaduct access at the Bay Crossing. The second section San Francisco–Richmond, constitutes the star section of the system, with 15,48 Km length on the San Francisco Bay, where 11,28 Km in multi suspension bridge, 800 m span and 67 m gauge under panel, to allow navigation through the Bay. The third section Richmond–Sacramento crosses the San Pablo Bay through another suspension bridge of similar typology to that of San Francisco Bay crossing; pass through Vallejo (the ancient and for a short time Head of the State of California) and through Davis, university city, to arrive to the HSR Terminal Station of Sacramento Roseville.

Alta velocidad ferroviaria en California(USA): cuarta parte (IV) Fresno-Sacramento (Roseville) = High speed railway in California (USA): fourth part (IV) Fresno-Sacramento (Roseville)

Implantación de la Red de Alta velocidad Ferroviaria en California. Tramo Fresno-Sacramento. El presente articúlo es la cuarta parte de la serie "Alta Velocidad Ferroviaria en California (CHSRS)". Recoge la Alternativa "Stockton Arch", que el Proyecto FARWEST presenta a la prevista por la Authority (CHSRA), para la Línea HSR Fresno-Sacramento, en programación y en trazado. Éste discurre, desde la gran Terminal de Fresno (implantada en las afueras al suroeste de la ciudad) por el segmento sur del "mar interior" (que en el Terciario Superior ocupaba el actual Valle Central), hasta Stockton, y por el segmento norte, hasta Sacramento. El Paet de Ripperdan (~ pK 40) queda conectado por carretera con el PAET de Oroloma de la Línea HSR Fresno-San Francisco (Golden Gate Alternative). La última parte del trazado de la Línea HSR Fresno-Sacramento (Stockton Arch Alternative), coincide en alineación y rasante con la Línea HSR San Francisco-Sacramento (Crossing Bay Alternative) a la altura de Roseville, donde se emplaza la gran terminal norte de la red de California, desde la que se unirá ésta con la de Nevada, por Reno. This article forras the fourth part of the series entitled "High Speed Railway in California (CHSRS)". It addresses the "Stockton Arch" alternative, which the FARWESTProjectpresents in scheduling and in alignment as to that provided for by the Authority (CHSRA) for the Fresno-Sacramento HSR Line. The latter runs from the grand Fresno Terminal (located in the outskirts to the southwest ofthe city) through the south segment ofthe "inland sea" (which oceupied the current Central Valley in the Upper Tertiary) to Stockton and through the north segment to Sacramento. The Ripperdan TSAP (post ofpassing and stabling trains), — kilometer point 40, conneets with the Oroloma TSAP ofthe Fresno-San Francisco HSR Line (Golden Gate Alternative) by road. The last part of the Fresno-Sacramento HSR Line alignment (Stockton Arch Alternative), coincides in alignment and grade with the San Francisco-Sacramento HSR Line (Crossing Bay Alternative) at Roseville, where the great north terminal ofthe California network is located, from which the latter will be linked with Nevada s network through Reno.

Thermal effects in Ni/Au and Mo/Au gate metallization AlGaN/GaN HEMT's reliability

AlGaN/GaN high electron mobility transistors (HEMT) are key devices for the next generation of high-power, high-frequency and high-temperature electronics applications. Although significant progress has been recently achieved [1], stability and reliability are still some of the main issues under investigation, particularly at high temperatures [2-3]. Taking into account that the gate contact metallization is one of the weakest points in AlGaN/GaN HEMTs, the reliability of Ni, Mo, Pt and refractory metal gates is crucial [4-6]. This work has been focused on the thermal stress and reliability assessment of AlGaN/GaN HEMTs. After an unbiased storage at 350 o C for 2000 hours, devices with Ni/Au gates exhibited detrimental IDS-VDS degradation in pulsed mode. In contrast, devices with Mo/Au gates showed no degradation after similar storage conditions. Further capacitance-voltage characterization as a function of temperature and frequency revealed two distinct trap-related effects in both kinds of devices. At low frequency (< 1MHz), increased capacitance near the threshold voltage was present at high temperatures and more pronounced for the Ni/Au gate HEMT and as the frequency is lower. Such an anomalous “bump” has been previously related to H-related surface polar charges [7]. This anomalous behavior in the C-V characteristics was also observed in Mo/Au gate HEMTs after 1000 h at a calculated channel temperatures of around from 250 o C (T2) up to 320 ºC (T4), under a DC bias (VDS= 25 V, IDS= 420 mA/mm) (DC-life test). The devices showed a higher “bump” as the channel temperature is higher (Fig. 1). At 1 MHz, the higher C-V curve slope of the Ni/Au gated HEMTs indicated higher trap density than Mo/Au metallization (Fig. 2). These results highlight that temperature is an acceleration factor in the device degradation, in good agreement with [3]. Interface state density analysis is being performed in order to estimate the trap density and activation energy.

Daños mecánicos en manzana «Golden»

El sector nacional de frutos de pepita debe incrementar sus esfuerzos por mejorar la calidad de la fruta en lo relativo a los daños mecánicos, según concluye este estudio realizado en 72 comercios minoristas de Madrid.

Daños mecánicos en frutos de manzanas del cv. "Golden Delicious" tratadas con calcio.

Se han realizado tres ensayos con manzanas del cv. "Golden Delicious" procedentes de Lérida que diferían en sus tratamientos de calcio, siempre manteniendo un testigo sin tratar. En un primer ensayo se comparan manzanas tratadas con no tratadas; en el segundo se comparan manzanas tratadas en pre y post cosecha y en un tercero se comparan tratamientos en precosecha con CaCl2 y quelatos. Todos los frutos han sido sometidos a ensayos de impacto, corte y penetración. Se discute la posibilidad de que estos tratamientos mejoren la resistencia a los daños y la calidad.

Bit noise from an optical logic gate with laser diodes

Output bits from an optical logic cell present noise due to the type of technique used to obtain the Boolean functions of two input data bits. We have simulated the behavior of an optically programmable logic cell working with Fabry Perot-laser diodes of the same type employed in optical communications (1550nm) but working here as amplifiers. We will report in this paper a study of the bit noise generated from the optical non-linearity process allowing the Boolean function operation of two optical input data signals. Two types of optical logic cells will be analyzed. Firstly, a classical "on-off" behavior, with transmission operation of LD amplifier and, secondly, a more complicated configuration with two LD amplifiers, one working on transmission and the other one in reflection mode. This last configuration has nonlinear behavior emulating SEED-like properties. In both cases, depending on the value of a "1" input data signals to be processed, a different logic function can be obtained. Also a CW signal, known as control signal, may be apply to fix the type of logic function. The signal to noise ratio will be analyzed for different parameters, as wavelength signals and the hysteresis cycles regions associated to the device, in relation with the signals power level applied. With this study we will try to obtain a better understanding of the possible effects present on an optical logic gate with Laser Diodes.

Influencia del riego en precosecha sobre la calidad de manzanas Golden Supreme y Golden Smoothee.

El riego, práctica habitual y a la vez indispensable de nuestra fruticultura constituye, en su manejo, uno de los principales factores determinantes de la producción y calidad final del fruto, y sobre el cual el agricultor desempeña un papel indispensable como regulador. A este respecto hay varios estudios que entre si presentan conclusiones dispares. El hecho de aumentar la frecuencia y dosis de riego provoca, según varios autores, una disminución en la firmeza de las manzanas (Asaf et al., 1975), mientras que en otras investigaciones se observa el fenómeno contrario (Reichel y Schmidt, 1983). También hay estudios con resultados dispares en relación al efecto que el riego pueda tener en la acidez titulable y el contenido en sólidos solubles del fruto. No obstante, parece ser que una restricción de riego en precosecha se traduce en un aumento de los sólidos solubles de los frutos (Ramos et al., 1993) y en una disminución de su acidez (Recasens et al., 1988). La fecha de recolección también es un factor muy importante en vistas a una optimización tanto de rendimientos de la plantación como de la aptitud del fruto para su frigoconservación. Recolectar un mismo fruto una semana más tarde implica una pérdida de firmeza durante su frigoconservación de aproximadamente 1,5 N por mes, pasando de unas pérdidas mensuales de 3 N a 4,5 N según se haga la recolección en el momento optimo o después (Duran, 1990). Es este acumulo de discrepancias el que ha motivado el planteamiento de este ensayo para nuestras propias condiciones de cultivo. En él se pretende ver si diferentes fechas de recolección y condiciones de riego pueden influir en la firmeza de los frutos y por tanto en su sensibilidad a la manipulación, aspecto de gran interés en el momento de la cosecha. Asimismo es preciso comprobar que estas prácticas culturales no afecten a la calidad del fruto.

Low-power vertical cavity NAND gate

The study of the Vertical-Cavity Semiconductor Optical Amplifiers (VCSOAs) for optical signal processing applications is increasing his interest. Due to their particular structure, the VCSOAs present some advantages when compared to their edge-emitting counterparts including low manufacturing costs, high coupling efficiency to optical fibers and the ease to fabricate 2-D arrays of this kind of devices. As a consequence, all-optical logic gates based on VCSOAs may be very promising devices for their use in optical computing and optical switching in communications. Moreover, since all the boolean logic functions can be implemented by combining NAND logic gates, the development of a Vertical-Cavity NAND gate would be of particular interest. In this paper, the characteristics of the dispersive optical bistability appearing on a VCSOA operated in reflection are studied. A progressive increment of the number of layers compounding the top Distributed Bragg Reflector (DBR) of the VCSOA results on a change on the shape of the appearing bistability from an S-shape to a clockwise bistable loop. This resulting clockwise bistability has high on-off contrast ratio and input power requirements one order of magnitude lower than those needed for edge-emitting devices. Based on these results, an all-optical vertical-cavity NAND gate with high on-off contrast ratio and an input power for operation of only 10|i\V will be reported in this paper.

A self-timed multipurpose delay sensor for field programmable gate arrays (FPGAs)

This paper presents a novel self-timed multi-purpose sensor especially conceived for Field Programmable Gate Arrays (FPGAs). The aim of the sensor is to measure performance variations during the life-cycle of the device, such as process variability, critical path timing and temperature variations. The proposed topology, through the use of both combinational and sequential FPGA elements, amplifies the time of a signal traversing a delay chain to produce a pulse whose width is the sensor’s measurement. The sensor is fully self-timed, avoiding the need for clock distribution networks and eliminating the limitations imposed by the system clock. One single off- or on-chip time-to-digital converter is able to perform digitization of several sensors in a single operation. These features allow for a simplified approach for designers wanting to intertwine a multi-purpose sensor network with their application logic. Employed as a temperature sensor, it has been measured to have an error of ±0.67 °C, over the range of 20–100 °C, employing 20 logic elements with a 2-point calibration.

Temperature performance of AlGaN/GaN MOS-HEMTs on Si substrates using Gd2O3 as gate dielectric

GaN based high electron mobility transistors have draw great attention due to its potential in high temperature, high power and high frequency applications [1, 2]. However, significant gate leakage current is still one of the issues which need to be solved to improve the performance and reliability of the devices [3]. Several research groups have contributed to solve this problem by using metal–oxide–semiconductor HEMTs (MOSHEMTs), with a thin dielectric layer, such as SiO2 [4], Al2O3 [5], HfO2 [6] and Gd2O3 [7] between the gate and the barrier layer on AlGaN/GaN heterostructures. Gd2O3 has shown low interfacial density of states(Dit) with GaN and a high dielectric constant and low electrical leakage currents [8], thus is considered as a promising candidate for the gate dielectrics on GaN. MOS-HEMTs using Gd2O3 grown by electron-beam heating [7] or molecular beam epitaxy (MBE) [8] on GaN or AlGan/GaN structure have been investigated, but further research is still needed in Gd2O3 based AlGaN/GaN MOSHEMTs.