Gestión de la información en redes de sensores inalámbricos

La gestión del conocimiento (KM) es el proceso de recolectar datos en bruto para su análisis y filtrado, con la finalidad de obtener conocimiento útil a partir de dichos datos. En este proyecto se pretende hacer un estudio sobre la gestión de la información en las redes de sensores inalámbricos como inicio para sentar las bases para la gestión del conocimiento en las mismas. Las redes de sensores inalámbricos (WSN) son redes compuestas por sensores (también conocidos como motas) distribuidos sobre un área, cuya misión es monitorizar una o varias condiciones físicas del entorno. Las redes de sensores inalámbricos se caracterizan por tener restricciones de consumo para los sensores que utilizan baterías, por su capacidad para adaptarse a cambios y ser escalables, y también por su habilidad para hacer frente a fallos en los sensores. En este proyecto se hace un estudio sobre la gestión de la información en redes de sensores inalámbricos. Se comienza introduciendo algunos conceptos básicos: arquitectura, pila de protocolos, topologías de red, etc.… Después de esto, se ha enfocado el estudio hacia TinyDB, el cual puede ser considerado como parte de las tecnologías más avanzadas en el estado del arte de la gestión de la información en redes de sensores inalámbricos. TinyDB es un sistema de procesamiento de consultas para extraer información de una red de sensores. Proporciona una interfaz similar a SQL y permite trabajar con consultas contra la red de sensores inalámbricos como si se tratara de una base de datos tradicional. Además, TinyDB implementa varias optimizaciones para manejar los datos eficientemente. En este proyecto se describe también la implementación de una sencilla aplicación basada en redes de sensores inalámbricos. Las motas en la aplicación son capaces de medir la corriente a través de un cable. El objetivo de esta aplicación es monitorizar el consumo de energía en diferentes zonas de un área industrial o doméstico, utilizando redes de sensores inalámbricas. Además, se han implementado las optimizaciones más importantes que se han aprendido en el análisis de la plataforma TinyDB. Para desarrollar esta aplicación se ha utilizado como sensores la plataforma open-source de creación de prototipos electrónicos Arduino, y el ordenador de placa reducida Raspberry Pi como coordinador. ABSTRACT. Knowledge management (KM) is the process of collecting raw data for analysis and filtering, to get a useful knowledge from this data. In this project the information management in wireless sensor networks is studied as starting point before knowledge management. Wireless sensor networks (WSN) are networks which consists of sensors (also known as motes) distributed over an area, to monitor some physical conditions of the environment. Wireless sensor networks are characterized by power consumption constrains for sensors which are using batteries, by the ability to be adaptable to changes and to be scalable, and by the ability to cope sensor failures. In this project it is studied information management in wireless sensor networks. The document starts introducing basic concepts: architecture, stack of protocols, network topology… After this, the study has been focused on TinyDB, which can be considered as part of the most advanced technologies in the state of the art of information management in wireless sensor networks. TinyDB is a query processing system for extracting information from a network of sensors. It provides a SQL-like interface and it lets us to work with queries against the wireless sensor network like if it was a traditional database. In addition, TinyDB implements a lot of optimizations to manage data efficiently. In this project, it is implemented a simple wireless sensor network application too. Application’s motes are able to measure amperage through a cable. The target of the application is, by using a wireless sensor network and these sensors, to monitor energy consumption in different areas of a house. Additionally, it is implemented the most important optimizations that we have learned from the analysis of TinyDB platform. To develop this application it is used Arduino open-source electronics prototyping platform as motes, and Raspberry Pi single-board computer as coordinator.

Evaluación del dispositivo Raspberry Pi como elemento de despliegue de servicios en el marco de las Smart Grids

La tendencia actual de las redes de telecomunicaciones conduce a pensar en un futuro basado en el concepto emergente de las Smart Cities¸ que tienen como objetivo el desarrollo urbano basado en un modelo de sostenibilidad que responda a las necesidades crecientes de las ciudades. Dentro de las Smart Cities podemos incluir el concepto de Smart Grid, el cual está referido a sistemas de administración y producción de energía eficientes, que permitan un sistema energético sostenible, y que den cabida a las fuentes de energía renovables. Sistemas de este tipo se muestran a los usuarios como un conjunto de servicios con los que interactuar sin ser tan sólo un mero cliente, sino un agente más del entorno energético. Por otro lado, los sistemas de software distribuidos son cada vez más comunes en una infraestructura de telecomunicaciones cada vez más extensa y con más capacidades. Dentro de este ámbito tecnológico, las arquitecturas orientadas a servicios han crecido exponencialmente sobre todo en el sector empresarial. Con sistemas basados en estas arquitecturas, se pueden ofrecer a empresas y usuarios sistemas software basados en el concepto de servicio. Con la progresión del hardware actual, la miniaturización de los equipos es cada vez mayor, sin renunciar por ello a la potencia que podemos encontrar en sistemas de mayor tamaño. Un ejemplo es el dispositivo Raspberry Pi, que contiene un ordenador plenamente funcional contenido en el tamaño de una cajetilla de tabaco, y con un coste muy reducido. En este proyecto se pretenden aunar los tres conceptos expuestos. De esta forma, se busca utilizar el dispositivo Raspberry Pi como elemento de despliegue integrado en una arquitectura de Smart Grid orientada a servicios. En los trabajos realizados se ha utilizado la propuesta definida por el proyecto de I+D europeo e-GOTHAM, con cuya infraestructura se ha tenido ocasión de realizar diferentes pruebas de las descritas en esta memoria. Aunque esta arquitectura está orientada a la creación de una Smart Grid, lo experimentado en este PFG podría encajar en otro tipo de aplicaciones. Dentro del estudio sobre las soluciones software actuales, se ha trabajado en la evaluación de la posibilidad de instalar un Enterprise Service Bus en el Raspberry Pi y en la optimización de la citada instalación. Una vez conseguida una instalación operativa, se ha desarrollado un controlador de un dispositivo físico (sensor/actuador), denominado Dispositivo Lógico, a modo de prueba de la viabilidad del uso del Raspberry Pi para actuar como elemento en el que instalar aplicaciones en entornos de Smart Grid o Smart Home. El éxito logrado con esta experimentación refuerza la idea de considerar al Raspberry Pi, como un importante elemento a tener en cuenta para el despliegue de servicios de Smart Cities o incluso en otros ámbitos tecnológicos. ABSTRACT. The current trend of telecommunication networks lead to think in a future based on the emerging concept of Smart Cities, whose objective is to ensure the urban development based on a sustainable model to respond the new necessities of the cities. Within the Smart cites we can include the concept of Smart Grid, which is based on management systems and efficient energy production, allowing a sustainable energy producing system, and that includes renewable energy sources. Systems of this type are shown to users as a set of services that allow users to interact with the system not only as a single customer, but also as other energy environment agent. Furthermore, distributed software systems are increasingly common in a telecommunications infrastructure more extensive and with more capabilities. Within this area of technology, service-oriented architectures have grown exponentially especially in the business sector. With systems based on these architectures, can be offered to businesses and users software systems based on the concept of service. With the progression of the actual hardware, the miniaturization of computers is increasing, without sacrificing the power of larger systems. An example is the Raspberry Pi, which contains a fully functional computer contained in the size of a pack of cigarettes, and with a very low cost. This PFG (Proyecto Fin de Grado) tries to combine the three concepts presented. Thus, it is intended to use the Raspberry Pi device as a deployment element integrated into a service oriented Smart Grid architecture. In this PFG, the one proposed in the European R&D e-GOTHAM project has been observed. In addition several tests described herein have been carried out using the infrastructure of that project. Although this architecture is oriented to the creation of a Smart Grid, the experiences reported in this document could fit into other applications. Within the study on current software solutions, it have been working on assessing the possibility of installing an Enterprise Service Bus in the Raspberry Pi and optimizing that facility. Having achieved an operating installation, it has been developed a driver for a physical device (sensor / actuator), called logical device, for testing the feasibility of using the Raspberry Pi to act as an element in which to install applications in Smart Grid and Smart Home Environments. The success of this experiment reinforces the idea of considering the Raspberry Pi as an important element to take into account in the deployment of Smart Cities services or even in other technological fields.

Using Buildroot for building Embedded Linux Systems with the Raspberry-PI

This document describes the basic steps to developed and embedded Linux-based system using the Raspberry PI board. The document has been specifically written to use a RaspBerry-PI development system based on the BCM2835 processor. All the software elements used have a GPL license.

Implementación de efectos de audio en la tarjeta Raspberry Pi B+

Este proyecto consiste en el diseño e implementación de un procesador digital de efectos de audio en tiempo real orientado a instrumentos eléctricos tales como guitarras, bajos, teclados, etc. El procesador está basado en la tarjeta Raspberry Pi B+, ordenador de placa reducida de bajo coste, desarrollado en Reino unido y cuyo lanzamiento tuvo lugar en el año 2012. En primer lugar, ha sido necesario lograr que la tarjeta asuma la funcionalidad de un procesador de audio en tiempo real. Para ello se ha instalado un sistema operativo Linux orientado a Raspberry (Raspbian) y se ha hecho uso de Pure Data (Pd): lenguaje de programación gráfico que fue desarrollado en los años 90 por Miller Puckette con intención de ser enfocado a la creación de eventos multimedia y de música por computador. El papel que desempeña Pd es de capa intermedia entre el hardware y el software ya que se encarga de tomar bloques de N muestras del convertidor analógico/digital y encaminarlas a través del flujo de señal diseñado gráficamente. En segundo lugar, se han implementado diferentes efectos de audio de distintas características. Así pues, se encuentran efectos basados en retardos, filtros digitales y procesadores de dinámica. Concretamente, los efectos implementados son los siguientes: delay, flanger, vibrato, reverberador de Schroeder, filtros (paso bajo, paso alto y paso banda), ecualizador paramétrico y compresor y expansor de dinámica. Estos efectos han sido implementados en lenguaje C de acuerdo con la API de Pd. Con esto se ha conseguido obtener un objeto por cada efecto, el cual es “instanciado” en Pd pudiendo ejecutarlo en tiempo real. En este proyecto se expone la problemática que supone cada paso del diseño proponiendo soluciones válidas. Además se incluye una guía paso a paso para configurar la tarjeta y lograr realizar un bypass de señal y un efecto simple partiendo desde cero. ABSTRACT. This project involves the design and implementation of a digital real-time audio processor for electrical instruments (guitars, basses, keyboards, etc.). The processor is based on the Raspberry Pi B + card: low cost computer, developed in UK in 2012. First, it was necessary to make the cards assume the functionality of a real time audio processor. A Linux operating system called Raspberry (Raspbian) was installed. In this Project is used Pure Data (Pd): a graphical programming language developed in the 90s by Miller Puckette intending to be focused on creating multimedia and computer music events. The role of Pd is an intermediate layer between the hardware and the software. It is responsible for taking blocks of N samples of the analog/digital converter and route it through the signal flow. Secondly, it is necessary to implemented the different audio effects. There are delays based effects, digital filter and dynamics effects. Specifically, the implemented effects are: delay, flanger, vibrato, Schroeder reverb, filters (lowpass, highpass and bandpass), parametric equalizer and compressor and expander dynamics. These effects have been implemented in C language according to the Pd API. As a result, it has been obtained an object for each effect, which is instantiated in Pd. In this Project, the problems of every step are exposed with his corresponding solution. It is inlcuded a step-by-step guide to configure the card and achieve perform a bypass signal process and a simple effect.

Control remoto de presentaciones mediante Raspberry PI y Android

Este proyecto fin de carrera trata de mejorar los sistemas actuales de control en la visualización de diapositivas. La solución adoptada constará de un sistema con modelo cliente-servidor. El servidor formado por un mini ordenador, en este caso una Raspberry Pi, que estará conectado al proyector de video. Este servidor se mantendrá a la espera de recibir una conexión entrante vía Bluetooth. Una vez se realice la conexión interpretará los comandos mandados por el cliente a través de una API con formato JSON y realizará las acciones indicadas para el control de la presentación. El cliente será una aplicación móvil para dispositivos Android. A través de ella el profesor accederá al servidor escaneando un código QR que será proyectado y una vez conectado enviará los comandos de control de la presentación, tales como abrir una presentación, avanzar y retroceder diapositiva, etc. La solución final deberá ser eficiente, sencilla de utilizar y con un bajo coste para resultar atractiva y ser así útil en el mundo real. Para ello se contará con valores añadidos como el poder iniciar la presentación desde el dispositivo móvil, el mostrar las notas de la diapositiva actual o contar con un temporizador para permitir un mejor control sobre el tiempo disponible para la presentación. ABSTRACT. This final project pursues the improvement of the current presentation control systems. The solution it provides is based on a server-client architecture. The server will be a mini PC, a Raspberry Pi model in this case, that will be connected to a video projector or a screen monitor. This server will remain idle waiting for an incoming Bluetooth connection. Once the connection is accepted the server will parse the commands sent by the client through a JSON API and will execute them accordingly to control the system. The client we decided to develop is an Android application. The speaker will be able to connect with the server by scanning a QR code that will be generated and displayed into the projector or screen monitor. Once the connection is accepted the client will sent the commands to control the slides, such as opening a presentation, move forward and backwards, etc. The adopted solution must be efficient, easy to use and with low cost to be appealing and useful to the real world. To accomplish the task this project will count with improvements over the current systems, such as the possibility to open a presentation from the smartphone, the visualization of the current slide notes from the mobile phone and a countdown timer to have a better control over the available time for the presentation.

Análisis de ataques avanzados y sus técnicas de detección

Los ataques a redes de información son cada vez más sofisticados y exigen una constante evolución y mejora de las técnicas de detección. Para ello, en este proyecto se ha diseñado e implementado una plataforma cooperativa para la detección de intrusiones basada en red. En primer lugar, se ha realizado un estudio teórico previo del marco tecnológico relacionado con este ámbito, en el que se describe y caracteriza el software que se utiliza para realizar ataques a sistemas (malware) así como los métodos que se utilizan para llegar a transmitir ese software (vectores de ataque). En el documento también se describen los llamados APT, que son ataques dirigidos con una gran inversión económica y temporal. Estos pueden englobar todos los malware y vectores de ataque existentes. Para poder evitar estos ataques, se estudiarán los sistemas de detección y prevención de intrusiones, describiendo brevemente los algoritmos que se tienden a utilizar en la actualidad. En segundo lugar, se ha planteado y desarrollado una plataforma en red dedicada al análisis de paquetes y conexiones para detectar posibles intrusiones. Este sistema está orientado a sistemas SCADA (Supervisory Control And Data Adquisition) aunque funciona sobre cualquier red IPv4/IPv6, para ello se definirá previamente lo que es un sistema SCADA, así como sus partes principales. Para implementar el sistema se han utilizado dispositivos de bajo consumo llamados Raspberry PI, estos se ubican entre la red y el equipo final que se quiera analizar. En ellos se ejecutan 2 aplicaciones desarrolladas de tipo cliente-servidor (la Raspberry central ejecutará la aplicación servidora y las esclavas la aplicación cliente) que funcionan de forma cooperativa utilizando la tecnología distribuida de Hadoop, la cual se explica previamente. Mediante esta tecnología se consigue desarrollar un sistema completamente escalable. La aplicación servidora muestra una interfaz gráfica que permite administrar la plataforma de análisis de forma centralizada, pudiendo ver así las alarmas de cada dispositivo y calificando cada paquete según su peligrosidad. El algoritmo desarrollado en la aplicación calcula el ratio de paquetes/tiempo que entran/salen del equipo final, procesando los paquetes y analizándolos teniendo en cuenta la información de señalización, creando diferentes bases de datos que irán mejorando la robustez del sistema, reduciendo así la posibilidad de ataques externos. Para concluir, el proyecto inicial incluía el procesamiento en la nube de la aplicación principal, pudiendo administrar así varias infraestructuras concurrentemente, aunque debido al trabajo extra necesario se ha dejado preparado el sistema para poder implementar esta funcionalidad. En el caso experimental actual el procesamiento de la aplicación servidora se realiza en la Raspberry principal, creando un sistema escalable, rápido y tolerante a fallos. ABSTRACT. The attacks to networks of information are increasingly sophisticated and demand a constant evolution and improvement of the technologies of detection. For this project it is developed and implemented a cooperative platform for detect intrusions based on networking. First, there has been a previous theoretical study of technological framework related to this area, which describes the software used for attacks on systems (malware) as well as the methods used in order to transmit this software (attack vectors). In this document it is described the APT, which are attacks directed with a big economic and time inversion. These can contain all existing malware and attack vectors. To prevent these attacks, intrusion detection systems and prevention intrusion systems will be discussed, describing previously the algorithms tend to use today. Secondly, a platform for analyzing network packets has been proposed and developed to detect possible intrusions in SCADA (Supervisory Control And Data Adquisition) systems. This platform is designed for SCADA systems (Supervisory Control And Data Acquisition) but works on any IPv4 / IPv6 network. Previously, it is defined what a SCADA system is and the main parts of it. To implement it, we used low-power devices called Raspberry PI, these are located between the network and the final device to analyze it. In these Raspberry run two applications client-server developed (the central Raspberry runs the server application and the slaves the client application) that work cooperatively using Hadoop distributed technology, which is previously explained. Using this technology is achieved develop a fully scalable system. The server application displays a graphical interface to manage analytics platform centrally, thereby we can see each device alarms and qualifying each packet by dangerousness. The algorithm developed in the application calculates the ratio of packets/time entering/leaving the terminal device, processing the packets and analyzing the signaling information of each packet, reating different databases that will improve the system, thereby reducing the possibility of external attacks. In conclusion, the initial project included cloud computing of the main application, being able to manage multiple concurrent infrastructure, but due to the extra work required has been made ready the system to implement this funcionality. In the current test case the server application processing is made on the main Raspberry, creating a scalable, fast and fault-tolerant system.

Homography-based ground plane detection using a single on-board camera

This study presents a robust method for ground plane detection in vision-based systems with a non-stationary camera. The proposed method is based on the reliable estimation of the homography between ground planes in successive images. This homography is computed using a feature matching approach, which in contrast to classical approaches to on-board motion estimation does not require explicit ego-motion calculation. As opposed to it, a novel homography calculation method based on a linear estimation framework is presented. This framework provides predictions of the ground plane transformation matrix that are dynamically updated with new measurements. The method is specially suited for challenging environments, in particular traffic scenarios, in which the information is scarce and the homography computed from the images is usually inaccurate or erroneous. The proposed estimation framework is able to remove erroneous measurements and to correct those that are inaccurate, hence producing a reliable homography estimate at each instant. It is based on the evaluation of the difference between the predicted and the observed transformations, measured according to the spectral norm of the associated matrix of differences. Moreover, an example is provided on how to use the information extracted from ground plane estimation to achieve object detection and tracking. The method has been successfully demonstrated for the detection of moving vehicles in traffic environments.

Current Mode with RMS Voltage and Offset Control Loops for a Single-Phase Aircraft Inverter Suitable for Parallel and 3-Phase Operation Modes

Rms voltage regulation may be an attractive possibility for controlling power inverters. Combined with a Hall Effect sensor for current control, it keeps its parallel operation capability while increasing its noise immunity, which may lead to a reduction of the Total Harmonic Distortion (THD). Besides, as voltage regulation is designed in DC, a simple PI regulator can provide accurate voltage tracking. Nevertheless, this approach does not lack drawbacks. Its narrow voltage bandwidth makes transients last longer and it increases the voltage THD when feeding non-linear loads, such as rectifying stages. On the other hand, the implementation can fall into offset voltage error. Furthermore, the information of the output voltage phase is hidden for the control as well, making the synchronization of a 3-phase setup not trivial. This paper explains the concept, design and implementation of the whole control scheme, in an on board inverter able to run in parallel and within a 3-phase setup. Special attention is paid to solve the problems foreseen at implementation level: a third analog loop accounts for the offset level is added and a digital algorithm guarantees 3-phase voltage synchronization.

Efficient hybrid monocular-stereo approach to on-board, video-based traffic sign detection and tracking

In this paper we propose an innovative method for the automatic detection and tracking of road traffic signs using an onboard stereo camera. It involves a combination of monocular and stereo analysis strategies to increase the reliability of the detections such that it can boost the performance of any traffic sign recognition scheme. Firstly, an adaptive color and appearance based detection is applied at single camera level to generate a set of traffic sign hypotheses. In turn, stereo information allows for sparse 3D reconstruction of potential traffic signs through a SURF-based matching strategy. Namely, the plane that best fits the cloud of 3D points traced back from feature matches is estimated using a RANSAC based approach to improve robustness to outliers. Temporal consistency of the 3D information is ensured through a Kalman-based tracking stage. This also allows for the generation of a predicted 3D traffic sign model, which is in turn used to enhance the previously mentioned color-based detector through a feedback loop, thus improving detection accuracy. The proposed solution has been tested with real sequences under several illumination conditions and in both urban areas and highways, achieving very high detection rates in challenging environments, including rapid motion and significant perspective distortion

Nuevo concepto de elementos estructurales horizontales de vidrio : placa autoportante y pretensada en forma de pi

En los últimos años, podemos darnos cuenta de la importancia que tienen las nuevas aplicaciones de vidrio especialmente en edificios turísticos donde el vértigo juega un papel importante en la visita. Sin embargo los sistemas constructivos no tienen un especial interés porque el vidrio laminado está siempre soportado por otro elemento de acero o incluso vidrio en forma de retícula. En la presente tesis voy a desarrollar una nueva solución de elemento autoportante de vidrio de gran tamaño haciendo seguro el uso del elemento para andar en el aire. El sueño de muchos arquitectos ha sido diseñar un edificio completamente transparente y a mí me gustaría contribuir a este sueño empezando a estudiar un forjado de vidrio como elemento estructural horizontal y para ello debemos cumplir requerimientos de seguridad. Uno de los objetivos es lograr un elemento lo más transparente y esbelto posible para el uso de pasarelas en vestíbulos de edificios. Las referencias construidas son bien conocidas, pero por otro lado Universidades europeas estudian continua estudiando el comportamiento del vidrio con diferentes láminas, adhesivos, apilados, insertos, sistemas de laminado, pretensado, pandeo lateral, seguridad post-rotura y muchos más aspectos necesarios. La metodología llevada a cabo en esta tesis ha sido primeramente diseñar un elemento industrial prefabricado horizontal de vidrio teniendo en cuenta todos los conceptos aprendidos en el estado del arte y la investigación para poder predimensionar el elemento. El siguiente paso será verificar el modelo por medio de cálculo analítico, simulación de elementos finitos y ensayos físicos. Para realizar los ensayos hay un paso intermedio teniendo que cambiar la hipótesis de carga uniforme a carga puntal para realizar el ensayo de flexión a 4 puntos normalizado y además cambiar a escala 1:2 para adaptarse al espacio de ensayo y ser viable económicamente. Finalmente compararé los resultados de tensión y deformación obtenidos por los tres métodos para extraer conclusiones. Sin embargo el problema de la seguridad no ha concluido, tendré que demostrar que el sistema es seguro después de que se produzca la rotura y para ello sólo dispongo de los ensayos como medio de demostración. El diseño es el resultado de la evolución de una viga tipo “I”; cuando es pretensada para obtener más resistencia, aparece el problema de pandeo lateral y éste es solucionado con una viga con sección en “T” cuya unión es resuelta con un cajeado longitudinal en la parte inferior del elemento horizontal. Las alas de éste crecen para recoger las cargas superficiales creando a su vez un punto débil en la unión que a su vez se soluciona duplicando la sección “TT” y haciendo trabajar dicho tablero de forma tan óptima como una viga continua. Dicha sección en vidrio como un único elemento pretensado es algo inédito. Además he diseñado unas escuadras metálicas en los extremos de los nervios como apoyo y placa de pretensión, así como una hendidura curva en el centro de los nervios para alojar los tirantes de acero de modo que al pretensar el tirante la placa corrija al menos la deformación por peso propio. Realizados los cambios geométricos de escala y las simplificaciones en el laminado y el adhesivo se programan la extracción de resultados desde 3 estadios diferentes: Sin pretensión y con pretensión de 750 Kg y de 1000Kg en cada nervio. Por cada estadio y por cada uno de los métodos, cálculo, simulación y ensayos, se extraen los datos de deformación y tensión en el punto medio de un nervio con el objetivo de hacer una comparación de resultados para obtener unas conclusiones, siempre en el campo de la elasticidad. Posteriormente incrementaré la carga hasta el momento de la rotura de la placa y después hasta el colapso teniendo en cuenta el tiempo y demostrando una rotura segura. El vidrio no tendrá un comportamiento plástico pero habrá sido controlado su comportamiento frágil manteniendo una carga y una deformación aceptable. ABSTRACT Over the past few years we have realized the importance of the new technologies regarding the application of glass in new buildings, especially those touristic places were the views and the heights are the reason of the visit. However, the construction systems of these glass platforms are not usually as interesting, because the laminated glass is always held by another steel substructure or even a grid-formed glass element. Throughout this thesis I am going to develop a new solution of a self-bearing element with big dimensions made out of glass, ensuring a safe solution to use as an element to walk on the air. The dream of many architects has been to create a building completely transparent, and I would like to contribute to this idea by making a glass slab as a horizontal structural element, for which we have to meet the security requirements. One of the goals is to achieve an element as transparent and slim as possible for the use in walkways of building lobbies. The glass buildings references are well known, but on the other hand the European Universities study the behaviour of the glass with different interlayers, adhesives, laminating systems, stacking, prestressed, buckling, safety, breakage and post-breakage capacity; and many other necessary aspects. The methodology followed in this thesis has been to first create a horizontal industrial prefabricated horizontal element of glass, taking into account all the concepts learned in the state of art and the investigation to be able to predimension this element. The next step will be to verify this model with an analytic calculus, a finite element modelling simulation and physical tests. To fulfil these tests there is an intermediate step, having to change the load hypothesis from a punctual one to make the test with a four points normalized deflexion, and also the scale of the sample was changed to 1:2 to adapt to the space of the test and make it economically possible. Finally, the results of tension and deformation obtained from the three methods have been compared to make the conclusions. However, the problem with safety has not concluded yet, for I will have to demonstrate that this system is safe even after its breakage, for which I can only use physical tests as a way of demonstration. The design is the result of the evolution of a typical “I” beam, which when it is prestressed to achieve more resistance, the effect of buckling overcomes, and this is solved with a “T” shaped beam, where the union is solved with a longitudinal groove on the inferior part of the horizontal element. The boards of this beam grow to cover the superficial loads, creating at the same time a weak point, which is solved by duplicating the section “TT” and therefore making this board work as optimal as a continuous beam. This glass section as a single prestressed element is unique. After the final design of the “π” glass plate was obtained and the composition of the laminated glass and interlayers has been predimensioned, the last connection elements must be contemplated. I have also designed a square steel shoe at the end of the beams, which will be the base and the prestressed board, as well as a curved slot in the centre of the nerves to accommodate the steel braces so that when this brace prestresses the board, at least the deformation due to its self-weight will be amended. Once I made the geometric changes of the scale and the simplifications on the laminating and the adhesive, the extraction on results overcomes from three different stages: without any pretension, with a pretension of 750 kg and with a pretension of 1000 kg on each rib. For each stage and for each one of the methods, calculus, simulation and tests, the deformation datum were extracted to obtain the conclusions, always in the field of the elasticity. Afterwards, I will increase the load until the moment of breakage of this board, and then until the collapse of the element, taking into account the time spent and demonstrating a safe breakage. The glass will not have a plastic behaviour, but its brittle behaviour has been controlled, keeping an acceptable load and deflection.

Exploration of RVC applications using an ARM multicore processor = Exploración de aplicaciones RVC empleando un procesador ARM multinúcleo

Single core capabilities have reached their maximum clock speed; new multicore architectures provide an alternative way to tackle this issue instead. The design of decoding applications running on top of these multicore platforms and their optimization to exploit all system computational power is crucial to obtain best results. Since the development at the integration level of printed circuit boards are increasingly difficult to optimize due to physical constraints and the inherent increase in power consumption, development of multiprocessor architectures is becoming the new Holy Grail. In this sense, it is crucial to develop applications that can run on the new multi-core architectures and find out distributions to maximize the potential use of the system. Today most of commercial electronic devices, available in the market, are composed of embedded systems. These devices incorporate recently multi-core processors. Task management onto multiple core/processors is not a trivial issue, and a good task/actor scheduling can yield to significant improvements in terms of efficiency gains and also processor power consumption. Scheduling of data flows between the actors that implement the applications aims to harness multi-core architectures to more types of applications, with an explicit expression of parallelism into the application. On the other hand, the recent development of the MPEG Reconfigurable Video Coding (RVC) standard allows the reconfiguration of the video decoders. RVC is a flexible standard compatible with MPEG developed codecs, making it the ideal tool to integrate into the new multimedia terminals to decode video sequences. With the new versions of the Open RVC-CAL Compiler (Orcc), a static mapping of the actors that implement the functionality of the application can be done once the application executable has been generated. This static mapping must be done for each of the different cores available on the working platform. It has been chosen an embedded system with a processor with two ARMv7 cores. This platform allows us to obtain the desired tests, get as much improvement results from the execution on a single core, and contrast both with a PC-based multiprocessor system. Las posibilidades ofrecidas por el aumento de la velocidad de la frecuencia de reloj de sistemas de un solo procesador están siendo agotadas. Las nuevas arquitecturas multiprocesador proporcionan una vía de desarrollo alternativa en este sentido. El diseño y optimización de aplicaciones de descodificación de video que se ejecuten sobre las nuevas arquitecturas permiten un mejor aprovechamiento y favorecen la obtención de mayores rendimientos. Hoy en día muchos de los dispositivos comerciales que se están lanzando al mercado están integrados por sistemas embebidos, que recientemente están basados en arquitecturas multinúcleo. El manejo de las tareas de ejecución sobre este tipo de arquitecturas no es una tarea trivial, y una buena planificación de los actores que implementan las funcionalidades puede proporcionar importantes mejoras en términos de eficiencia en el uso de la capacidad de los procesadores y, por ende, del consumo de energía. Por otro lado, el reciente desarrollo del estándar de Codificación de Video Reconfigurable (RVC), permite la reconfiguración de los descodificadores de video. RVC es un estándar flexible y compatible con anteriores codecs desarrollados por MPEG. Esto hace de RVC el estándar ideal para ser incorporado en los nuevos terminales multimedia que se están comercializando. Con el desarrollo de las nuevas versiones del compilador específico para el desarrollo de lenguaje RVC-CAL (Orcc), en el que se basa MPEG RVC, el mapeo estático, para entornos basados en multiprocesador, de los actores que integran un descodificador es posible. Se ha elegido un sistema embebido con un procesador con dos núcleos ARMv7. Esta plataforma nos permitirá llevar a cabo las pruebas de verificación y contraste de los conceptos estudiados en este trabajo, en el sentido del desarrollo de descodificadores de video basados en MPEG RVC y del estudio de la planificación y mapeo estático de los mismos.

Co-evolutionary and Reinforcement Learning Techniques Applied to Computer Go players

The objective of this thesis is model some processes from the nature as evolution and co-evolution, and proposing some techniques that can ensure that these learning process really happens and useful to solve some complex problems as Go game. The Go game is ancient and very complex game with simple rules which still is a challenge for the Artificial Intelligence. This dissertation cover some approaches that were applied to solve this problem, proposing solve this problem using competitive and cooperative co-evolutionary learning methods and other techniques proposed by the author. To study, implement and prove these methods were used some neural networks structures, a framework free available and coded many programs. The techniques proposed were coded by the author, performed many experiments to find the best configuration to ensure that co-evolution is progressing and discussed the results. Using co-evolutionary learning processes can be observed some pathologies which could impact co-evolution progress. In this dissertation is introduced some techniques to solve pathologies as loss of gradients, cycling dynamics and forgetting. According to some authors, one solution to solve these co-evolution pathologies is introduce more diversity in populations that are evolving. In this thesis is proposed some techniques to introduce more diversity and some diversity measurements for neural networks structures to monitor diversity during co-evolution. The genotype diversity evolved were analyzed in terms of its impact to global fitness of the strategies evolved and their generalization. Additionally, it was introduced a memory mechanism in the network neural structures to reinforce some strategies in the genes of the neurons evolved with the intention that some good strategies learned are not forgotten. In this dissertation is presented some works from other authors in which cooperative and competitive co-evolution has been applied. The Go board size used in this thesis was 9x9, but can be easily escalated to more bigger boards.The author believe that programs coded and techniques introduced in this dissertation can be used for other domains.

Relationship among research collaboration, number of documents and number of citations. A case study in Spanish computer science production in 2000-2009.

This paper analyzes the relationship among research collaboration, number of documents and number of citations of computer science research activity. It analyzes the number of documents and citations and how they vary by number of authors. They are also analyzed (according to author set cardinality) under different circumstances, that is, when documents are written in different types of collaboration, when documents are published in different document types, when documents are published in different computer science subdisciplines, and, finally, when documents are published by journals with different impact factor quartiles. To investigate the above relationships, this paper analyzes the publications listed in the Web of Science and produced by active Spanish university professors between 2000 and 2009, working in the computer science field. Analyzing all documents, we show that the highest percentage of documents are published by three authors, whereas single-authored documents account for the lowest percentage. By number of citations, there is no positive association between the author cardinality and citation impact. Statistical tests show that documents written by two authors receive more citations per document and year than documents published by more authors. In contrast, results do not show statistically significant differences between documents published by two authors and one author. The research findings suggest that international collaboration results on average in publications with higher citation rates than national and institutional collaborations. We also find differences regarding citation rates between journals and conferences, across different computer science subdisciplines and journal quartiles as expected. Finally, our impression is that the collaborative level (number of authors per document) will increase in the coming years, and documents published by three or four authors will be the trend in computer science literature.

Time and space partition platform for safe and secure flight software.

There are a number of research and development activities that are exploring Time and Space Partition (TSP) to implement safe and secure flight software. This approach allows to execute different real-time applications with different levels of criticality in the same computer board. In order to do that, flight applications must be isolated from each other in the temporal and spatial domains. This paper presents the first results of a partitioning platform based on the Open Ravenscar Kernel (ORK+) and the XtratuM hypervisor. ORK+ is a small, reliable real-time kernel supporting the Ada Ravenscar Computational model that is central to the ASSERT development process. XtratuM supports multiple virtual machines, i.e. partitions, on a single computer and is being used in the Integrated Modular Avionics for Space study. ORK+ executes in an XtratuM partition enabling Ada applications to share the computer board with other applications.

Integración del descodificador OpenSVC en el DSP del OMAP3530

Hoy en día el uso de dispositivos portátiles multimedia es ya una realidad totalmente habitual. Además, estos dispositivos tienen una capacidad de cálculo y unos recursos gráficos y de memoria altos, tanto es así que por ejemplo en un móvil se pueden reproducir vídeos de muy alta calidad o tener capacidad para manejar entornos 3D. El precio del uso de estos recursos es un mayor consumo de batería que en ocasiones es demasiado alto y acortan en gran medida la vida de la carga útil de la batería. El Grupo de Diseño Electrónico y Microelectrónico de la Universidad Politécnica de Madrid ha abierto una línea de trabajo que busca la optimización del consumo de energía en este tipo de dispositivos, concretamente en el ámbito de la reproducción de vídeo. El enfoque para afrontar la solución del problema se basa en obtener un mayor rendimiento de la batería a costa de disminuir la experiencia multimedia del usuario. De esta manera, cuando la carga de la batería esté por debajo de un determinado umbral mientras el dispositivo esté reproduciendo un vídeo de alta calidad será el dispositivo quien se autoconfigure dinámicamente para consumir menos potencia en esta tarea, reduciendo la tasa de imágenes por segundo o la resolución del vídeo que se descodifica. Además de lo citado anteriormente se propone dividir la descodificación y la representación del vídeo en dos procesadores, uno de propósito general y otro para procesado digital de señal, con esto se consigue que tener la misma capacidad de cálculo que con un solo procesador pero a una frecuencia menor. Para materializar la propuesta se usará la tarjeta BeagleBoard basada en un procesador multinúcleo OMAP3530 de Texas Instrument que contiene dos núcleos: un ARM1 Cortex-A8 y un DSP2 de la familia C6000. Este procesador multinúcleo además permite modificar la frecuencia de reloj y la tensión de alimentación dinámicamente para conseguir reducir de este modo el consumo del terminal. Por otro lado, como reproductor de vídeos se utilizará una versión de MPlayer que integra un descodificador de vídeo escalable que permite elegir dinámicamente la resolución o las imágenes por segundo que se decodifican para posteriormente mostrarlas. Este reproductor se ejecutará en el núcleo ARM pero debido a la alta carga computacional de la descodificación de vídeos, y que el ARM no está optimizado para este tipo de procesado de datos, el reproductor debe encargar la tarea de la descodificación al DSP. El objetivo de este Proyecto Fin de Carrera consiste en que mientras el descodificador de vídeo está ejecutándose en el núcleo DSP y el Mplayer en el núcleo ARM del OMAP3530 se pueda elegir dinámicamente qué parte del vídeo se descodifica, es decir, seleccionar en tiempo real la calidad o capa del vídeo que se quiere mostrar. Haciendo esto, se podrá quitar carga computacional al núcleo ARM y asignársela al DSP el cuál puede procesarla a menor frecuencia para ahorrar batería. 1 ARM: Es una arquitectura de procesadores de propósito general basada en RISC (Reduced Instruction Set Computer). Es desarrollada por la empresa inglesa ARM holdings. 2 DSP: Procesador Digital de Señal (Digital Signal Processor). Es un sistema basado en procesador, el cual está orientado al cálculo matemático a altas velocidad. Generalmente poseen varias unidades aritmético-lógicas (ALUs) para conseguir realizar varias operaciones simultáneamente. SUMMARY. Nowadays, the use of multimedia devices is a well known reality. In addition, these devices have high graphics and calculus performance and a lot of memory as well. In instance, we can play high quality videos and 3D environments in a mobile phone. That kind of use may increase the device's power consumption and make shorter the battery duration. Electronic and Microelectronic Design Group of Technical University of Madrid has a research line which is looking for optimization of power consumption while these devices are playing videos. The solution of this trouble is based on taking more advantage of battery by decreasing multimedia user experience. On this way, when battery charge is under a threshold while device is playing a high quality video the device is going to configure itself dynamically in order to decrease its power consumption by decreasing frame per second rate, video resolution or increasing the noise in the decoded frame. It is proposed splitting decoding and representation tasks in two processors in order to have the same calculus capability with lower frecuency. The first one is specialized in digital signal processing and the other one is a general purpose processor. In order to materialize this proposal we will use a board called BeagleBoard which is based on a multicore processor called OMAP3530 from Texas Instrument. This processor includes two cores: ARM Cortex-A8 and a TMS320C64+ DSP core. Changing clock frequency and supply voltage is allowed by OMAP3530, we can decrease the power consumption on this way. On the other hand, MPlayer will be used as video player. It includes a scalable video decoder which let us changing dynamically the resolution or frames per second rate of the video in order to show it later. This player will be executed by ARM core but this is not optimized for this task, for that reason, DSP core will be used to decoding video. The target of this final career project is being able to choose which part of the video is decoded each moment while decoder is executed by DSP and Mplayer by ARM. It will be able to change in real time the video quality, resolution and frames per second that user want to show. On this way, reducing the computational charge within the processor will be possible.