New definitions of margin for multi-class Boosting algorithms

La familia de algoritmos de Boosting son un tipo de técnicas de clasificación y regresión que han demostrado ser muy eficaces en problemas de Visión Computacional. Tal es el caso de los problemas de detección, de seguimiento o bien de reconocimiento de caras, personas, objetos deformables y acciones. El primer y más popular algoritmo de Boosting, AdaBoost, fue concebido para problemas binarios. Desde entonces, muchas han sido las propuestas que han aparecido con objeto de trasladarlo a otros dominios más generales: multiclase, multilabel, con costes, etc. Nuestro interés se centra en extender AdaBoost al terreno de la clasificación multiclase, considerándolo como un primer paso para posteriores ampliaciones. En la presente tesis proponemos dos algoritmos de Boosting para problemas multiclase basados en nuevas derivaciones del concepto margen. El primero de ellos, PIBoost, está concebido para abordar el problema descomponiéndolo en subproblemas binarios. Por un lado, usamos una codificación vectorial para representar etiquetas y, por otro, utilizamos la función de pérdida exponencial multiclase para evaluar las respuestas. Esta codificación produce un conjunto de valores margen que conllevan un rango de penalizaciones en caso de fallo y recompensas en caso de acierto. La optimización iterativa del modelo genera un proceso de Boosting asimétrico cuyos costes dependen del número de etiquetas separadas por cada clasificador débil. De este modo nuestro algoritmo de Boosting tiene en cuenta el desbalanceo debido a las clases a la hora de construir el clasificador. El resultado es un método bien fundamentado que extiende de manera canónica al AdaBoost original. El segundo algoritmo propuesto, BAdaCost, está concebido para problemas multiclase dotados de una matriz de costes. Motivados por los escasos trabajos dedicados a generalizar AdaBoost al terreno multiclase con costes, hemos propuesto un nuevo concepto de margen que, a su vez, permite derivar una función de pérdida adecuada para evaluar costes. Consideramos nuestro algoritmo como la extensión más canónica de AdaBoost para este tipo de problemas, ya que generaliza a los algoritmos SAMME, Cost-Sensitive AdaBoost y PIBoost. Por otro lado, sugerimos un simple procedimiento para calcular matrices de coste adecuadas para mejorar el rendimiento de Boosting a la hora de abordar problemas estándar y problemas con datos desbalanceados. Una serie de experimentos nos sirven para demostrar la efectividad de ambos métodos frente a otros conocidos algoritmos de Boosting multiclase en sus respectivas áreas. En dichos experimentos se usan bases de datos de referencia en el área de Machine Learning, en primer lugar para minimizar errores y en segundo lugar para minimizar costes. Además, hemos podido aplicar BAdaCost con éxito a un proceso de segmentación, un caso particular de problema con datos desbalanceados. Concluimos justificando el horizonte de futuro que encierra el marco de trabajo que presentamos, tanto por su aplicabilidad como por su flexibilidad teórica. Abstract The family of Boosting algorithms represents a type of classification and regression approach that has shown to be very effective in Computer Vision problems. Such is the case of detection, tracking and recognition of faces, people, deformable objects and actions. The first and most popular algorithm, AdaBoost, was introduced in the context of binary classification. Since then, many works have been proposed to extend it to the more general multi-class, multi-label, costsensitive, etc... domains. Our interest is centered in extending AdaBoost to two problems in the multi-class field, considering it a first step for upcoming generalizations. In this dissertation we propose two Boosting algorithms for multi-class classification based on new generalizations of the concept of margin. The first of them, PIBoost, is conceived to tackle the multi-class problem by solving many binary sub-problems. We use a vectorial codification to represent class labels and a multi-class exponential loss function to evaluate classifier responses. This representation produces a set of margin values that provide a range of penalties for failures and rewards for successes. The stagewise optimization of this model introduces an asymmetric Boosting procedure whose costs depend on the number of classes separated by each weak-learner. In this way the Boosting procedure takes into account class imbalances when building the ensemble. The resulting algorithm is a well grounded method that canonically extends the original AdaBoost. The second algorithm proposed, BAdaCost, is conceived for multi-class problems endowed with a cost matrix. Motivated by the few cost-sensitive extensions of AdaBoost to the multi-class field, we propose a new margin that, in turn, yields a new loss function appropriate for evaluating costs. Since BAdaCost generalizes SAMME, Cost-Sensitive AdaBoost and PIBoost algorithms, we consider our algorithm as a canonical extension of AdaBoost to this kind of problems. We additionally suggest a simple procedure to compute cost matrices that improve the performance of Boosting in standard and unbalanced problems. A set of experiments is carried out to demonstrate the effectiveness of both methods against other relevant Boosting algorithms in their respective areas. In the experiments we resort to benchmark data sets used in the Machine Learning community, firstly for minimizing classification errors and secondly for minimizing costs. In addition, we successfully applied BAdaCost to a segmentation task, a particular problem in presence of imbalanced data. We conclude the thesis justifying the horizon of future improvements encompassed in our framework, due to its applicability and theoretical flexibility.

Desarrollo de estructuras nanofotonicas de campo cercano para intensificacion localizada de luz en celulas solares de banda intermedia - Near-field nanophotonic structures for localized light enhancement in intermediate band solar cells

This doctoral thesis explores some of the possibilities that near-field optics can bring to photovoltaics, and in particular to quantum-dot intermediate band solar cells (QD-IBSCs). Our main focus is the analytical optimization of the electric field distribution produced in the vicinity of single scattering particles, in order to produce the highest possible absorption enhancement in the photovoltaic medium in their surroundings. Near-field scattering structures have also been fabricated in laboratory, allowing the application of the previously studied theoretical concepts to real devices. We start by looking into the electrostatic scattering regime, which is only applicable to sub-wavelength sized particles. In this regime it was found that metallic nano-spheroids can produce absorption enhancements of about two orders of magnitude on the material in their vicinity, due to their strong plasmonic resonance. The frequency of such resonance can be tuned with the shape of the particles, allowing us to match it with the optimal transition energies of the intermediate band material. Since these metallic nanoparticles (MNPs) are to be inserted inside the cell photovoltaic medium, they should be coated by a thin insulating layer to prevent electron-hole recombination at their surface. This analysis is then generalized, using an analytical separation-of-variables method implemented in Mathematica7.0, to compute scattering by spheroids of any size and material. This code allowed the study of the scattering properties of wavelengthsized particles (mesoscopic regime), and it was verified that in this regime dielectric spheroids perform better than metallic. The light intensity scattered from such dielectric spheroids can have more than two orders of magnitude than the incident intensity, and the focal region in front of the particle can be shaped in several ways by changing the particle geometry and/or material. Experimental work was also performed in this PhD to implement in practice the concepts studied in the analysis of sub-wavelength MNPs. A wet-coating method was developed to self-assemble regular arrays of colloidal MNPs on the surface of several materials, such as silicon wafers, amorphous silicon films, gallium arsenide and glass. A series of thermal and chemical tests have been performed showing what treatments the nanoparticles can withstand for their embedment in a photovoltaic medium. MNPs arrays are then inserted in an amorphous silicon medium to study the effect of their plasmonic near-field enhancement on the absorption spectrum of the material. The self-assembled arrays of MNPs constructed in these experiments inspired a new strategy for fabricating IBSCs using colloidal quantum dots (CQDs). Such CQDs can be deposited in self-assembled monolayers, using procedures similar to those developed for the patterning of colloidal MNPs. The use of CQDs to form the intermediate band presents several important practical and physical advantages relative to the conventional dots epitaxially grown by the Stranski-Krastanov method. Besides, this provides a fast and inexpensive method for patterning binary arrays of QDs and MNPs, envisioned in the theoretical part of this thesis, in which the MNPs act as antennas focusing the light in the QDs and therefore boosting their absorption

The introduction of teaching innovations into the traditional teaching of construction and building materials

The traditional teaching methods used for training civil engineers are currently being called into question as a result of the new knowledge and skills now required by the labor market. In addition, the European Higher Education Area is requesting that students be given a greater say in their learning. In the subject called Construction and Building Materials at the Civil Engineering School of the Universidad Politécnica de Madrid, a path was set three academic years ago to lead to an improvement in traditional teaching by introducing active methodologies. The innovations are based on cooperative learning, new technologies, and continuous assessment. The writers’ proposal is to offer their experience as a contribution to the debate on how students can be encouraged to acquire the skills currently demanded from a civil engineer, though not overlooking solid, top-quality training. From the outcomes obtained, it can be concluded that using new teaching techniques to supplement a traditional approach provides more opportunities for students to learn while boosting their motivation. In our case, the introduction of these changes has resulted in an increased pass rate of 29% on average, when such a figure is considered in the light of the mean value of passes during the last decade.

A new feature extraction method for signal classification applied to cat spinal cord signals

In the spinal cord of the anesthetized cat, spontaneous cord dorsum potentials (CDPs) appear synchronously along the lumbo-sacral segments. These CDPs have different shapes and magnitudes. Previous work has indicated that some CDPs appear to be specially associated with the activation of spinal pathways that lead to primary afferent depolarization and presynaptic inhibition. Visual detection and classification of these CDPs provides relevant information on the functional organization of the neural networks involved in the control of sensory information and allows the characterization of the changes produced by acute nerve and spinal lesions. We now present a novel feature extraction approach for signal classification, applied to CDP detection. The method is based on an intuitive procedure. We first remove by convolution the noise from the CDPs recorded in each given spinal segment. Then, we assign a coefficient for each main local maximum of the signal using its amplitude and distance to the most important maximum of the signal. These coefficients will be the input for the subsequent classification algorithm. In particular, we employ gradient boosting classification trees. This combination of approaches allows a faster and more accurate discrimination of CDPs than is obtained by other methods.

Short tethers for electrodynamic thrust

The operational advantages of electrodynamic tethers of moderate length are becoming evident from studies of collision avoidance. Although long tethers (of order of 10 kilometers) provide high efficiency and good adaptability to varying plasma conditions, boosting tethers of moderate length (- 1 kilometer) and suitable design might still operate at acceptable efficiencies and adequate adaptability to a changing environment. In this paper we carry out a parametric analysis of the performance of 1-km long boosting tethers, to maximize their efficiency. We also discuss the possible use of multiple, parallel such tethers for keeping thrust high when length is decreased. We then estimate the survivability of short tethers to micrometeoroids and orbital debris. Finally, a few considerations are made on the dynamic stability of electrodynamic tether systems versus length.

Electrodynamic tether applications and constraints

Propulsion and power generation by bare electrodynamic tethers are revisited in a unified way and issues and constraints are addressed. In comparing electrodynamic tethers, which do not use propellant, with other propellantconsuming systems, mission duration is a discriminator that defines crossover points for systems with equal initial masses. Bare tethers operating in low Earth orbit can be more competitive than optimum ion thrusters in missions exceeding two-three days for orbital deboost and three weeks for boosting operations. If the tether produces useful onboard power during deboost, the crossover point reaches to about 10 days. Power generation by means of a bare electrodynamic tether in combination with chemical propulsion to maintain orbital altitude of the system is more efficient than use of the same chemicals (liquid hydrogen and liquid oxygen) in a fuel cell to produce power for missions longer than one week. Issues associated with tether temperature, bowing, deployment, and arcing are also discussed. Heating/cooling rates reach about 4 K/s for a 0.05-mm-thick tape and a fraction of Kelvin/second for the ProSEDS (0.6-mm-radius) wire; under dominant ohmic effects, temperatures areover200K (night) and 380 K (day) for the tape and 320 and 415 K for that wire. Tether applications other than propulsion and power are briefly discussed.

Road fright transport decoupling: A comparative analysis between the United Kingdom and Spain

Economic growth has traditionally been linked to road freight transport demand, leading to a steady rise in social and environmental impacts. Concern about this problem has caused the EU to promote a decoupling strategy aimed at boosting sustainable development in European countries by improving the efficiency of transport systems without curbing economic growth. Over the last few years empirical evidence in some countries such as the United Kingdom has shown an increase in GDP while the volume of road freight traffic has remained stable or even decreased. This paper compares recent decoupling trends by analyzing the evolution of road tonne-kms/GDP relationship in the United Kingdom and Spain from 1999 to 2007. This comparison seeks to identify the main differences and key drivers of decoupling in both countries. We first provide an overview of the divergences between both economic structures and levels of road transport intensity. Then we conduct a decomposition analysis in order to identify the variables that explain the evolution of truck traffic per unit of GDP in each country. The results show that the increasing share of services in GDP has substantially contributed to decreasing road transport demand in both cases. Changes in road transport intensity due to improvements in logistic and supply chain management have been more successful in the UK than in Spain.

Using pMOS Pass-Gates to Boost SRAM Performance by Exploiting Strain Effects in Sub-20-nm FinFET Technologies

Strained fin is one of the techniques used to improve the devices as their size keeps reducing in new nanoscale nodes. In this paper, we use a predictive technology of 14 nm where pMOS mobility is significantly improved when those devices are built on top of long, uncut fins, while nMOS devices present the opposite behavior due to the combination of strains. We explore the possibility of boosting circuit performance in repetitive structures where long uncut fins can be exploited to increase fin strain impact. In particular, pMOS pass-gates are used in 6T complementary SRAM cells (CSRAM) with reinforced pull-ups. Those cells are simulated under process variability and compared to the regular SRAM. We show that when layout dependent effects are considered the CSRAM design provides 10% to 40% faster access time while keeping the same area, power, and stability than a regular 6T SRAM cell. The conclusions also apply to 8T SRAM cells. The CSRAM cell also presents increased reliability in technologies whose nMOS devices have more mismatch than pMOS transistors.

Design and Simulation of Deep Nanometer SRAM Cells under Energy, Mismatch, and Radiation Constraints

La fiabilidad está pasando a ser el principal problema de los circuitos integrados según la tecnología desciende por debajo de los 22nm. Pequeñas imperfecciones en la fabricación de los dispositivos dan lugar ahora a importantes diferencias aleatorias en sus características eléctricas, que han de ser tenidas en cuenta durante la fase de diseño. Los nuevos procesos y materiales requeridos para la fabricación de dispositivos de dimensiones tan reducidas están dando lugar a diferentes efectos que resultan finalmente en un incremento del consumo estático, o una mayor vulnerabilidad frente a radiación. Las memorias SRAM son ya la parte más vulnerable de un sistema electrónico, no solo por representar más de la mitad del área de los SoCs y microprocesadores actuales, sino también porque las variaciones de proceso les afectan de forma crítica, donde el fallo de una única célula afecta a la memoria entera. Esta tesis aborda los diferentes retos que presenta el diseño de memorias SRAM en las tecnologías más pequeñas. En un escenario de aumento de la variabilidad, se consideran problemas como el consumo de energía, el diseño teniendo en cuenta efectos de la tecnología a bajo nivel o el endurecimiento frente a radiación. En primer lugar, dado el aumento de la variabilidad de los dispositivos pertenecientes a los nodos tecnológicos más pequeños, así como a la aparición de nuevas fuentes de variabilidad por la inclusión de nuevos dispositivos y la reducción de sus dimensiones, la precisión del modelado de dicha variabilidad es crucial. Se propone en la tesis extender el método de inyectores, que modela la variabilidad a nivel de circuito, abstrayendo sus causas físicas, añadiendo dos nuevas fuentes para modelar la pendiente sub-umbral y el DIBL, de creciente importancia en la tecnología FinFET. Los dos nuevos inyectores propuestos incrementan la exactitud de figuras de mérito a diferentes niveles de abstracción del diseño electrónico: a nivel de transistor, de puerta y de circuito. El error cuadrático medio al simular métricas de estabilidad y prestaciones de células SRAM se reduce un mínimo de 1,5 veces y hasta un máximo de 7,5 a la vez que la estimación de la probabilidad de fallo se mejora en varios ordenes de magnitud. El diseño para bajo consumo es una de las principales aplicaciones actuales dada la creciente importancia de los dispositivos móviles dependientes de baterías. Es igualmente necesario debido a las importantes densidades de potencia en los sistemas actuales, con el fin de reducir su disipación térmica y sus consecuencias en cuanto al envejecimiento. El método tradicional de reducir la tensión de alimentación para reducir el consumo es problemático en el caso de las memorias SRAM dado el creciente impacto de la variabilidad a bajas tensiones. Se propone el diseño de una célula que usa valores negativos en la bit-line para reducir los fallos de escritura según se reduce la tensión de alimentación principal. A pesar de usar una segunda fuente de alimentación para la tensión negativa en la bit-line, el diseño propuesto consigue reducir el consumo hasta en un 20 % comparado con una célula convencional. Una nueva métrica, el hold trip point se ha propuesto para prevenir nuevos tipos de fallo debidos al uso de tensiones negativas, así como un método alternativo para estimar la velocidad de lectura, reduciendo el número de simulaciones necesarias. Según continúa la reducción del tamaño de los dispositivos electrónicos, se incluyen nuevos mecanismos que permiten facilitar el proceso de fabricación, o alcanzar las prestaciones requeridas para cada nueva generación tecnológica. Se puede citar como ejemplo el estrés compresivo o extensivo aplicado a los fins en tecnologías FinFET, que altera la movilidad de los transistores fabricados a partir de dichos fins. Los efectos de estos mecanismos dependen mucho del layout, la posición de unos transistores afecta a los transistores colindantes y pudiendo ser el efecto diferente en diferentes tipos de transistores. Se propone el uso de una célula SRAM complementaria que utiliza dispositivos pMOS en los transistores de paso, así reduciendo la longitud de los fins de los transistores nMOS y alargando los de los pMOS, extendiéndolos a las células vecinas y hasta los límites de la matriz de células. Considerando los efectos del STI y estresores de SiGe, el diseño propuesto mejora los dos tipos de transistores, mejorando las prestaciones de la célula SRAM complementaria en más de un 10% para una misma probabilidad de fallo y un mismo consumo estático, sin que se requiera aumentar el área. Finalmente, la radiación ha sido un problema recurrente en la electrónica para aplicaciones espaciales, pero la reducción de las corrientes y tensiones de los dispositivos actuales los está volviendo vulnerables al ruido generado por radiación, incluso a nivel de suelo. Pese a que tecnologías como SOI o FinFET reducen la cantidad de energía colectada por el circuito durante el impacto de una partícula, las importantes variaciones de proceso en los nodos más pequeños va a afectar su inmunidad frente a la radiación. Se demuestra que los errores inducidos por radiación pueden aumentar hasta en un 40 % en el nodo de 7nm cuando se consideran las variaciones de proceso, comparado con el caso nominal. Este incremento es de una magnitud mayor que la mejora obtenida mediante el diseño de células de memoria específicamente endurecidas frente a radiación, sugiriendo que la reducción de la variabilidad representaría una mayor mejora. ABSTRACT Reliability is becoming the main concern on integrated circuit as the technology goes beyond 22nm. Small imperfections in the device manufacturing result now in important random differences of the devices at electrical level which must be dealt with during the design. New processes and materials, required to allow the fabrication of the extremely short devices, are making new effects appear resulting ultimately on increased static power consumption, or higher vulnerability to radiation SRAMs have become the most vulnerable part of electronic systems, not only they account for more than half of the chip area of nowadays SoCs and microprocessors, but they are critical as soon as different variation sources are regarded, with failures in a single cell making the whole memory fail. This thesis addresses the different challenges that SRAM design has in the smallest technologies. In a common scenario of increasing variability, issues like energy consumption, design aware of the technology and radiation hardening are considered. First, given the increasing magnitude of device variability in the smallest nodes, as well as new sources of variability appearing as a consequence of new devices and shortened lengths, an accurate modeling of the variability is crucial. We propose to extend the injectors method that models variability at circuit level, abstracting its physical sources, to better model sub-threshold slope and drain induced barrier lowering that are gaining importance in FinFET technology. The two new proposed injectors bring an increased accuracy of figures of merit at different abstraction levels of electronic design, at transistor, gate and circuit levels. The mean square error estimating performance and stability metrics of SRAM cells is reduced by at least 1.5 and up to 7.5 while the yield estimation is improved by orders of magnitude. Low power design is a major constraint given the high-growing market of mobile devices that run on battery. It is also relevant because of the increased power densities of nowadays systems, in order to reduce the thermal dissipation and its impact on aging. The traditional approach of reducing the voltage to lower the energy consumption if challenging in the case of SRAMs given the increased impact of process variations at low voltage supplies. We propose a cell design that makes use of negative bit-line write-assist to overcome write failures as the main supply voltage is lowered. Despite using a second power source for the negative bit-line, the design achieves an energy reduction up to 20% compared to a conventional cell. A new metric, the hold trip point has been introduced to deal with new sources of failures to cells using a negative bit-line voltage, as well as an alternative method to estimate cell speed, requiring less simulations. With the continuous reduction of device sizes, new mechanisms need to be included to ease the fabrication process and to meet the performance targets of the successive nodes. As example we can consider the compressive or tensile strains included in FinFET technology, that alter the mobility of the transistors made out of the concerned fins. The effects of these mechanisms are very dependent on the layout, with transistor being affected by their neighbors, and different types of transistors being affected in a different way. We propose to use complementary SRAM cells with pMOS pass-gates in order to reduce the fin length of nMOS devices and achieve long uncut fins for the pMOS devices when the cell is included in its corresponding array. Once Shallow Trench isolation and SiGe stressors are considered the proposed design improves both kinds of transistor, boosting the performance of complementary SRAM cells by more than 10% for a same failure probability and static power consumption, with no area overhead. While radiation has been a traditional concern in space electronics, the small currents and voltages used in the latest nodes are making them more vulnerable to radiation-induced transient noise, even at ground level. Even if SOI or FinFET technologies reduce the amount of energy transferred from the striking particle to the circuit, the important process variation that the smallest nodes will present will affect their radiation hardening capabilities. We demonstrate that process variations can increase the radiation-induced error rate by up to 40% in the 7nm node compared to the nominal case. This increase is higher than the improvement achieved by radiation-hardened cells suggesting that the reduction of process variations would bring a higher improvement.

Electrocatalytic oxidation enhancement at the surface of InGaN films and nanostructures grown directly on Si(111)

Pronounced electrocatalytic oxidation enhancement at the surface of InGaN layers and nanostructures directly grown on Si by plasma-assisted molecular beam epitaxy is demonstrated. The oxidation enhancement, probed with the ferro/ferricyanide redox couple increases with In content and proximity of nanostructure surfaces and sidewalls to the c-plane. This is attributed to the corresponding increase of the density of intrinsic positively charged surface donors promoting electron transfer. Strongest enhancement is for c-plane InGaN layers functionalized with InN quantum dots (QDs). These results explain the excellent performance of our InN/InGaN QD biosensors and water splitting electrodes for further boosting efficiency.