11 resultados para Adaptive response

em Universidad Politécnica de Madrid


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Progressive increase of temperatures as well as longer seasonal drought periods revealed by climate studies correspond to fast environmental changes that forest species face with their actual genetic background. Natural selective processes cannot develop an adaptive response within this time frame. Thus the capability of forest tree species to adapt to the new environments will depend on their genetic background, but also rely on their phenotypic plasticity. Several reports have shown the involvement of epigenetic modifiers as the basis of the phenotypic plasticity, and in particular to the adaptation to abiotic stresses. DNA methylation (methylation of cytosine residues)is one the most important epigenetic modification in eukaryotes. Itis involved in specific biological processes such as gene transcription regulation, gene silencing, mobile element control or genome imprinting.Therefore, there is a great interest in analyzing cytosine methylation levels and distribution within the genome

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El trabajo desarrollado pretende dar a conocer cuales son las necesidades especificas de alumnos con trastorno del espectro autista (TEA).Se enmarca en los estudios que afrontan la temática de la Atención a Diversidad y la inclusión de los alumnos con TEA en centros ordinarios educativos. Se pretende desarrollar recursos metodológicos para ofrecer una respuesta adaptativa ante el reto de afrontar las competencias clave a través de la nueva asignatura de “Tecnología, programación y robótica”; Para ello se analizan las características de cuatro estudiantes con TEA escolarizados en secundaria del centro concertado Colegio Lourdes (FUHEM) de la comunidad de Madrid y se ofrecen respuestas diferentes en función de ellas, apoyándonos en sus fortalezas para vencer sus dificultades, con el objetivo de alcanzar las mismas competencias claveque el resto de compañeros, como marca la Ley Orgánica de Mejora de la Calidad de la Educación, LOMCE, que entra en vigor en este nivel en el curso 2015-2016. ABSTRACT The developed work seeks to highlight what are the specific needs of students with autism spectrum (ASDs).The part of the studies faced the issue of Attention to diversity and the inclusion of students with ASD in mainstream schools educational disorder. It aims to develop methodological resources to offer an adaptive response to the challenge of addressing key skills through the new subject of "Technology, Programming and Robotics"; To do the characteristics of four students with ASD are discussed in secondary school concerted Lourdes (FUHEM) of the Madrid and different responses depending on them are offered, building on their strengths to overcome their difficulties, in order to achieve the same core competencies of other colleagues as brand organic law of Quality Improvement of Education, LOMCE, which takes effect in the 2015-2016 year.

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Se aborda como objetivo una reflexión operativa sobre los actos creativos en el proyecto de arquitectura investigando los procedimientos que intervienen recurrentemente en los procesos del aprendizaje y proyectación. Aprendizaje entendido como actitud ininterrumpida en el discurso del creador, estado inacabado, en constante evolución, continuo, no suscrito al momento particular, como situación connatural al hecho creativo. El marco epistemológico de la Creatividad y sus técnicas asociadas en constante aplicación en otras disciplinas se desvela como un sustrato gnoseológico referencial para el entendimiento de los procesos de génesis y producción del proyecto y su aprendizaje. Se inscribe la investigación de la tesis en una doble línea de pensamiento lógico-racional y lógico-intuitivo, mediante inferencias de naturaleza deductiva, inductiva y abductiva. Se busca suscitar un interés por la creatividad que contribuya a extender el campo de investigación sobre cómo se genera y se produce la arquitectura y su aplicación al aprendizaje. Proponemos la elaboración de una cartografía taxonómica de procedimientos creativos en el proyectar, de tal manera que nos conduzca hacia la enunciación de una Metaheurística de la Creatividad. Metaheurística que contenga el mapa operativo de Procedimientos y de sus Metaprincipios de aplicación a distintos entornos y problemas, con capacidad de respuesta adaptativa en todos los estados divergentes del proceso. Cartografía, en definitiva, de relaciones más que de sistematizaciones. Este mapa creativo estará formado por 9 Procedimientos resultado de 9 aproximaciones que constituyen 9 Lógicas de acción y razonamiento, en unas condiciones de campo hologramáticas. Enfocadas hacia una nueva actitud creativa, desprejuiciada, atenta a los flujos transdisciplinares, regida indistintamente por el azar y el rigor, expansiva y condensadora, múltiple y poliédrica, abierta e inconclusa, lúdica y frívola, automática e impredecible. Actitud creativa que actúa con lógicas procedimentales relacionales, siempre en constante redefinición, alejadas de toda teorización, sin constituir un meta-relato, más como gestión de información que como dispositivo disciplinar: abductiva, analógica, sinéctica, metafórica, difusa, azarosa, suspendida, divergente y des_aprendida. ABSTRACT Abstract: An operative reflection is approached as aim on the creative acts in the project of architecture, investigating the procedures involved recursively in the processes of learning and project. Learning understood as uninterrupted attitude in the speech of the creator, in unfinished condition, in constant evolution, continuous, not signed to the particular moment, as inherent to the creative fact. The epistemological framework of the Creativity and its techniques associated in constant application in other disciplines is revealed as a referential gnoseologic substratum for the understanding of the processes of genesis and production of the project and his learning. The investigation of the thesis registers in a double line of logical - rational and logical - intuitive thought, by means of inferences of deductive, inductive and abductive nature. One seeks to arouse an interest in the creativity that will help to extend the field of investigation on how it is generated and produces the architecture and its application to the learning. We propose the elaboration of a taxonomic mapping creative procedures in the project, in such a way to lead us towards the enunciation of a Metaheuristic of creativity. Metaheuristic that contains containing the operative map of Procedures and their Metaprinciples of application to different environments and problems, with capacity of adaptive response in all the divergent conditions of the process. Cartography, definitively, of relationships rather than of systematizings. The map of procedures will be formed by 9 procedures as result of 9 approaches that constitute 9 logics of action and reasoning, in hologramatics conditions of field. Focused on a new creative attitude, ideologically unbiased, attentive to transdisciplinary flows, governed either by random and rigor, expansive and condenser, multiple and multifaceted, open and unfinished, playful and frivolous, automatic and unpredictable. Creative attitude that acts with procedural relational logics, always in constant redefinition, away from all theorizing, without being a meta-relate, more like information that discipline as device management: abductive, analogical, synectical, metaphorical, diffuse, randomness, suspended, divergent and mis_learnt.

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In recent decades, there has been an increasing interest in systems comprised of several autonomous mobile robots, and as a result, there has been a substantial amount of development in the eld of Articial Intelligence, especially in Robotics. There are several studies in the literature by some researchers from the scientic community that focus on the creation of intelligent machines and devices capable to imitate the functions and movements of living beings. Multi-Robot Systems (MRS) can often deal with tasks that are dicult, if not impossible, to be accomplished by a single robot. In the context of MRS, one of the main challenges is the need to control, coordinate and synchronize the operation of multiple robots to perform a specic task. This requires the development of new strategies and methods which allow us to obtain the desired system behavior in a formal and concise way. This PhD thesis aims to study the coordination of multi-robot systems, in particular, addresses the problem of the distribution of heterogeneous multi-tasks. The main interest in these systems is to understand how from simple rules inspired by the division of labor in social insects, a group of robots can perform tasks in an organized and coordinated way. We are mainly interested on truly distributed or decentralized solutions in which the robots themselves, autonomously and in an individual manner, select a particular task so that all tasks are optimally distributed. In general, to perform the multi-tasks distribution among a team of robots, they have to synchronize their actions and exchange information. Under this approach we can speak of multi-tasks selection instead of multi-tasks assignment, which means, that the agents or robots select the tasks instead of being assigned a task by a central controller. The key element in these algorithms is the estimation ix of the stimuli and the adaptive update of the thresholds. This means that each robot performs this estimate locally depending on the load or the number of pending tasks to be performed. In addition, it is very interesting the evaluation of the results in function in each approach, comparing the results obtained by the introducing noise in the number of pending loads, with the purpose of simulate the robot's error in estimating the real number of pending tasks. The main contribution of this thesis can be found in the approach based on self-organization and division of labor in social insects. An experimental scenario for the coordination problem among multiple robots, the robustness of the approaches and the generation of dynamic tasks have been presented and discussed. The particular issues studied are: Threshold models: It presents the experiments conducted to test the response threshold model with the objective to analyze the system performance index, for the problem of the distribution of heterogeneous multitasks in multi-robot systems; also has been introduced additive noise in the number of pending loads and has been generated dynamic tasks over time. Learning automata methods: It describes the experiments to test the learning automata-based probabilistic algorithms. The approach was tested to evaluate the system performance index with additive noise and with dynamic tasks generation for the same problem of the distribution of heterogeneous multi-tasks in multi-robot systems. Ant colony optimization: The goal of the experiments presented is to test the ant colony optimization-based deterministic algorithms, to achieve the distribution of heterogeneous multi-tasks in multi-robot systems. In the experiments performed, the system performance index is evaluated by introducing additive noise and dynamic tasks generation over time.

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This PhD work is focused on liquid crystal based tunable phase devices with special emphasis on their design and manufacturing. In the course of the work a number of new manufacturing technologies have been implemented in the UPM clean room facilities, leading to an important improvement in the range of devices being manufactured in the laboratory. Furthermore, a number of novel phase devices have been developed, all of them including novel electrodes, and/or alignment layers. The most important manufacturing progress has been the introduction of reactive ion etching as a tool for achieving high resolution photolithography on indium-tin-oxide (ITO) coated glass and quartz substrates. Another important manufacturing result is the successful elaboration of a binding protocol of anisotropic conduction adhesives. These have been employed in high density interconnections between ITO-glass and flexible printed circuits. Regarding material characterization, the comparative study of nonstoichiometric silicon oxide (SiOx) and silica (SiO2) inorganic alignment layers, as well as the relationship between surface layer deposition, layer morphology and liquid crystal electrooptical response must be highlighted, together with the characterization of the degradation of liquid crystal devices in simulated space mission environment. A wide variety of phase devices have been developed, with special emphasis on beam steerers. One of these was developed within the framework of an ESA project, and consisted of a high density reconfigurable 1D blaze grating, with a spatial separation of the controlling microelectronics and the active, radiation exposed, area. The developed devices confirmed the assumption that liquid crystal devices with such a separation of components, are radiation hard, and can be designed to be both vibration and temperature sturdy. In parallel to the above, an evenly variable analog beam steering device was designed, manufactured and characterized, providing a narrow cone diffraction free beam steering. This steering device is characterized by a very limited number of electrodes necessary for the redirection of a light beam. As few as 4 different voltage levels were needed in order to redirect a light beam. Finally at the Wojskowa Akademia Techniczna (Military University of Technology) in Warsaw, Poland, a wedged analog tunable beam steering device was designed, manufactured and characterized. This beam steerer, like the former one, was designed to resist the harsh conditions both in space and in the context of the shuttle launch. Apart from the beam steering devices, reconfigurable vortices and modal lens devices have been manufactured and characterized. In summary, during this work a large number of liquid crystal devices and liquid crystal device manufacturing technologies have been developed. Besides their relevance in scientific publications and technical achievements, most of these new devices have demonstrated their usefulness in the actual work of the research group where this PhD has been completed. El presente trabajo de Tesis se ha centrado en el diseño, fabricación y caracterización de nuevos dispositivos de fase basados en cristal líquido. Actualmente se están desarrollando dispositivos basados en cristal líquido para aplicaciones diferentes a su uso habitual como displays. Poseen la ventaja de que los dispositivos pueden ser controlados por bajas tensiones y no necesitan elementos mecánicos para su funcionamiento. La fabricación de todos los dispositivos del presente trabajo se ha realizado en la cámara limpia del grupo. La cámara limpia ha sido diseñada por el grupo de investigación, es de dimensiones reducidas pero muy versátil. Está dividida en distintas áreas de trabajo dependiendo del tipo de proceso que se lleva a cabo. La cámara limpia está completamente cubierta de un material libre de polvo. Todas las entradas de suministro de gas y agua están selladas. El aire filtrado es constantemente bombeado dentro de la zona limpia, a fin de crear una sobrepresión evitando así la entrada de aire sin filtrar. Las personas que trabajan en esta zona siempre deben de estar protegidas con un traje especial. Se utilizan trajes especiales que constan de: mono, máscara, guantes de látex, gorro, patucos y gafas de protección UV, cuando sea necesario. Para introducir material dentro de la cámara limpia se debe limpiar con alcohol y paños especiales y posteriormente secarlos con nitrógeno a presión. La fabricación debe seguir estrictamente unos pasos determinados, que pueden cambiar dependiendo de los requerimientos de cada dispositivo. Por ello, la fabricación de dispositivos requiere la formulación de varios protocolos de fabricación. Estos protocolos deben ser estrictamente respetados a fin de obtener repetitividad en los experimentos, lo que lleva siempre asociado un proceso de fabricación fiable. Una célula de cristal líquido está compuesta (de forma general) por dos vidrios ensamblados (sándwich) y colocados a una distancia determinada. Los vidrios se han sometido a una serie de procesos para acondicionar las superficies internas. La célula se llena con cristal líquido. De forma resumida, el proceso de fabricación general es el siguiente: inicialmente, se cortan los vidrios (cuya cara interna es conductora) y se limpian. Después se imprimen las pistas sobre el vidrio formando los píxeles. Estas pistas conductoras provienen del vidrio con la capa conductora de ITO (óxido de indio y estaño). Esto se hace a través de un proceso de fotolitografía con una resina fotosensible, y un desarrollo y ataque posterior del ITO sin protección. Más tarde, las caras internas de los vidrios se acondicionan depositando una capa, que puede ser orgánica o inorgánica (un polímero o un óxido). Esta etapa es crucial para el funcionamiento del dispositivo: induce la orientación de las moléculas de cristal líquido. Una vez que las superficies están acondicionadas, se depositan espaciadores en las mismas: son pequeñas esferas o cilindros de tamaño calibrado (pocos micrómetros) para garantizar un espesor homogéneo del dispositivo. Después en uno de los sustratos se deposita un adhesivo (gasket). A continuación, los sustratos se ensamblan teniendo en cuenta que el gasket debe dejar una boca libre para que el cristal líquido se introduzca posteriormente dentro de la célula. El llenado de la célula se realiza en una cámara de vacío y después la boca se sella. Por último, la conexión de los cables a la célula y el montaje de los polarizadores se realizan fuera de la sala limpia (Figura 1). Dependiendo de la aplicación, el cristal líquido empleado y los demás componentes de la célula tendrán unas características particulares. Para el diseño de los dispositivos de este trabajo se ha realizado un estudio de superficies inorgánicas de alineamiento del cristal líquido, que será de gran importancia para la preparación de los dispositivos de fase, dependiendo de las condiciones ambientales en las que vayan a trabajar. Los materiales inorgánicos que se han estudiado han sido en este caso SiOx y SiO2. El estudio ha comprendido tanto los factores de preparación influyentes en el alineamiento, el comportamiento del cristal líquido al variar estos factores y un estudio de la morfología de las superficies obtenidas.

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Disturbances shape forest ecosystems by influencing their composition, structure, and processes. In the Mediterranean Basin, changes in the disturbance regimes have been predicted to occur in the next future with a higher occurrence of extreme events of drought, wildfire, and – to a lesser extent – windstorm. Woody species are the main elements defining the structure and functioning of forest ecosystems. Recently, response-type diversity has been pointed out as an appropriate indicator of ecosystems resilience. For this, we have elaborated a complete response-trait database for the tree and shrubby species considered in the Third Spanish National Forest Inventory (3SNFI). In the database, the presence or absence of nine response traits associated to drought, fire, and wind were assigned to each species. The database reflected the lack of information about some important traits (in particular for shrubby species) and allowed to determine those traits most widely distributed. The information contained in the database was then used to assess a relative index of forest resilience to these disturbances calculated from the abundance of response traits and the species redundancy for each plot of the 3SNFI; considering both tree and shrubby species. In general, few plots showed high values of the resilience index, probably because some traits were scarcely presented in the species and also because most plots presented very few species. The cartographic representation of the index showed low values for the stands located in mountainous ranges, which are mostly composed by species typical from central Europe. In the other side, Eucalyptus plantations in Galicia appeared as one thee the most resilient ecosystems, due to its higher adaptive capacity to persist after the occurrence of drought, fire, and windstorm events. We conclude that the response traits database can constitute a useful tool for forest management and planning and for future research to enhance the forest resilience.

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With the recent increased popularity and high usage of HTTP Adaptive Streaming (HAS) techniques, various studies have been carried out in this area which generally focused on the technical enhancement of HAS technology and applications. However, a lack of common HAS standard led to multiple proprietary approaches which have been developed by major Internet companies. In the emerging MPEG-DASH standard the packagings of the video content and HTTP syntax have been standardized; but all the details of the adaptation behavior are left to the client implementation. Nevertheless, to design an adaptation algorithm which optimizes the viewing experience of the enduser, the multimedia service providers need to know about the Quality of Experience (QoE) of different adaptation schemes. Taking this into account, the objective of this experiment was to study the QoE of a HAS-based video broadcast model. The experiment has been carried out through a subjective study of the end user response to various possible clients’ behavior for changing the video quality taking different QoE-influence factors into account. The experimental conclusions have made a good insight into the QoE of different adaptation schemes which can be exploited by HAS clients for designing the adaptation algorithms.

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Nowadays, HTTP adaptive streaming (HAS) has become a reliable distribution technology offering significant advantages in terms of both user perceived Quality of Experience (QoE) and resource utilization for content and network service providers. By trading-off the video quality, HAS is able to adapt to the available bandwidth and display requirements so that it can deliver the video content to a variety of devices over the Internet. However, until now there is not enough knowledge of how the adaptation techniques affect the end user's visual experience. Therefore, this paper presents a comparative analysis of different bitrate adaptation strategies in adaptive streaming of monoscopic and stereoscopic video. This has been done through a subjective experiment of testing the end-user response to the video quality variations, considering the visual comfort issue. The experimental outcomes have made a good insight into the factors that can influence on the QoE of different adaptation strategies.

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This paper presents a project for providing the students of Structural Engineering with the flexibility to learn outside classroom schedules. The goal is a framework for adaptive E-learning based on a repository of open educational courseware with a set of basic Structural Engineering concepts and fundamentals. These are paramount for students to expand their technical knowledge and skills in structural analysis and design of tall buildings, arch-type structures as well as bridges. Thus, concepts related to structural behaviour such as linearity, compatibility, stiffness and influence lines have traditionally been elusive for students. The objective is to facilitate the student a teachinglearning process to acquire the necessary intuitive knowledge, cognitive skills and the basis for further technological modules and professional development in this area. As a side effect, the system is expected to help the students improve their preparation for exams on the subject. In this project, a web-based open-source system for studying influence lines on continuous beams is presented. It encompasses a collection of interactive user-friendly applications accessible via Web, written in JavaScript under JQuery and Dygraph Libraries, taking advantage of their efficiency and graphic capabilities. It is performed in both Spanish and English languages. The student is enabled to set the geometric, topologic, boundary and mechanic layout of a continuous beam. While changing the loading and the support conditions, the changes in the beam response prompt on the screen, so that the effects of the several issues involved in structural analysis become apparent. This open interaction with the user allows the student to simulate and virtually infer the structural response. Different levels of complexity can be handled, whereas an ongoing help is at hand for any of them. Students can freely boost their experiential learning on this subject at their own pace, in order to further share, process, generalize and apply the relevant essential concepts of Structural Engineering analysis. Besides, this collection is being added to the "Virtual Lab of Continuum Mechanics" of the UPM, launched in 2013 (http://serviciosgate.upm.es/laboratoriosvirtuales/laboratorios/medios-continuos-en-construcci%C3%B3n)

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The solutions to cope with new challenges that societies have to face nowadays involve providing smarter daily systems. To achieve this, technology has to evolve and leverage physical systems automatic interactions, with less human intervention. Technological paradigms like Internet of Things (IoT) and Cyber-Physical Systems (CPS) are providing reference models, architectures, approaches and tools that are to support cross-domain solutions. Thus, CPS based solutions will be applied in different application domains like e-Health, Smart Grid, Smart Transportation and so on, to assure the expected response from a complex system that relies on the smooth interaction and cooperation of diverse networked physical systems. The Wireless Sensors Networks (WSN) are a well-known wireless technology that are part of large CPS. The WSN aims at monitoring a physical system, object, (e.g., the environmental condition of a cargo container), and relaying data to the targeted processing element. The WSN communication reliability, as well as a restrained energy consumption, are expected features in a WSN. This paper shows the results obtained in a real WSN deployment, based on SunSPOT nodes, which carries out a fuzzy based control strategy to improve energy consumption while keeping communication reliability and computational resources usage among boundaries.

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El desarrollo da las nuevas tecnologías permite a los ingenieros llevar al límite el funcionamiento de los circuitos integrados (Integrated Circuits, IC). Las nuevas generaciones de procesadores, DSPs o FPGAs son capaces de procesar la información a una alta velocidad, con un alto consumo de energía, o esperar en modo de baja potencia con el mínimo consumo posible. Esta gran variación en el consumo de potencia y el corto tiempo necesario para cambiar de un nivel al otro, afecta a las especificaciones del Módulo de Regulador de Tensión (Voltage Regulated Module, VRM) que alimenta al IC. Además, las características adicionales obligatorias, tales como adaptación del nivel de tensión (Adaptive Voltage Positioning, AVP) y escalado dinámico de la tensión (Dynamic Voltage Scaling, DVS), imponen requisitos opuestas en el diseño de la etapa de potencia del VRM. Para poder soportar las altas variaciones de los escalones de carga, el condensador de filtro de salida del VRM se ha de sobredimensionar, penalizando la densidad de energía y el rendimiento durante la operación de DVS. Por tanto, las actuales tendencias de investigación se centran en mejorar la respuesta dinámica del VRM, mientras se reduce el tamaño del condensador de salida. La reducción del condensador de salida lleva a menor coste y una prolongación de la vida del sistema ya que se podría evitar el uso de condensadores voluminosos, normalmente implementados con condensadores OSCON. Una ventaja adicional es que reduciendo el condensador de salida, el DVS se puede realizar más rápido y con menor estrés de la etapa de potencia, ya que la cantidad de carga necesaria para cambiar la tensión de salida es menor. El comportamiento dinámico del sistema con un control lineal (Control Modo Tensión, VMC, o Control Corriente de Pico, Peak Current Mode Control, PCMC,…) está limitado por la frecuencia de conmutación del convertidor y por el tamaño del filtro de salida. La reducción del condensador de salida se puede lograr incrementando la frecuencia de conmutación, así como incrementando el ancho de banda del sistema, y/o aplicando controles avanzados no-lineales. Usando esos controles, las variables del estado se saturan para conseguir el nuevo régimen permanente en un tiempo mínimo, así como el filtro de salida, más específicamente la pendiente de la corriente de la bobina, define la respuesta de la tensión de salida. Por tanto, reduciendo la inductancia de la bobina de salida, la corriente de bobina llega más rápido al nuevo régimen permanente, por lo que una menor cantidad de carga es tomada del condensador de salida durante el tránsito. El inconveniente de esa propuesta es que el rendimiento del sistema es penalizado debido al incremento de pérdidas de conmutación y las corrientes RMS. Para conseguir tanto la reducción del condensador de salida como el alto rendimiento del sistema, mientras se satisfacen las estrictas especificaciones dinámicas, un convertidor multifase es adoptado como estándar para aplicaciones VRM. Para asegurar el reparto de las corrientes entre fases, el convertidor multifase se suele implementar con control de modo de corriente. Para superar la limitación impuesta por el filtro de salida, la segunda posibilidad para reducir el condensador de salida es aplicar alguna modificación topológica (Topologic modifications) de la etapa básica de potencia para incrementar la pendiente de la corriente de bobina y así reducir la duración de tránsito. Como el transitorio se ha reducido, una menor cantidad de carga es tomada del condensador de salida bajo el mismo escalón de la corriente de salida, con lo cual, el condensador de salida se puede reducir para lograr la misma desviación de la tensión de salida. La tercera posibilidad para reducir el condensador de salida del convertidor es introducir un camino auxiliar de energía (additional energy path, AEP) para compensar el desequilibrio de la carga del condensador de salida reduciendo consecuentemente la duración del transitorio y la desviación de la tensión de salida. De esta manera, durante el régimen permanente, el sistema tiene un alto rendimiento debido a que el convertidor principal con bajo ancho de banda es diseñado para trabajar con una frecuencia de conmutación moderada para conseguir requisitos estáticos. Por otro lado, el comportamiento dinámico durante los transitorios es determinado por el AEP con un alto ancho de banda. El AEP puede ser implementado como un camino resistivo, como regulador lineal (Linear regulator, LR) o como un convertidor conmutado. Las dos primeras implementaciones proveen un mayor ancho de banda, acosta del incremento de pérdidas durante el transitorio. Por otro lado, la implementación del convertidor computado presenta menor ancho de banda, limitado por la frecuencia de conmutación, aunque produce menores pérdidas comparado con las dos anteriores implementaciones. Dependiendo de la aplicación, la implementación y la estrategia de control del sistema, hay una variedad de soluciones propuestas en el Estado del Arte (State-of-the-Art, SoA), teniendo diferentes propiedades donde una solución ofrece más ventajas que las otras, pero también unas desventajas. En general, un sistema con AEP ideal debería tener las siguientes propiedades: 1. El impacto del AEP a las pérdidas del sistema debería ser mínimo. A lo largo de la operación, el AEP genera pérdidas adicionales, con lo cual, en el caso ideal, el AEP debería trabajar por un pequeño intervalo de tiempo, solo durante los tránsitos; la otra opción es tener el AEP constantemente activo pero, por la compensación del rizado de la corriente de bobina, se generan pérdidas innecesarias. 2. El AEP debería ser activado inmediatamente para minimizar la desviación de la tensión de salida. Para conseguir una activación casi instantánea, el sistema puede ser informado por la carga antes del escalón o el sistema puede observar la corriente del condensador de salida, debido a que es la primera variable del estado que actúa a la perturbación de la corriente de salida. De esa manera, el AEP es activado con casi cero error de la tensión de salida, logrando una menor desviación de la tensión de salida. 3. El AEP debería ser desactivado una vez que el nuevo régimen permanente es detectado para evitar los transitorios adicionales de establecimiento. La mayoría de las soluciones de SoA estiman la duración del transitorio, que puede provocar un transitorio adicional si la estimación no se ha hecho correctamente (por ejemplo, si la corriente de bobina del convertidor principal tiene un nivel superior o inferior al necesitado, el regulador lento del convertidor principal tiene que compensar esa diferencia una vez que el AEP es desactivado). Otras soluciones de SoA observan las variables de estado, asegurando que el sistema llegue al nuevo régimen permanente, o pueden ser informadas por la carga. 4. Durante el transitorio, como mínimo un subsistema, o bien el convertidor principal o el AEP, debería operar en el lazo cerrado. Implementando un sistema en el lazo cerrado, preferiblemente el subsistema AEP por su ancho de banda elevado, se incrementa la robustez del sistema a los parásitos. Además, el AEP puede operar con cualquier tipo de corriente de carga. Las soluciones que funcionan en el lazo abierto suelen preformar el control de balance de carga con mínimo tiempo, así reducen la duración del transitorio y tienen un impacto menor a las pérdidas del sistema. Por otro lado, esas soluciones demuestran una alta sensibilidad a las tolerancias y parásitos de los componentes. 5. El AEP debería inyectar la corriente a la salida en una manera controlada, así se reduce el riesgo de unas corrientes elevadas y potencialmente peligrosas y se incrementa la robustez del sistema bajo las perturbaciones de la tensión de entrada. Ese problema suele ser relacionado con los sistemas donde el AEP es implementado como un convertidor auxiliar. El convertidor auxiliar es diseñado para una potencia baja, con lo cual, los dispositivos elegidos son de baja corriente/potencia. Si la corriente no es controlada, bajo un pico de tensión de entrada provocada por otro parte del sistema (por ejemplo, otro convertidor conectado al mismo bus), se puede llegar a un pico en la corriente auxiliar que puede causar la perturbación de tensión de salida e incluso el fallo de los dispositivos del convertidor auxiliar. Sin embargo, cuando la corriente es controlada, usando control del pico de corriente o control con histéresis, la corriente auxiliar tiene el control con prealimentación (feed-forward) de tensión de entrada y la corriente es definida y limitada. Por otro lado, si la solución utiliza el control de balance de carga, el sistema puede actuar de forma deficiente si la tensión de entrada tiene un valor diferente del nominal, provocando que el AEP inyecta/toma más/menos carga que necesitada. 6. Escalabilidad del sistema a convertidores multifase. Como ya ha sido comentado anteriormente, para las aplicaciones VRM por la corriente de carga elevada, el convertidor principal suele ser implementado como multifase para distribuir las perdidas entre las fases y bajar el estrés térmico de los dispositivos. Para asegurar el reparto de las corrientes, normalmente un control de modo corriente es usado. Las soluciones de SoA que usan VMC son limitadas a la implementación con solo una fase. Esta tesis propone un nuevo método de control del flujo de energía por el AEP y el convertidor principal. El concepto propuesto se basa en la inyección controlada de la corriente auxiliar al nodo de salida donde la amplitud de la corriente es n-1 veces mayor que la corriente del condensador de salida con las direcciones apropiadas. De esta manera, el AEP genera un condensador virtual cuya capacidad es n veces mayor que el condensador físico y reduce la impedancia de salida. Como el concepto propuesto reduce la impedancia de salida usando el AEP, el concepto es llamado Output Impedance Correction Circuit (OICC) concept. El concepto se desarrolla para un convertidor tipo reductor síncrono multifase con control modo de corriente CMC (incluyendo e implementación con una fase) y puede operar con la tensión de salida constante o con AVP. Además, el concepto es extendido a un convertidor de una fase con control modo de tensión VMC. Durante la operación, el control de tensión de salida de convertidor principal y control de corriente del subsistema OICC están siempre cerrados, incrementando la robustez a las tolerancias de componentes y a los parásitos del cirquito y permitiendo que el sistema se pueda enfrentar a cualquier tipo de la corriente de carga. Según el método de control propuesto, el sistema se puede encontrar en dos estados: durante el régimen permanente, el sistema se encuentra en el estado Idle y el subsistema OICC esta desactivado. Por otro lado, durante el transitorio, el sistema se encuentra en estado Activo y el subsistema OICC está activado para reducir la impedancia de salida. El cambio entre los estados se hace de forma autónoma: el sistema entra en el estado Activo observando la corriente de condensador de salida y vuelve al estado Idle cunado el nuevo régimen permanente es detectado, observando las variables del estado. La validación del concepto OICC es hecha aplicándolo a un convertidor tipo reductor síncrono con dos fases y de 30W cuyo condensador de salida tiene capacidad de 140μF, mientras el factor de multiplicación n es 15, generando en el estado Activo el condensador virtual de 2.1mF. El subsistema OICC es implementado como un convertidor tipo reductor síncrono con PCMC. Comparando el funcionamiento del convertidor con y sin el OICC, los resultados demuestran que se ha logrado una reducción de la desviación de tensión de salida con factor 12, tanto con funcionamiento básico como con funcionamiento AVP. Además, los resultados son comparados con un prototipo de referencia que tiene la misma etapa de potencia y un condensador de salida físico de 2.1mF. Los resultados demuestran que los dos sistemas tienen el mismo comportamiento dinámico. Más aun, se ha cuantificado el impacto en las pérdidas del sistema operando bajo una corriente de carga pulsante y bajo DVS. Se demuestra que el sistema con OICC mejora el rendimiento del sistema, considerando las pérdidas cuando el sistema trabaja con la carga pulsante y con DVS. Por lo último, el condensador de salida de sistema con OICC es mucho más pequeño que el condensador de salida del convertidor de referencia, con lo cual, por usar el concepto OICC, la densidad de energía se incrementa. En resumen, las contribuciones principales de la tesis son: • El concepto propuesto de Output Impedance Correction Circuit (OICC), • El control a nivel de sistema basado en el método usado para cambiar los estados de operación, • La implementación del subsistema OICC en lazo cerrado conjunto con la implementación del convertidor principal, • La cuantificación de las perdidas dinámicas bajo la carga pulsante y bajo la operación DVS, y • La robustez del sistema bajo la variación del condensador de salida y bajo los escalones de carga consecutiva. ABSTRACT Development of new technologies allows engineers to push the performance of the integrated circuits to its limits. New generations of processors, DSPs or FPGAs are able to process information with high speed and high consumption or to wait in low power mode with minimum possible consumption. This huge variation in power consumption and the short time needed to change from one level to another, affect the specifications of the Voltage Regulated Module (VRM) that supplies the IC. Furthermore, additional mandatory features, such as Adaptive Voltage Positioning (AVP) and Dynamic Voltage Scaling (DVS), impose opposite trends on the design of the VRM power stage. In order to cope with high load-step amplitudes, the output capacitor of the VRM power stage output filter is drastically oversized, penalizing power density and the efficiency during the DVS operation. Therefore, the ongoing research trend is directed to improve the dynamic response of the VRM while reducing the size of the output capacitor. The output capacitor reduction leads to a smaller cost and longer life-time of the system since the big bulk capacitors, usually implemented with OSCON capacitors, may not be needed to achieve the desired dynamic behavior. An additional advantage is that, by reducing the output capacitance, dynamic voltage scaling (DVS) can be performed faster and with smaller stress on the power stage, since the needed amount of charge to change the output voltage is smaller. The dynamic behavior of the system with a linear control (Voltage mode control, VMC, Peak Current Mode Control, PCMC,…) is limited by the converter switching frequency and filter size. The reduction of the output capacitor can be achieved by increasing the switching frequency of the converter, thus increasing the bandwidth of the system, and/or by applying advanced non-linear controls. Applying nonlinear control, the system variables get saturated in order to reach the new steady-state in a minimum time, thus the output filter, more specifically the output inductor current slew-rate, determines the output voltage response. Therefore, by reducing the output inductor value, the inductor current reaches faster the new steady state, so a smaller amount of charge is taken from the output capacitor during the transient. The drawback of this approach is that the system efficiency is penalized due to increased switching losses and RMS currents. In order to achieve both the output capacitor reduction and high system efficiency, while satisfying strict dynamic specifications, a Multiphase converter system is adopted as a standard for VRM applications. In order to ensure the current sharing among the phases, the multiphase converter is usually implemented with current mode control. In order to overcome the limitation imposed by the output filter, the second possibility to reduce the output capacitor is to apply Topologic modifications of the basic power stage topology in order to increase the slew-rate of the inductor current and, therefore, reduce the transient duration. Since the transient is reduced, smaller amount of charge is taken from the output capacitor under the same load current, thus, the output capacitor can be reduced to achieve the same output voltage deviation. The third possibility to reduce the output capacitor of the converter is to introduce an additional energy path (AEP) to compensate the charge unbalance of the output capacitor, consequently reducing the transient time and output voltage deviation. Doing so, during the steady-state operation the system has high efficiency because the main low-bandwidth converter is designed to operate at moderate switching frequency, to meet the static requirements, whereas the dynamic behavior during the transients is determined by the high-bandwidth auxiliary energy path. The auxiliary energy path can be implemented as a resistive path, as a Linear regulator, LR, or as a switching converter. The first two implementations provide higher bandwidth, at the expense of increasing losses during the transient. On the other hand, the switching converter implementation presents lower bandwidth, limited by the auxiliary converter switching frequency, though it produces smaller losses compared to the two previous implementations. Depending on the application, the implementation and the control strategy of the system, there is a variety of proposed solutions in the State-of-the-Art (SoA), having different features where one solution offers some advantages over the others, but also some disadvantages. In general, an ideal additional energy path system should have the following features: 1. The impact on the system losses should be minimal. During its operation, the AEP generates additional losses, thus ideally, the AEP should operate for a short period of time, only when the transient is occurring; the other option is to have the AEP constantly on, but due to the inductor current ripple compensation at the output, unnecessary losses are generated. 2. The AEP should be activated nearly instantaneously to prevent bigger output voltage deviation. To achieve near instantaneous activation, the converter system can be informed by the load prior to the load-step or the system can observe the output capacitor current, which is the first system state variable that reacts on the load current perturbation. In this manner, the AEP is turned on with near zero output voltage error, providing smaller output voltage deviation. 3. The AEP should be deactivated once the new steady state is reached to avoid additional settling transients. Most of the SoA solutions estimate duration of the transient which may cause additional transient if the estimation is not performed correctly (e.g. if the main converter inductor current has higher or lower value than needed, the slow regulator of the main converter needs to compensate the difference after the AEP is deactivated). Other SoA solutions are observing state variables, ensuring that the system reaches the new steady state or they are informed by the load. 4. During the transient, at least one subsystem, either the main converter or the AEP, should be in closed-loop. Implementing a closed loop system, preferably the AEP subsystem, due its higher bandwidth, increases the robustness under system tolerances and circuit parasitic. In addition, the AEP can operate with any type of load. The solutions that operate in open loop usually perform minimum time charge balance control, thus reducing the transient length and minimizing the impact on the losses, however they are very sensitive to tolerances and parasitics. 5. The AEP should inject current at the output in a controlled manner, thus reducing the risk of high and potentially damaging currents and increasing robustness on the input voltage deviation. This issue is mainly related to the systems where AEP is implemented as auxiliary converter. The auxiliary converter is designed for small power and, as such, the MOSFETs are rated for small power/currents. If the current is not controlled, due to the some unpredicted spike in input voltage caused by some other part of the system (e.g. different converter), it may lead to a current spike in auxiliary current which will cause the perturbation of the output voltage and even failure of the switching components of auxiliary converter. In the case when the current is controlled, using peak CMC or Hysteretic Window CMC, the auxiliary converter has inherent feed-forwarding of the input voltage in current control and the current is defined and limited. Furthermore, if the solution employs charge balance control, the system may perform poorly if the input voltage has different value than the nominal, causing that AEP injects/extracts more/less charge than needed. 6. Scalability of the system to multiphase converters. As commented previously, in VRM applications, due to the high load currents, the main converters are implemented as multiphase to redistribute losses among the modules, lowering temperature stress of the components. To ensure the current sharing, usually a Current Mode Control (CMC) is employed. The SoA solutions that are implemented with VMC are limited to a single stage implementation. This thesis proposes a novel control method of the energy flow through the AEP and the main converter system. The proposed concept relays on a controlled injection of the auxiliary current at the output node where the instantaneous current value is n-1 times bigger than the output capacitor current with appropriate directions. Doing so, the AEP creates an equivalent n times bigger virtual capacitor at the output, thus reducing the output impedance. Due to the fact that the proposed concept reduces the output impedance using the AEP, it has been named the Output Impedance Correction Circuit (OICC) concept. The concept is developed for a multiphase CMC synchronous buck converter (including a single phase implementation), operating with a constant output voltage and with AVP feature. Further, it is extended to a single phase VMC synchronous buck converter. During the operation, the main converter voltage loop and the OICC subsystem capacitor current loop is constantly closed, increasing the robustness under system tolerances and circuit parasitic and allowing the system to operate with any load-current shape or pattern. According to the proposed control method, the system operates in two states: during the steady-state the system is in the Idle state and the OICC subsystem is deactivated, while during the load-step transient the system is in the Active state and the OICC subsystem is activated in order to reduce the output impedance. The state changes are performed autonomously: the system enters in the Active state by observing the output capacitor current and it returns back to the Idle state when the steady-state operation is detected by observing the state variables. The validation of the OICC concept has been done by applying it to a 30W two phase synchronous buck converter with 140μF output capacitor and with the multiplication factor n equal to 15, generating during the Active state equivalent output capacitor of 2.1mF. The OICC subsystem is implemented as single phase PCMC synchronous buck converter. Comparing the converter operation with and without the OICC the results demonstrate that the 12 times reduction of the output voltage deviation is achieved, for both basic operation and for the AVP operation. Furthermore, the results have been compared to a reference prototype which has the same power stage and a fiscal output capacitor of 2.1mF. The results show that the two systems have the same dynamic behavior. Moreover, an impact on the system losses under the pulsating load and DVS operation has been quantified and it has been demonstrated that the OICC system has improved the system efficiency, considering the losses when the system operates with the pulsating load and the DVS operation. Lastly, the output capacitor of the OICC system is much smaller than the reference design output capacitor, therefore, by applying the OICC concept the power density can be increased. In summary, the main contributions of the thesis are: • The proposed Output Impedance Correction Circuit (OICC) concept, • The system level control based on the used approach to change the states of operation, • The OICC subsystem closed-loop implementation, together with the main converter implementation, • The dynamic losses under the pulsating load and the DVS operation quantification, and • The system robustness on the capacitor impedance variation and consecutive load-steps.